From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B6E0542AF1; Thu, 18 May 2023 17:34:37 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4B8ED42D39; Thu, 18 May 2023 17:34:26 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 7A9A742BAC for ; Thu, 18 May 2023 17:34:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684424064; x=1715960064; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rRjXNMOWQwdabQoKOdLcfsNuLisbKRHwE5UQcnVgU1c=; b=XbKl3I7ntc32S2VJ5KlIeZfjgz6iiBAnqSPUe2k9fW96vLL5qq9Zd/+h GN8C5Pz/ZExGL82cS8PeqAaXdhuStJF22WklG7fplkyf1EO1WHY/aKRXv ggAHxl4Tiyufu0ClEiAhGfu5QAhTA3rgdPYEfi1mgYsYJn5cpy90+lpoc mqIvh/JSA0JcGg6URNEvAxnrp8djLab6fGJIyqpDP6Kr4umdFWu+MBRyd 0wcrCaD1RH5zAx2Ys5I89EbOS5CqGGTN3m/rc+NEO7e4PQFll2Zs3kDBb PgmqEyuizzN6I2Sjw3B5VqkipTbJAEks3BoNIK3spUIbT2awGDE9b+TSo Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10714"; a="341527628" X-IronPort-AV: E=Sophos;i="5.99,285,1677571200"; d="scan'208";a="341527628" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2023 08:34:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10714"; a="705235042" X-IronPort-AV: E=Sophos;i="5.99,285,1677571200"; d="scan'208";a="705235042" Received: from dpdk-qiming3.sh.intel.com ([10.67.111.4]) by fmsmga007.fm.intel.com with ESMTP; 18 May 2023 08:34:22 -0700 From: Qiming Yang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, Qiming Yang , Grzegorz Nitka Subject: [PATCH v2 02/20] net/ice/base: add NAC Topology device capability parser Date: Thu, 18 May 2023 15:16:20 +0000 Message-Id: <20230518151638.1207021-3-qiming.yang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230518151638.1207021-1-qiming.yang@intel.com> References: <20230427062001.478032-1-qiming.yang@intel.com> <20230518151638.1207021-1-qiming.yang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Define and add parsing support for new device capability ICE_AQC_CAPS_NAC_TOPOLOGY. Signed-off-by: Grzegorz Nitka Signed-off-by: Qiming Yang --- drivers/net/ice/base/ice_common.c | 26 ++++++++++++++++++++++++++ drivers/net/ice/base/ice_type.h | 10 ++++++++++ 2 files changed, 36 insertions(+) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index fa30c50ca1..ede46820cd 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -2807,6 +2807,29 @@ ice_parse_fdir_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, dev_p->num_flow_director_fltr); } +/** + * ice_parse_nac_topo_dev_caps - Parse ICE_AQC_CAPS_NAC_TOPOLOGY cap + * @hw: pointer to the HW struct + * @dev_p: pointer to device capabilities structure + * @cap: capability element to parse + * + * Parse ICE_AQC_CAPS_NAC_TOPOLOGY for device capabilities. + */ +static void +ice_parse_nac_topo_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, + struct ice_aqc_list_caps_elem *cap) +{ + dev_p->nac_topo.mode = LE32_TO_CPU(cap->number); + dev_p->nac_topo.id = LE32_TO_CPU(cap->phys_id) & ICE_NAC_TOPO_ID_M; + + ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_primary = %d\n", + !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M)); + ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_dual = %d\n", + !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_DUAL_M)); + ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology id = %d\n", + dev_p->nac_topo.id); +} + /** * ice_parse_dev_caps - Parse device capabilities * @hw: pointer to the HW struct @@ -2852,6 +2875,9 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, case ICE_AQC_CAPS_FD: ice_parse_fdir_dev_caps(hw, dev_p, &cap_resp[i]); break; + case ICE_AQC_CAPS_NAC_TOPOLOGY: + ice_parse_nac_topo_dev_caps(hw, dev_p, &cap_resp[i]); + break; default: /* Don't list common capabilities as unknown */ if (!found) diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index da813c8307..c653c1de3e 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -693,6 +693,15 @@ struct ice_ts_dev_info { u8 ts_ll_read : 1; }; +#define ICE_NAC_TOPO_PRIMARY_M BIT(0) +#define ICE_NAC_TOPO_DUAL_M BIT(1) +#define ICE_NAC_TOPO_ID_M MAKEMASK(0xf, 0) + +struct ice_nac_topology { + u32 mode; + u8 id; +}; + /* Function specific capabilities */ struct ice_hw_func_caps { struct ice_hw_common_caps common_cap; @@ -709,6 +718,7 @@ struct ice_hw_dev_caps { u32 num_flow_director_fltr; /* Number of FD filters available */ struct ice_ts_dev_info ts_dev_info; u32 num_funcs; + struct ice_nac_topology nac_topo; }; /* Information about MAC such as address, etc... */ -- 2.25.1