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From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>,
	Kiran Kumar K <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	Satha Rao <skoteshwar@marvell.com>
Cc: <jerinj@marvell.com>, <dev@dpdk.org>
Subject: [PATCH v3 01/32] common/cnxk: allocate dynamic BPIDs
Date: Thu, 25 May 2023 15:28:33 +0530	[thread overview]
Message-ID: <20230525095904.3967080-1-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20230411091144.1087887-1-ndabilpuram@marvell.com>

From: Satha Rao <skoteshwar@marvell.com>

New mail box to allocate/free dynamic BPIDs based on NIX type.
Added to new mail box APIs to get/set RX channel config with
new BPIDs.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
---
v3:
- Fixed checkpatch issues missed in v2.

v2:
- Rebased on top of dpdk-next-net-mrvl
- Handled comments from Jerin w.r.t commit messages
- Added few more fixes to the series.

 drivers/common/cnxk/roc_cpt.c      |  10 +-
 drivers/common/cnxk/roc_cpt.h      |   3 +-
 drivers/common/cnxk/roc_features.h |   7 ++
 drivers/common/cnxk/roc_mbox.h     |  31 ++++-
 drivers/common/cnxk/roc_nix.h      |  21 ++++
 drivers/common/cnxk/roc_nix_fc.c   | 182 +++++++++++++++++++++++++++++
 drivers/common/cnxk/roc_nix_inl.c  |  24 ++--
 drivers/common/cnxk/roc_nix_priv.h |   1 +
 drivers/common/cnxk/version.map    |   5 +
 9 files changed, 266 insertions(+), 18 deletions(-)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index dff2fbf2a4..d235ff51ca 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -311,8 +311,7 @@ roc_cpt_inline_ipsec_inb_cfg_read(struct roc_cpt *roc_cpt,
 }
 
 int
-roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, uint16_t param1,
-			     uint16_t param2, uint16_t opcode)
+roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_inline_ipsec_inb_cfg *cfg)
 {
 	struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
 	struct cpt_rx_inline_lf_cfg_msg *req;
@@ -328,9 +327,10 @@ roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, uint16_t param1,
 	}
 
 	req->sso_pf_func = idev_sso_pffunc_get();
-	req->param1 = param1;
-	req->param2 = param2;
-	req->opcode = opcode;
+	req->param1 = cfg->param1;
+	req->param2 = cfg->param2;
+	req->opcode = cfg->opcode;
+	req->bpid = cfg->bpid;
 
 	rc = mbox_process(mbox);
 exit:
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index d3a5683dc8..92a18711dc 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -178,8 +178,7 @@ int __roc_api roc_cpt_inline_ipsec_cfg(struct dev *dev, uint8_t slot,
 int __roc_api roc_cpt_inline_ipsec_inb_cfg_read(struct roc_cpt *roc_cpt,
 					struct roc_cpt_inline_ipsec_inb_cfg *cfg);
 int __roc_api roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt,
-					   uint16_t param1, uint16_t param2,
-					   uint16_t opcode);
+					   struct roc_cpt_inline_ipsec_inb_cfg *cfg);
 int __roc_api roc_cpt_afs_print(struct roc_cpt *roc_cpt);
 int __roc_api roc_cpt_lfs_print(struct roc_cpt *roc_cpt);
 void __roc_api roc_cpt_iq_disable(struct roc_cpt_lf *lf);
diff --git a/drivers/common/cnxk/roc_features.h b/drivers/common/cnxk/roc_features.h
index 252f306a86..c2893faa65 100644
--- a/drivers/common/cnxk/roc_features.h
+++ b/drivers/common/cnxk/roc_features.h
@@ -40,4 +40,11 @@ roc_feature_nix_has_reass(void)
 	return roc_model_is_cn10ka();
 }
 
+static inline bool
+roc_feature_nix_has_rxchan_multi_bpid(void)
+{
+	if (roc_model_is_cn10kb() || roc_model_is_cn10ka_b0())
+		return true;
+	return false;
+}
 #endif
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index af3c10b0b0..3d5746b9b8 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -275,7 +275,12 @@ struct mbox_msghdr {
 	M(NIX_SPI_TO_SA_ADD, 0x8026, nix_spi_to_sa_add, nix_spi_to_sa_add_req, \
 	  nix_spi_to_sa_add_rsp)                                               \
 	M(NIX_SPI_TO_SA_DELETE, 0x8027, nix_spi_to_sa_delete,                  \
-	  nix_spi_to_sa_delete_req, msg_rsp)
+	  nix_spi_to_sa_delete_req, msg_rsp)                                   \
+	M(NIX_ALLOC_BPIDS, 0x8028, nix_alloc_bpids, nix_alloc_bpid_req,        \
+	  nix_bpids)                                                           \
+	M(NIX_FREE_BPIDS, 0x8029, nix_free_bpids, nix_bpids, msg_rsp)          \
+	M(NIX_RX_CHAN_CFG, 0x802a, nix_rx_chan_cfg, nix_rx_chan_cfg,           \
+	  nix_rx_chan_cfg)
 
 /* Messages initiated by AF (range 0xC00 - 0xDFF) */
 #define MBOX_UP_CGX_MESSAGES                                                   \
@@ -1186,6 +1191,30 @@ struct nix_bp_cfg_rsp {
 	uint8_t __io chan_cnt;
 };
 
+struct nix_alloc_bpid_req {
+	struct mbox_msghdr hdr;
+	uint8_t __io bpid_cnt;
+	uint8_t __io type;
+	uint64_t __io rsvd;
+};
+
+struct nix_bpids {
+#define ROC_NIX_MAX_BPID_CNT	8
+	struct mbox_msghdr hdr;
+	uint8_t __io bpid_cnt;
+	uint16_t __io bpids[ROC_NIX_MAX_BPID_CNT];
+	uint64_t __io rsvd;
+};
+
+struct nix_rx_chan_cfg {
+	struct mbox_msghdr hdr;
+	uint8_t __io type; /* Interface type(CGX/CPT/LBK) */
+	uint8_t __io read;
+	uint16_t __io chan; /* RX channel to be configured */
+	uint64_t __io val; /* NIX_AF_RX_CHAN_CFG value */
+	uint64_t __io rsvd;
+};
+
 /* Global NIX inline IPSec configuration */
 struct nix_inline_ipsec_cfg {
 	struct mbox_msghdr hdr;
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 0ec98ad630..2737bb9517 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -16,6 +16,17 @@
 #define ROC_NIX_SQB_LOWER_THRESH      70U
 #define ROC_NIX_SQB_SLACK	      12U
 
+/* Reserved interface types for BPID allocation */
+#define ROC_NIX_INTF_TYPE_CGX  0
+#define ROC_NIX_INTF_TYPE_LBK  1
+#define ROC_NIX_INTF_TYPE_SDP  2
+#define ROC_NIX_INTF_TYPE_CPT  3
+#define ROC_NIX_INTF_TYPE_RSVD 4
+
+/* Application based types for BPID allocation, start from end (255 unused rsvd) */
+#define ROC_NIX_INTF_TYPE_CPT_NIX 254
+#define ROC_NIX_INTF_TYPE_SSO     253
+
 enum roc_nix_rss_reta_sz {
 	ROC_NIX_RSS_RETA_SZ_64 = 64,
 	ROC_NIX_RSS_RETA_SZ_128 = 128,
@@ -837,6 +848,16 @@ enum roc_nix_fc_mode __roc_api roc_nix_fc_mode_get(struct roc_nix *roc_nix);
 
 void __roc_api roc_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id,
 				     uint8_t ena, uint8_t force, uint8_t tc);
+int __roc_api roc_nix_bpids_alloc(struct roc_nix *roc_nix, uint8_t type,
+				  uint8_t bp_cnt, uint16_t *bpids);
+int __roc_api roc_nix_bpids_free(struct roc_nix *roc_nix, uint8_t bp_cnt,
+				 uint16_t *bpids);
+int __roc_api roc_nix_rx_chan_cfg_get(struct roc_nix *roc_nix, uint16_t chan,
+				      bool is_cpt, uint64_t *cfg);
+int __roc_api roc_nix_rx_chan_cfg_set(struct roc_nix *roc_nix, uint16_t chan,
+				      bool is_cpt, uint64_t val);
+int __roc_api roc_nix_chan_bpid_set(struct roc_nix *roc_nix, uint16_t chan,
+				    uint64_t bpid, int ena, bool cpt_chan);
 
 /* NPC */
 int __roc_api roc_nix_npc_promisc_ena_dis(struct roc_nix *roc_nix, int enable);
diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c
index cec83b31f3..3b726673a6 100644
--- a/drivers/common/cnxk/roc_nix_fc.c
+++ b/drivers/common/cnxk/roc_nix_fc.c
@@ -104,6 +104,17 @@ nix_fc_rxchan_bpid_set(struct roc_nix *roc_nix, bool enable)
 		nix->cpt_lbpid = 0;
 	}
 
+	/* CPT to NIX BP on all channels */
+	if (!roc_feature_nix_has_rxchan_multi_bpid() || !nix->cpt_nixbpid)
+		goto exit;
+
+	mbox_put(mbox);
+	for (i = 0; i < nix->rx_chan_cnt; i++) {
+		rc = roc_nix_chan_bpid_set(roc_nix, i, nix->cpt_nixbpid, enable, false);
+		if (rc)
+			break;
+	}
+	return rc;
 exit:
 	mbox_put(mbox);
 	return rc;
@@ -599,3 +610,174 @@ roc_nix_chan_count_get(struct roc_nix *roc_nix)
 
 	return nix->chan_cnt;
 }
+
+/* Allocate BPID for requested type
+ * Returns number of BPIDs allocated
+ *	0 if no BPIDs available
+ *	-ve value on error
+ */
+int
+roc_nix_bpids_alloc(struct roc_nix *roc_nix, uint8_t type, uint8_t bp_cnt, uint16_t *bpids)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct mbox *mbox = mbox_get(nix->dev.mbox);
+	struct nix_alloc_bpid_req *req;
+	struct nix_bpids *rsp;
+	int rc = -EINVAL;
+
+	/* Use this api for unreserved interface types */
+	if ((type < ROC_NIX_INTF_TYPE_RSVD) || (bp_cnt > ROC_NIX_MAX_BPID_CNT) || !bpids)
+		goto exit;
+
+	rc = -ENOSPC;
+	req = mbox_alloc_msg_nix_alloc_bpids(mbox);
+	if (req == NULL)
+		goto exit;
+	req->type = type;
+	req->bpid_cnt = bp_cnt;
+
+	rc = mbox_process_msg(mbox, (void *)&rsp);
+	if (rc)
+		goto exit;
+
+	for (rc = 0; rc < rsp->bpid_cnt; rc++)
+		bpids[rc] = rsp->bpids[rc];
+exit:
+	mbox_put(mbox);
+	return rc;
+}
+
+int
+roc_nix_bpids_free(struct roc_nix *roc_nix, uint8_t bp_cnt, uint16_t *bpids)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct mbox *mbox = mbox_get(nix->dev.mbox);
+	struct nix_bpids *req;
+	int rc = -EINVAL;
+
+	/* Use this api for unreserved interface types */
+	if ((bp_cnt > ROC_NIX_MAX_BPID_CNT) || !bpids)
+		goto exit;
+
+	rc = -ENOSPC;
+	req = mbox_alloc_msg_nix_free_bpids(mbox);
+	if (req == NULL)
+		goto exit;
+	for (rc = 0; rc < bp_cnt; rc++)
+		req->bpids[rc] = bpids[rc];
+	req->bpid_cnt = rc;
+
+	rc = mbox_process(mbox);
+exit:
+	mbox_put(mbox);
+	return rc;
+}
+
+int
+roc_nix_rx_chan_cfg_get(struct roc_nix *roc_nix, uint16_t chan, bool is_cpt, uint64_t *cfg)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct mbox *mbox = mbox_get(nix->dev.mbox);
+	struct nix_rx_chan_cfg *req;
+	struct nix_rx_chan_cfg *rsp;
+	int rc = -EINVAL;
+
+	req = mbox_alloc_msg_nix_rx_chan_cfg(mbox);
+	if (req == NULL)
+		goto exit;
+	if (is_cpt)
+		req->type = ROC_NIX_INTF_TYPE_CPT;
+	req->chan = chan;
+	req->read = 1;
+
+	rc = mbox_process_msg(mbox, (void *)&rsp);
+	if (rc)
+		goto exit;
+	*cfg = rsp->val;
+exit:
+	mbox_put(mbox);
+	return rc;
+}
+
+int
+roc_nix_rx_chan_cfg_set(struct roc_nix *roc_nix, uint16_t chan, bool is_cpt, uint64_t val)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct mbox *mbox = mbox_get(nix->dev.mbox);
+	struct nix_rx_chan_cfg *req;
+	int rc = -EINVAL;
+
+	req = mbox_alloc_msg_nix_rx_chan_cfg(mbox);
+	if (req == NULL)
+		goto exit;
+	if (is_cpt)
+		req->type = ROC_NIX_INTF_TYPE_CPT;
+	req->chan = chan;
+	req->val = val;
+	req->read = 0;
+
+	rc = mbox_process(mbox);
+	if (rc)
+		goto exit;
+exit:
+	mbox_put(mbox);
+	return rc;
+}
+
+#define NIX_BPID1_ENA 15
+#define NIX_BPID2_ENA 14
+#define NIX_BPID3_ENA 13
+
+#define NIX_BPID1_OFF 20
+#define NIX_BPID2_OFF 32
+#define NIX_BPID3_OFF 44
+
+int
+roc_nix_chan_bpid_set(struct roc_nix *roc_nix, uint16_t chan, uint64_t bpid, int ena, bool cpt_chan)
+{
+	uint64_t cfg;
+	int rc;
+
+	if (!roc_feature_nix_has_rxchan_multi_bpid())
+		return -ENOTSUP;
+
+	rc = roc_nix_rx_chan_cfg_get(roc_nix, chan, cpt_chan, &cfg);
+	if (rc)
+		return rc;
+
+	if (ena) {
+		if ((((cfg >> NIX_BPID1_OFF) & GENMASK_ULL(8, 0)) == bpid) ||
+		    (((cfg >> NIX_BPID2_OFF) & GENMASK_ULL(8, 0)) == bpid) ||
+		    (((cfg >> NIX_BPID3_OFF) & GENMASK_ULL(8, 0)) == bpid))
+			return 0;
+
+		if (!(cfg & BIT_ULL(NIX_BPID1_ENA))) {
+			cfg &= ~GENMASK_ULL(NIX_BPID1_OFF + 8, NIX_BPID1_OFF);
+			cfg |= (((uint64_t)bpid << NIX_BPID1_OFF) | BIT_ULL(NIX_BPID1_ENA));
+		} else if (!(cfg & BIT_ULL(NIX_BPID2_ENA))) {
+			cfg &= ~GENMASK_ULL(NIX_BPID2_OFF + 8, NIX_BPID2_OFF);
+			cfg |= (((uint64_t)bpid << NIX_BPID2_OFF) | BIT_ULL(NIX_BPID2_ENA));
+		} else if (!(cfg & BIT_ULL(NIX_BPID3_ENA))) {
+			cfg &= ~GENMASK_ULL(NIX_BPID3_OFF + 8, NIX_BPID3_OFF);
+			cfg |= (((uint64_t)bpid << NIX_BPID3_OFF) | BIT_ULL(NIX_BPID3_ENA));
+		} else {
+			plt_nix_dbg("Exceed maximum BPIDs");
+			return -ENOSPC;
+		}
+	} else {
+		if (((cfg >> NIX_BPID1_OFF) & GENMASK_ULL(8, 0)) == bpid) {
+			cfg &= ~(GENMASK_ULL(NIX_BPID1_OFF + 8, NIX_BPID1_OFF) |
+				 BIT_ULL(NIX_BPID1_ENA));
+		} else if (((cfg >> NIX_BPID2_OFF) & GENMASK_ULL(8, 0)) == bpid) {
+			cfg &= ~(GENMASK_ULL(NIX_BPID2_OFF + 8, NIX_BPID2_OFF) |
+				 BIT_ULL(NIX_BPID2_ENA));
+		} else if (((cfg >> NIX_BPID3_OFF) & GENMASK_ULL(8, 0)) == bpid) {
+			cfg &= ~(GENMASK_ULL(NIX_BPID3_OFF + 8, NIX_BPID3_OFF) |
+				 BIT_ULL(NIX_BPID3_ENA));
+		} else {
+			plt_nix_dbg("BPID not found");
+			return -EINVAL;
+		}
+	}
+	return roc_nix_rx_chan_cfg_set(roc_nix, chan, cpt_chan, cfg);
+}
diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c
index 076d83e8d5..9485bba099 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -603,11 +603,10 @@ int
 roc_nix_inl_inb_init(struct roc_nix *roc_nix)
 {
 	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct roc_cpt_inline_ipsec_inb_cfg cfg;
 	struct idev_cfg *idev = idev_get_cfg();
+	uint16_t bpids[ROC_NIX_MAX_BPID_CNT];
 	struct roc_cpt *roc_cpt;
-	uint16_t opcode;
-	uint16_t param1;
-	uint16_t param2;
 	int rc;
 
 	if (idev == NULL)
@@ -624,9 +623,9 @@ roc_nix_inl_inb_init(struct roc_nix *roc_nix)
 	}
 
 	if (roc_model_is_cn9k()) {
-		param1 = (ROC_ONF_IPSEC_INB_MAX_L2_SZ >> 3) & 0xf;
-		param2 = ROC_IE_ON_INB_IKEV2_SINGLE_SA_SUPPORT;
-		opcode =
+		cfg.param1 = (ROC_ONF_IPSEC_INB_MAX_L2_SZ >> 3) & 0xf;
+		cfg.param2 = ROC_IE_ON_INB_IKEV2_SINGLE_SA_SUPPORT;
+		cfg.opcode =
 			((ROC_IE_ON_INB_MAX_CTX_LEN << 8) |
 			 (ROC_IE_ON_MAJOR_OP_PROCESS_INBOUND_IPSEC | (1 << 6)));
 	} else {
@@ -634,13 +633,18 @@ roc_nix_inl_inb_init(struct roc_nix *roc_nix)
 
 		u.u16 = 0;
 		u.s.esp_trailer_disable = 1;
-		param1 = u.u16;
-		param2 = 0;
-		opcode = (ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC | (1 << 6));
+		cfg.param1 = u.u16;
+		cfg.param2 = 0;
+		cfg.opcode = (ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC | (1 << 6));
+		rc = roc_nix_bpids_alloc(roc_nix, ROC_NIX_INTF_TYPE_CPT_NIX, 1, bpids);
+		if (rc > 0) {
+			nix->cpt_nixbpid = bpids[0];
+			cfg.bpid = nix->cpt_nixbpid;
+		}
 	}
 
 	/* Do onetime Inbound Inline config in CPTPF */
-	rc = roc_cpt_inline_ipsec_inb_cfg(roc_cpt, param1, param2, opcode);
+	rc = roc_cpt_inline_ipsec_inb_cfg(roc_cpt, &cfg);
 	if (rc && rc != -EEXIST) {
 		plt_err("Failed to setup inbound lf, rc=%d", rc);
 		return rc;
diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h
index 2fe9093324..99e27cdc56 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -208,6 +208,7 @@ struct nix {
 	uint16_t outb_se_ring_cnt;
 	uint16_t outb_se_ring_base;
 	uint16_t cpt_lbpid;
+	uint16_t cpt_nixbpid;
 	bool need_meta_aura;
 	/* Mode provided by driver */
 	bool inb_inl_dev;
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 5281c71550..e7c6f6bce5 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -147,6 +147,9 @@ INTERNAL {
 	roc_nix_bpf_stats_reset;
 	roc_nix_bpf_stats_to_idx;
 	roc_nix_bpf_timeunit_get;
+	roc_nix_bpids_alloc;
+	roc_nix_bpids_free;
+	roc_nix_chan_bpid_set;
 	roc_nix_chan_count_get;
 	roc_nix_cq_dump;
 	roc_nix_cq_fini;
@@ -277,6 +280,8 @@ INTERNAL {
 	roc_nix_rss_key_set;
 	roc_nix_rss_reta_get;
 	roc_nix_rss_reta_set;
+	roc_nix_rx_chan_cfg_get;
+	roc_nix_rx_chan_cfg_set;
 	roc_nix_rx_drop_re_set;
 	roc_nix_rx_queue_intr_disable;
 	roc_nix_rx_queue_intr_enable;
-- 
2.25.1


  parent reply	other threads:[~2023-05-25 10:37 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-11  9:11 [PATCH 01/21] " Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 02/21] common/cnxk: add pool BPID to RQ while using common pool Nithin Dabilpuram
2023-05-18  5:52   ` Jerin Jacob
2023-04-11  9:11 ` [PATCH 03/21] common/cnxk: skip flow ctrl set on non-existent meta aura Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 04/21] common/cnxk: reduce sqes per sqb by one Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 05/21] common/cnxk: dump SW SSO work count as xstat Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 06/21] common/cnxk: add percent drop threshold to pool Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 07/21] common/cnxk: make aura flow control config more predictable Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 08/21] common/cnxk: update age drop statistics Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 09/21] common/cnxk: fetch eng caps for inl outb inst format Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 10/21] common/cnxk: add receive error mask Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 11/21] common/cnxk: fix null pointer dereference Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 12/21] common/cnxk: fix parameter in NIX dump Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 13/21] common/cnxk: set relchan in TL4 config for each SDP queue Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 14/21] common/cnxk: avoid STALL with dual rate on CNF95N Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 15/21] common/cnxk: update errata info Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 16/21] common/cnxk: sync between mbox up and down messages Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 17/21] common/cnxk: add more comments to mbox code Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 18/21] common/cnxk: add CN105xxN B0 model Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 19/21] common/cnxk: access valid pass value Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 20/21] net/cnxk: add receive error mask Nithin Dabilpuram
2023-04-11  9:11 ` [PATCH 21/21] common/cnxk: support of 1:n pool:aura per NIX LF Nithin Dabilpuram
2023-05-18  5:50   ` Jerin Jacob
2023-05-24 10:03 ` [PATCH v2 01/32] common/cnxk: allocate dynamic BPIDs Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 02/32] common/cnxk: add pool BPID to RQ while using common pool Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 03/32] common/cnxk: fix CPT backpressure disable on LBK Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 04/32] common/cnxk: skip flow ctrl set on non-existent meta aura Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 05/32] common/cnxk: reduce sqes per sqb by one Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 06/32] common/cnxk: dump SW SSO work count as xstat Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 07/32] common/cnxk: add percent drop threshold to pool Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 08/32] common/cnxk: make aura flow control config more predictable Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 09/32] common/cnxk: update age drop statistics Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 10/32] common/cnxk: fetch eng caps for inl outb inst format Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 11/32] common/cnxk: add receive error mask Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 12/32] common/cnxk: fix null pointer dereference Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 13/32] common/cnxk: fix parameter in NIX dump Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 14/32] common/cnxk: set relchan in TL4 config for each SDP queue Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 15/32] common/cnxk: avoid STALL with dual rate on CNF95N Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 16/32] common/cnxk: update errata info Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 17/32] common/cnxk: sync between mbox up and down messages Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 18/32] common/cnxk: add more comments to mbox code Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 19/32] common/cnxk: add CN105xxN B0 model Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 20/32] common/cnxk: access valid pass value Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 21/32] net/cnxk: add receive error mask Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 22/32] common/cnxk: support of 1-N pool-aura per NIX LF Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 23/32] net/cnxk: support for inbound without inline dev mode Nithin Dabilpuram
2023-05-24 10:03   ` [PATCH v2 24/32] common/cnxk: fix inline device VF identification Nithin Dabilpuram
2023-05-24 10:04   ` [PATCH v2 25/32] common/cnxk: avoid inline dev CPT lf detach multiple times Nithin Dabilpuram
2023-05-24 10:04   ` [PATCH v2 26/32] common/cnxk: skip CGX promisc mode with NPC exact match Nithin Dabilpuram
2023-05-24 10:04   ` [PATCH v2 27/32] common/cnxk: configure PFC on SPB aura Nithin Dabilpuram
2023-05-24 10:04   ` [PATCH v2 28/32] common/nix: check for null derefernce Nithin Dabilpuram
2023-05-24 10:04   ` [PATCH v2 29/32] common/cnxk: fix receive queue with multiple mask Nithin Dabilpuram
2023-05-24 10:04   ` [PATCH v2 30/32] net/cnxk: handle extbuf completion on ethdev stop Nithin Dabilpuram
2023-05-24 10:04   ` [PATCH v2 31/32] net/cnxk: add aes-ccm to inline IPsec capabilities Nithin Dabilpuram
2023-05-24 10:04   ` [PATCH v2 32/32] common/cnxk: add check for null auth and anti-replay Nithin Dabilpuram
2023-05-25  9:28     ` Jerin Jacob
2023-05-25  9:58 ` Nithin Dabilpuram [this message]
2023-05-25  9:58   ` [PATCH v3 02/32] common/cnxk: add pool BPID to RQ while using common pool Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 03/32] common/cnxk: fix CPT backpressure disable on LBK Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 04/32] common/cnxk: skip flow ctrl set on non-existent meta aura Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 05/32] common/cnxk: reduce sqes per sqb by one Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 06/32] common/cnxk: dump SW SSO work count as xstat Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 07/32] common/cnxk: add percent drop threshold to pool Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 08/32] common/cnxk: make aura flow control config more predictable Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 09/32] common/cnxk: update age drop statistics Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 10/32] common/cnxk: fetch eng caps for inl outb inst format Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 11/32] common/cnxk: add receive error mask Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 12/32] common/cnxk: fix null pointer dereference Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 13/32] common/cnxk: fix parameter in NIX dump Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 14/32] common/cnxk: set relchan in TL4 config for each SDP queue Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 15/32] common/cnxk: avoid STALL with dual rate on CNF95N Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 16/32] common/cnxk: update errata info Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 17/32] common/cnxk: sync between mbox up and down messages Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 18/32] common/cnxk: add more comments to mbox code Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 19/32] common/cnxk: add CN105xxN B0 model Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 20/32] common/cnxk: access valid pass value Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 21/32] net/cnxk: add receive error mask Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 22/32] common/cnxk: support of 1-N pool-aura per NIX LF Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 23/32] net/cnxk: support for inbound without inline dev mode Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 24/32] common/cnxk: fix inline device VF identification Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 25/32] common/cnxk: avoid inline dev CPT lf detach multiple times Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 26/32] common/cnxk: skip CGX promisc mode with NPC exact match Nithin Dabilpuram
2023-05-25  9:58   ` [PATCH v3 27/32] common/cnxk: configure PFC on SPB aura Nithin Dabilpuram
2023-05-25  9:59   ` [PATCH v3 28/32] common/nix: check for null dereference Nithin Dabilpuram
2023-05-25  9:59   ` [PATCH v3 29/32] common/cnxk: fix receive queue with multiple mask Nithin Dabilpuram
2023-05-25  9:59   ` [PATCH v3 30/32] net/cnxk: handle extbuf completion on ethdev stop Nithin Dabilpuram
2023-05-25  9:59   ` [PATCH v3 31/32] net/cnxk: add aes-ccm to inline IPsec capabilities Nithin Dabilpuram
2023-05-25  9:59   ` [PATCH v3 32/32] common/cnxk: add check for null auth and anti-replay Nithin Dabilpuram
2023-05-26  8:55     ` Jerin Jacob

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