From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D33F942CA8; Tue, 13 Jun 2023 12:21:02 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 252B742D3A; Tue, 13 Jun 2023 12:20:36 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 45D6742D3A for ; Tue, 13 Jun 2023 12:20:35 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35D8qxhT028789; Tue, 13 Jun 2023 03:20:34 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=pIocWH5dHMNnEL0y2wO79dHvm6C0BdWgl2qFbxIoig4=; b=Z//wWW26KQ9iPeyPDT6Qkjwm5cNx4m1pWFz2KhxZ1GENCzqfMYy43cgvOrrt/r6dK+bV 65UQu2MmL5hA2dP3z3Tn8dQUSrSbboCbngMLEFPrq0gygHsY+CY3WYrRHWPVdGtefxUA /piAu9Hh8ERWphFA14e5cZxuENrJ9aosi+98V6n1iIROEts5QqtSZOuSnyWY5/gdwX6X FyFjewz1juxHryplfK+rCPttJ98vJEnZ7DYHjD23BYjXgF8PVd9EUcVNnzcub1p1Xchn 1hkoO2WLY8DucJ4mkRTOYbj1/lu+9DfXqIqtAE2uX5yzrowN1WqdNJoc9YcZGA7BEQxX Hg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3r4rpkfptk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 13 Jun 2023 03:20:34 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 13 Jun 2023 03:20:32 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 13 Jun 2023 03:20:32 -0700 Received: from localhost.localdomain (unknown [10.28.36.102]) by maili.marvell.com (Postfix) with ESMTP id 1245A3F708F; Tue, 13 Jun 2023 03:20:29 -0700 (PDT) From: Akhil Goyal To: CC: , , , , , , Akhil Goyal Subject: [PATCH v4 06/15] common/cnxk: add MACsec stats Date: Tue, 13 Jun 2023 15:50:00 +0530 Message-ID: <20230613102009.2390568-7-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230613102009.2390568-1-gakhil@marvell.com> References: <20230613071614.2259604-1-gakhil@marvell.com> <20230613102009.2390568-1-gakhil@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: fnN1m2xZ9MtyBSW4cjNp7Nq234Igu60R X-Proofpoint-GUID: fnN1m2xZ9MtyBSW4cjNp7Nq234Igu60R X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-13_04,2023-06-12_02,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added ROC APIs for MACsec stats for SC/SECY/FLOW/PORT Signed-off-by: Ankur Dwivedi Signed-off-by: Vamsi Attunuru Signed-off-by: Akhil Goyal --- drivers/common/cnxk/meson.build | 1 + drivers/common/cnxk/roc_mbox.h | 93 ++++++++++++++ drivers/common/cnxk/roc_mcs.h | 85 ++++++++++++ drivers/common/cnxk/roc_mcs_stats.c | 193 ++++++++++++++++++++++++++++ drivers/common/cnxk/version.map | 5 + 5 files changed, 377 insertions(+) create mode 100644 drivers/common/cnxk/roc_mcs_stats.c diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build index 589baf74fe..79e10bac74 100644 --- a/drivers/common/cnxk/meson.build +++ b/drivers/common/cnxk/meson.build @@ -28,6 +28,7 @@ sources = files( 'roc_mbox.c', 'roc_mcs.c', 'roc_mcs_sec_cfg.c', + 'roc_mcs_stats.c', 'roc_ml.c', 'roc_model.c', 'roc_nix.c', diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h index 62c5c3a3ce..3f3a6aadc8 100644 --- a/drivers/common/cnxk/roc_mbox.h +++ b/drivers/common/cnxk/roc_mbox.h @@ -311,6 +311,11 @@ struct mbox_msghdr { M(MCS_PN_TABLE_WRITE, 0xa009, mcs_pn_table_write, mcs_pn_table_write_req, msg_rsp) \ M(MCS_SET_ACTIVE_LMAC, 0xa00a, mcs_set_active_lmac, mcs_set_active_lmac, msg_rsp) \ M(MCS_GET_HW_INFO, 0xa00b, mcs_get_hw_info, msg_req, mcs_hw_info) \ + M(MCS_GET_FLOWID_STATS, 0xa00c, mcs_get_flowid_stats, mcs_stats_req, mcs_flowid_stats) \ + M(MCS_GET_SECY_STATS, 0xa00d, mcs_get_secy_stats, mcs_stats_req, mcs_secy_stats) \ + M(MCS_GET_SC_STATS, 0xa00e, mcs_get_sc_stats, mcs_stats_req, mcs_sc_stats) \ + M(MCS_GET_PORT_STATS, 0xa010, mcs_get_port_stats, mcs_stats_req, mcs_port_stats) \ + M(MCS_CLEAR_STATS, 0xa011, mcs_clear_stats, mcs_clear_stats, msg_rsp) \ M(MCS_SET_LMAC_MODE, 0xa013, mcs_set_lmac_mode, mcs_set_lmac_mode, msg_rsp) \ M(MCS_SET_PN_THRESHOLD, 0xa014, mcs_set_pn_threshold, mcs_set_pn_threshold, msg_rsp) \ @@ -879,6 +884,94 @@ struct mcs_set_pn_threshold { uint64_t __io rsvd; }; +struct mcs_stats_req { + struct mbox_msghdr hdr; + uint8_t __io id; + uint8_t __io mcs_id; + uint8_t __io dir; + uint64_t __io rsvd; +}; + +struct mcs_flowid_stats { + struct mbox_msghdr hdr; + uint64_t __io tcam_hit_cnt; + uint64_t __io rsvd; +}; + +struct mcs_secy_stats { + struct mbox_msghdr hdr; + uint64_t __io ctl_pkt_bcast_cnt; + uint64_t __io ctl_pkt_mcast_cnt; + uint64_t __io ctl_pkt_ucast_cnt; + uint64_t __io ctl_octet_cnt; + uint64_t __io unctl_pkt_bcast_cnt; + uint64_t __io unctl_pkt_mcast_cnt; + uint64_t __io unctl_pkt_ucast_cnt; + uint64_t __io unctl_octet_cnt; + /* Valid only for RX */ + uint64_t __io octet_decrypted_cnt; + uint64_t __io octet_validated_cnt; + uint64_t __io pkt_port_disabled_cnt; + uint64_t __io pkt_badtag_cnt; + uint64_t __io pkt_nosa_cnt; + uint64_t __io pkt_nosaerror_cnt; + uint64_t __io pkt_tagged_ctl_cnt; + uint64_t __io pkt_untaged_cnt; + uint64_t __io pkt_ctl_cnt; /* CN10K-B */ + uint64_t __io pkt_notag_cnt; /* CNF10K-B */ + /* Valid only for TX */ + uint64_t __io octet_encrypted_cnt; + uint64_t __io octet_protected_cnt; + uint64_t __io pkt_noactivesa_cnt; + uint64_t __io pkt_toolong_cnt; + uint64_t __io pkt_untagged_cnt; + uint64_t __io rsvd[4]; +}; + +struct mcs_port_stats { + struct mbox_msghdr hdr; + uint64_t __io tcam_miss_cnt; + uint64_t __io parser_err_cnt; + uint64_t __io preempt_err_cnt; /* CNF10K-B */ + uint64_t __io sectag_insert_err_cnt; + uint64_t __io rsvd[4]; +}; + +struct mcs_sc_stats { + struct mbox_msghdr hdr; + /* RX */ + uint64_t __io hit_cnt; + uint64_t __io pkt_invalid_cnt; + uint64_t __io pkt_late_cnt; + uint64_t __io pkt_notvalid_cnt; + uint64_t __io pkt_unchecked_cnt; + uint64_t __io pkt_delay_cnt; /* CNF10K-B */ + uint64_t __io pkt_ok_cnt; /* CNF10K-B */ + uint64_t __io octet_decrypt_cnt; /* CN10K-B */ + uint64_t __io octet_validate_cnt; /* CN10K-B */ + /* TX */ + uint64_t __io pkt_encrypt_cnt; + uint64_t __io pkt_protected_cnt; + uint64_t __io octet_encrypt_cnt; /* CN10K-B */ + uint64_t __io octet_protected_cnt; /* CN10K-B */ + uint64_t __io rsvd[4]; +}; + +struct mcs_clear_stats { + struct mbox_msghdr hdr; +#define MCS_FLOWID_STATS 0 +#define MCS_SECY_STATS 1 +#define MCS_SC_STATS 2 +#define MCS_SA_STATS 3 +#define MCS_PORT_STATS 4 + uint8_t __io type; /* FLOWID, SECY, SC, SA, PORT */ + /* type = PORT, If id = FF(invalid) port no is derived from pcifunc */ + uint8_t __io id; + uint8_t __io mcs_id; + uint8_t __io dir; + uint8_t __io all; /* All resources stats mapped to PF are cleared */ +}; + /* NPA mbox message formats */ /* NPA mailbox error codes diff --git a/drivers/common/cnxk/roc_mcs.h b/drivers/common/cnxk/roc_mcs.h index bedae3bf42..3fbeee13fa 100644 --- a/drivers/common/cnxk/roc_mcs.h +++ b/drivers/common/cnxk/roc_mcs.h @@ -135,6 +135,76 @@ struct roc_mcs_set_pn_threshold { uint64_t rsvd; }; +struct roc_mcs_stats_req { + uint8_t id; + uint8_t dir; +}; + +struct roc_mcs_flowid_stats { + uint64_t tcam_hit_cnt; +}; + +struct roc_mcs_secy_stats { + uint64_t ctl_pkt_bcast_cnt; + uint64_t ctl_pkt_mcast_cnt; + uint64_t ctl_pkt_ucast_cnt; + uint64_t ctl_octet_cnt; + uint64_t unctl_pkt_bcast_cnt; + uint64_t unctl_pkt_mcast_cnt; + uint64_t unctl_pkt_ucast_cnt; + uint64_t unctl_octet_cnt; + /* Valid only for RX */ + uint64_t octet_decrypted_cnt; + uint64_t octet_validated_cnt; + uint64_t pkt_port_disabled_cnt; + uint64_t pkt_badtag_cnt; + uint64_t pkt_nosa_cnt; + uint64_t pkt_nosaerror_cnt; + uint64_t pkt_tagged_ctl_cnt; + uint64_t pkt_untaged_cnt; + uint64_t pkt_ctl_cnt; /* CN10K-B */ + uint64_t pkt_notag_cnt; /* CNF10K-B */ + /* Valid only for TX */ + uint64_t octet_encrypted_cnt; + uint64_t octet_protected_cnt; + uint64_t pkt_noactivesa_cnt; + uint64_t pkt_toolong_cnt; + uint64_t pkt_untagged_cnt; +}; + +struct roc_mcs_sc_stats { + /* RX */ + uint64_t hit_cnt; + uint64_t pkt_invalid_cnt; + uint64_t pkt_late_cnt; + uint64_t pkt_notvalid_cnt; + uint64_t pkt_unchecked_cnt; + uint64_t pkt_delay_cnt; /* CNF10K-B */ + uint64_t pkt_ok_cnt; /* CNF10K-B */ + uint64_t octet_decrypt_cnt; /* CN10K-B */ + uint64_t octet_validate_cnt; /* CN10K-B */ + /* TX */ + uint64_t pkt_encrypt_cnt; + uint64_t pkt_protected_cnt; + uint64_t octet_encrypt_cnt; /* CN10K-B */ + uint64_t octet_protected_cnt; /* CN10K-B */ +}; + +struct roc_mcs_port_stats { + uint64_t tcam_miss_cnt; + uint64_t parser_err_cnt; + uint64_t preempt_err_cnt; /* CNF10K-B */ + uint64_t sectag_insert_err_cnt; +}; + +struct roc_mcs_clear_stats { + uint8_t type; /* FLOWID, SECY, SC, SA, PORT */ + /* type = PORT, If id = FF(invalid) port no is derived from pcifunc */ + uint8_t id; + uint8_t dir; + uint8_t all; /* All resources stats mapped to PF are cleared */ +}; + struct roc_mcs { TAILQ_ENTRY(roc_mcs) next; struct plt_pci_device *pci_dev; @@ -207,4 +277,19 @@ __roc_api int roc_mcs_flowid_entry_read(struct roc_mcs *mcs, __roc_api int roc_mcs_flowid_entry_enable(struct roc_mcs *mcs, struct roc_mcs_flowid_ena_dis_entry *entry); +/* Flow id stats get */ +__roc_api int roc_mcs_flowid_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req, + struct roc_mcs_flowid_stats *stats); +/* Secy stats get */ +__roc_api int roc_mcs_secy_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req, + struct roc_mcs_secy_stats *stats); +/* SC stats get */ +__roc_api int roc_mcs_sc_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req, + struct roc_mcs_sc_stats *stats); +/* Port stats get */ +__roc_api int roc_mcs_port_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req, + struct roc_mcs_port_stats *stats); +/* Clear stats */ +__roc_api int roc_mcs_stats_clear(struct roc_mcs *mcs, struct roc_mcs_clear_stats *mcs_req); + #endif /* _ROC_MCS_H_ */ diff --git a/drivers/common/cnxk/roc_mcs_stats.c b/drivers/common/cnxk/roc_mcs_stats.c new file mode 100644 index 0000000000..24ac8a31cd --- /dev/null +++ b/drivers/common/cnxk/roc_mcs_stats.c @@ -0,0 +1,193 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2022 Marvell. + */ + +#include "roc_api.h" +#include "roc_priv.h" + +int +roc_mcs_flowid_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req, + struct roc_mcs_flowid_stats *stats) +{ + struct mcs_flowid_stats *rsp; + struct mcs_stats_req *req; + int rc; + + MCS_SUPPORT_CHECK; + + req = mbox_alloc_msg_mcs_get_flowid_stats(mcs->mbox); + if (req == NULL) + return -ENOSPC; + + req->id = mcs_req->id; + req->mcs_id = mcs->idx; + req->dir = mcs_req->dir; + + rc = mbox_process_msg(mcs->mbox, (void *)&rsp); + if (rc) + return rc; + + stats->tcam_hit_cnt = rsp->tcam_hit_cnt; + + return rc; +} + +int +roc_mcs_secy_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req, + struct roc_mcs_secy_stats *stats) +{ + struct mcs_secy_stats *rsp; + struct mcs_stats_req *req; + int rc; + + MCS_SUPPORT_CHECK; + + req = mbox_alloc_msg_mcs_get_secy_stats(mcs->mbox); + if (req == NULL) + return -ENOSPC; + + req->id = mcs_req->id; + req->mcs_id = mcs->idx; + req->dir = mcs_req->dir; + + rc = mbox_process_msg(mcs->mbox, (void *)&rsp); + if (rc) + return rc; + + stats->ctl_pkt_bcast_cnt = rsp->ctl_pkt_bcast_cnt; + stats->ctl_pkt_mcast_cnt = rsp->ctl_pkt_mcast_cnt; + stats->ctl_pkt_ucast_cnt = rsp->ctl_pkt_ucast_cnt; + stats->ctl_octet_cnt = rsp->ctl_octet_cnt; + stats->unctl_pkt_bcast_cnt = rsp->unctl_pkt_bcast_cnt; + stats->unctl_pkt_mcast_cnt = rsp->unctl_pkt_mcast_cnt; + stats->unctl_pkt_ucast_cnt = rsp->unctl_pkt_ucast_cnt; + stats->unctl_octet_cnt = rsp->unctl_octet_cnt; + + if (mcs_req->dir == MCS_RX) { + stats->octet_decrypted_cnt = rsp->octet_decrypted_cnt; + stats->octet_validated_cnt = rsp->octet_validated_cnt; + stats->pkt_port_disabled_cnt = rsp->pkt_port_disabled_cnt; + stats->pkt_badtag_cnt = rsp->pkt_badtag_cnt; + stats->pkt_nosa_cnt = rsp->pkt_nosa_cnt; + stats->pkt_nosaerror_cnt = rsp->pkt_nosaerror_cnt; + stats->pkt_tagged_ctl_cnt = rsp->pkt_tagged_ctl_cnt; + stats->pkt_untaged_cnt = rsp->pkt_untaged_cnt; + if (roc_model_is_cn10kb_a0()) + /* CN10K-B */ + stats->pkt_ctl_cnt = rsp->pkt_ctl_cnt; + else + /* CNF10K-B */ + stats->pkt_notag_cnt = rsp->pkt_notag_cnt; + } else { + stats->octet_encrypted_cnt = rsp->octet_encrypted_cnt; + stats->octet_protected_cnt = rsp->octet_protected_cnt; + stats->pkt_noactivesa_cnt = rsp->pkt_noactivesa_cnt; + stats->pkt_toolong_cnt = rsp->pkt_toolong_cnt; + stats->pkt_untagged_cnt = rsp->pkt_untagged_cnt; + } + + return rc; +} + +int +roc_mcs_sc_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req, + struct roc_mcs_sc_stats *stats) +{ + struct mcs_stats_req *req; + struct mcs_sc_stats *rsp; + int rc; + + MCS_SUPPORT_CHECK; + + req = mbox_alloc_msg_mcs_get_sc_stats(mcs->mbox); + if (req == NULL) + return -ENOSPC; + + req->id = mcs_req->id; + req->mcs_id = mcs->idx; + req->dir = mcs_req->dir; + + rc = mbox_process_msg(mcs->mbox, (void *)&rsp); + if (rc) + return rc; + + if (mcs_req->dir == MCS_RX) { + stats->hit_cnt = rsp->hit_cnt; + stats->pkt_invalid_cnt = rsp->pkt_invalid_cnt; + stats->pkt_late_cnt = rsp->pkt_late_cnt; + stats->pkt_notvalid_cnt = rsp->pkt_notvalid_cnt; + stats->pkt_unchecked_cnt = rsp->pkt_unchecked_cnt; + if (roc_model_is_cn10kb_a0()) { + stats->octet_decrypt_cnt = rsp->octet_decrypt_cnt; + stats->octet_validate_cnt = rsp->octet_validate_cnt; + } else { + stats->pkt_delay_cnt = rsp->pkt_delay_cnt; + stats->pkt_ok_cnt = rsp->pkt_ok_cnt; + } + } else { + stats->pkt_encrypt_cnt = rsp->pkt_encrypt_cnt; + stats->pkt_protected_cnt = rsp->pkt_protected_cnt; + if (roc_model_is_cn10kb_a0()) { + stats->octet_encrypt_cnt = rsp->octet_encrypt_cnt; + stats->octet_protected_cnt = rsp->octet_protected_cnt; + } + } + + return rc; +} + +int +roc_mcs_port_stats_get(struct roc_mcs *mcs, struct roc_mcs_stats_req *mcs_req, + struct roc_mcs_port_stats *stats) +{ + struct mcs_port_stats *rsp; + struct mcs_stats_req *req; + int rc; + + MCS_SUPPORT_CHECK; + + req = mbox_alloc_msg_mcs_get_port_stats(mcs->mbox); + if (req == NULL) + return -ENOSPC; + + req->id = mcs_req->id; + req->mcs_id = mcs->idx; + req->dir = mcs_req->dir; + + rc = mbox_process_msg(mcs->mbox, (void *)&rsp); + if (rc) + return rc; + + stats->tcam_miss_cnt = rsp->tcam_miss_cnt; + stats->parser_err_cnt = rsp->parser_err_cnt; + if (roc_model_is_cnf10kb()) + stats->preempt_err_cnt = rsp->preempt_err_cnt; + + stats->sectag_insert_err_cnt = rsp->sectag_insert_err_cnt; + + return rc; +} + +int +roc_mcs_stats_clear(struct roc_mcs *mcs, struct roc_mcs_clear_stats *mcs_req) +{ + struct mcs_clear_stats *req; + struct msg_rsp *rsp; + + MCS_SUPPORT_CHECK; + + if (!roc_model_is_cn10kb_a0() && mcs_req->type == MCS_SA_STATS) + return MCS_ERR_HW_NOTSUP; + + req = mbox_alloc_msg_mcs_clear_stats(mcs->mbox); + if (req == NULL) + return -ENOSPC; + + req->type = mcs_req->type; + req->id = mcs_req->id; + req->mcs_id = mcs->idx; + req->dir = mcs_req->dir; + req->all = mcs_req->all; + + return mbox_process_msg(mcs->mbox, (void *)&rsp); +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 0591747961..d8890e3538 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -142,11 +142,13 @@ INTERNAL { roc_mcs_flowid_entry_enable; roc_mcs_flowid_entry_read; roc_mcs_flowid_entry_write; + roc_mcs_flowid_stats_get; roc_mcs_hw_info_get; roc_mcs_lmac_mode_set; roc_mcs_pn_table_write; roc_mcs_pn_table_read; roc_mcs_pn_threshold_set; + roc_mcs_port_stats_get; roc_mcs_rsrc_alloc; roc_mcs_rsrc_free; roc_mcs_rx_sc_cam_enable; @@ -156,8 +158,11 @@ INTERNAL { roc_mcs_rx_sc_sa_map_write; roc_mcs_sa_policy_read; roc_mcs_sa_policy_write; + roc_mcs_sc_stats_get; roc_mcs_secy_policy_read; roc_mcs_secy_policy_write; + roc_mcs_secy_stats_get; + roc_mcs_stats_clear; roc_mcs_tx_sc_sa_map_read; roc_mcs_tx_sc_sa_map_write; roc_nix_bpf_alloc; -- 2.25.1