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From: Yutang Jiang <jiangyutang@os.amperecomputing.com>
To: dev@dpdk.org
Cc: patches@amperecomputing.com, yutang.jiang@amperecomputing.com,
	jiangyutang@os.amperecomputing.com, ruifeng.wang@arm.com,
	nd@arm.com, juraj.linkes@pantheon.tech
Subject: [PATCH v2] config/arm: add Ampere Altra/AltraMax/AmpereOne platform
Date: Thu, 15 Jun 2023 19:24:23 +0800	[thread overview]
Message-ID: <20230615112423.54861-1-jiangyutang@os.amperecomputing.com> (raw)

This patch add Ampere series platform support for DPDK:
1. Merging the eMAG and AmpereOne to the one struct implementer_ampere.
2. The microarchitecture of Altra/AltraMax is N1, which implementer/part_number
   is defined in arm, so the definition of RTE_MAX_LCORE/RTE_MAX_NUMA_NODES
   refers to the quadrant sub-numa definition in AltraMax 2P system.
3. Added basic definition of AmpereOne.

Signed-off-by: Yutang Jiang <jiangyutang@os.amperecomputing.com>
---
 config/arm/arm64_altra_linux_gcc     | 16 ++++++++++
 config/arm/arm64_ampereone_linux_gcc | 16 ++++++++++
 config/arm/meson.build               | 45 ++++++++++++++++++++++++----
 3 files changed, 71 insertions(+), 6 deletions(-)
 create mode 100644 config/arm/arm64_altra_linux_gcc
 create mode 100644 config/arm/arm64_ampereone_linux_gcc

diff --git a/config/arm/arm64_altra_linux_gcc b/config/arm/arm64_altra_linux_gcc
new file mode 100644
index 0000000000..ce0667ebe2
--- /dev/null
+++ b/config/arm/arm64_altra_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8.2-a'
+endian = 'little'
+
+[properties]
+platform = 'altra'
diff --git a/config/arm/arm64_ampereone_linux_gcc b/config/arm/arm64_ampereone_linux_gcc
new file mode 100644
index 0000000000..8964432a74
--- /dev/null
+++ b/config/arm/arm64_ampereone_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8.6-a'
+endian = 'little'
+
+[properties]
+platform = 'ampereone'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 5213434ca4..70a562aac6 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -71,8 +71,8 @@ part_number_config_arm = {
             ['RTE_MACHINE', '"neoverse-n1"'],
             ['RTE_ARM_FEATURE_ATOMICS', true],
             ['RTE_MAX_MEM_MB', 1048576],
-            ['RTE_MAX_LCORE', 160],
-            ['RTE_MAX_NUMA_NODES', 2]
+            ['RTE_MAX_LCORE', 256],
+            ['RTE_MAX_NUMA_NODES', 8]
         ]
     },
     '0xd40': {
@@ -165,16 +165,30 @@ implementer_cavium = {
 implementer_ampere = {
     'description': 'Ampere Computing',
     'flags': [
-        ['RTE_MACHINE', '"emag"'],
         ['RTE_CACHE_LINE_SIZE', 64],
-        ['RTE_MAX_LCORE', 32],
-        ['RTE_MAX_NUMA_NODES', 1]
+        ['RTE_MAX_LCORE', 1024],
+        ['RTE_MAX_NUMA_NODES', 8]
     ],
     'part_number_config': {
         '0x0': {
             'march': 'armv8-a',
             'march_features': ['crc', 'crypto'],
-            'compiler_options':  ['-mtune=emag']
+            'compiler_options':  ['-mtune=emag'],
+            'flags': [
+                ['RTE_MACHINE', '"eMAG"'],
+                ['RTE_MAX_LCORE', 32],
+                ['RTE_MAX_NUMA_NODES', 1]
+            ]
+        },
+        '0xac3': {
+            'march': 'armv8.6-a',
+            'march_features': ['crc', 'crypto'],
+            'compiler_options':  ['-mcpu=ampere1'],
+            'flags': [
+                ['RTE_MACHINE', '"AmpereOne"'],
+                ['RTE_MAX_LCORE', 320],
+                ['RTE_MAX_NUMA_NODES', 8]
+            ]
         }
     }
 }
@@ -265,6 +279,7 @@ implementers = {
     '0x43': implementer_cavium,
     '0x48': implementer_hisilicon,
     '0x50': implementer_ampere,
+    '0xc0': implementer_ampere,
     '0x51': implementer_qualcomm,
     '0x70': implementer_phytium,
 }
@@ -346,6 +361,20 @@ soc_emag = {
     'part_number': '0x0'
 }
 
+soc_altra = {
+    'description': 'Ampere Altra/AltraMax',
+    'implementer': '0x41',
+    'part_number': '0xd0c',
+    'numa': true
+}
+
+soc_ampereone = {
+    'description': 'Ampere AmpereOne',
+    'implementer': '0xc0',
+    'part_number': '0xac3',
+    'numa': true
+}
+
 soc_ft2000plus = {
     'description': 'Phytium FT-2000+',
     'implementer': '0x70',
@@ -460,6 +489,8 @@ soc_bluefield3 = {
 Start of SoCs list
 generic:         Generic un-optimized build for armv8 aarch64 execution mode.
 generic_aarch32: Generic un-optimized build for armv8 aarch32 execution mode.
+altra:           Ampere Altra/AltraMax
+ampereone:       Ampere AmpereOne
 armada:          Marvell ARMADA
 bluefield:       NVIDIA BlueField
 bluefield3:      NVIDIA BlueField-3
@@ -487,6 +518,8 @@ End of SoCs list
 socs = {
     'generic': soc_generic,
     'generic_aarch32': soc_generic_aarch32,
+    'altra': soc_altra,
+    'ampereone': soc_ampereone,
     'armada': soc_armada,
     'bluefield': soc_bluefield,
     'bluefield3': soc_bluefield3,
-- 
2.40.1


             reply	other threads:[~2023-06-19  7:10 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-15 11:24 Yutang Jiang [this message]
2023-06-16  3:17 ` Ruifeng Wang
2023-06-27 22:00   ` Thomas Monjalon

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