From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Anoob Joseph <anoobj@marvell.com>,
Aakash Sasidharan <asasidharan@marvell.com>,
Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>,
Vidya Sagar Velumuri <vvelumuri@marvell.com>, <dev@dpdk.org>
Subject: [PATCH v3 4/8] crypto/cnxk: enable context cache for 103XX
Date: Tue, 20 Jun 2023 15:51:02 +0530 [thread overview]
Message-ID: <20230620102106.3970544-5-ktejasree@marvell.com> (raw)
In-Reply-To: <20230620102106.3970544-1-ktejasree@marvell.com>
Enabling context cache for SE instructions on 106B0
and 103XX.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 6 +++---
drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 8 ++++++++
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 2018b0eba5..d0c99d37e8 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -653,7 +653,7 @@ cnxk_cpt_inst_w7_get(struct cnxk_se_sess *sess, struct roc_cpt *roc_cpt)
inst_w7.s.cptr = (uint64_t)&sess->roc_se_ctx.se_ctx;
- if (roc_errata_cpt_hang_on_mixed_ctx_val())
+ if (hw_ctx_cache_enable())
inst_w7.s.ctx_val = 1;
else
inst_w7.s.cptr += 8;
@@ -729,7 +729,7 @@ sym_session_configure(struct roc_cpt *roc_cpt, struct rte_crypto_sym_xform *xfor
sess_priv->cpt_inst_w7 = cnxk_cpt_inst_w7_get(sess_priv, roc_cpt);
- if (roc_errata_cpt_hang_on_mixed_ctx_val())
+ if (hw_ctx_cache_enable())
roc_se_ctx_init(&sess_priv->roc_se_ctx);
return 0;
@@ -755,7 +755,7 @@ sym_session_clear(struct rte_cryptodev_sym_session *sess, bool is_session_less)
struct cnxk_se_sess *sess_priv = (struct cnxk_se_sess *)sess;
/* Trigger CTX flush + invalidate to remove from CTX_CACHE */
- if (roc_errata_cpt_hang_on_mixed_ctx_val())
+ if (hw_ctx_cache_enable())
roc_cpt_lf_ctx_flush(sess_priv->lf, &sess_priv->roc_se_ctx.se_ctx, true);
if (sess_priv->roc_se_ctx.auth_key != NULL)
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index b1a40e8e25..6ee4cbda70 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -13,6 +13,7 @@
#include "roc_constants.h"
#include "roc_cpt.h"
#include "roc_cpt_sg.h"
+#include "roc_errata.h"
#include "roc_se.h"
#define CNXK_CPT_MIN_HEADROOM_REQ 32
@@ -180,4 +181,11 @@ alloc_op_meta(struct roc_se_buf_ptr *buf, int32_t len, struct rte_mempool *cpt_m
return mdata;
}
+
+static __rte_always_inline bool
+hw_ctx_cache_enable(void)
+{
+ return roc_errata_cpt_hang_on_mixed_ctx_val() || roc_model_is_cn10ka_b0() ||
+ roc_model_is_cn10kb_a0();
+}
#endif /* _CNXK_CRYPTODEV_OPS_H_ */
--
2.25.1
next prev parent reply other threads:[~2023-06-20 10:21 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-20 10:20 [PATCH v3 0/8] fixes and improvements to CNXK crypto PMD Tejasree Kondoj
2023-06-20 10:20 ` [PATCH v3 1/8] crypto/cnxk: check for null pointer Tejasree Kondoj
2023-06-20 10:21 ` [PATCH v3 2/8] crypto/cnxk: remove packet length checks in crypto offload Tejasree Kondoj
2023-06-20 10:21 ` [PATCH v3 3/8] crypto/cnxk: use pt inst for null cipher with null auth Tejasree Kondoj
2023-06-20 10:21 ` Tejasree Kondoj [this message]
2023-06-20 10:21 ` [PATCH v3 5/8] crypto/cnxk: add support for raw APIs Tejasree Kondoj
2023-06-23 14:25 ` Thomas Monjalon
2023-06-20 10:21 ` [PATCH v3 6/8] test/crypto: enable raw crypto tests for crypto_cn10k Tejasree Kondoj
2023-06-20 10:21 ` [PATCH v3 7/8] crypto/cnxk: add support for sm4 Tejasree Kondoj
2023-06-20 10:21 ` [PATCH v3 8/8] crypto/cnxk: fix order of ECFPM parameters Tejasree Kondoj
2023-06-20 10:26 ` [PATCH v3 0/8] fixes and improvements to CNXK crypto PMD Akhil Goyal
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