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([10.237.222.80]) by orsmga003.jf.intel.com with ESMTP; 23 Jun 2023 06:51:10 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Kai Ji Subject: [PATCH v2] crypto/qat: fix NULL algorithm digest placement Date: Fri, 23 Jun 2023 13:51:04 +0000 Message-Id: <20230623135105.1377882-1-ciara.power@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230621144022.1187874-1-ciara.power@intel.com> References: <20230621144022.1187874-1-ciara.power@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org QAT HW generates bytes of 0x00 digest, even when a digest of len 0 is requested for NULL. This caused test failures when the test vector had digest len 0, as the buffer has unexpected changed bytes. By placing the digest into the cookie for NULL authentication, the buffer remains unchanged as expected, and the digest is placed to the side, as it won't be used anyway. Fixes: db0e952a5c01 ("crypto/qat: add NULL capability") Signed-off-by: Ciara Power --- v2: added fixes line as this was a bug --- drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 2 +- drivers/crypto/qat/dev/qat_crypto_pmd_gens.h | 18 ++++++++++++++---- drivers/crypto/qat/dev/qat_sym_pmd_gen1.c | 4 ++-- drivers/crypto/qat/qat_sym.c | 5 +++++ drivers/crypto/qat/qat_sym.h | 2 ++ 5 files changed, 24 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c index 6013fed721..033de55cc2 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c @@ -419,7 +419,7 @@ qat_sym_build_op_auth_gen3(void *in_op, struct qat_sym_session *ctx, rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); ofs.raw = qat_sym_convert_op_to_vec_auth(op, ctx, &in_sgl, &out_sgl, - NULL, &auth_iv, &digest); + NULL, &auth_iv, &digest, op_cookie); if (unlikely(ofs.raw == UINT64_MAX)) { op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; return -EINVAL; diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h index e8e92e22d4..64fdd47d1a 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h @@ -290,7 +290,8 @@ qat_sym_convert_op_to_vec_auth(struct rte_crypto_op *op, struct rte_crypto_sgl *in_sgl, struct rte_crypto_sgl *out_sgl, struct rte_crypto_va_iova_ptr *cipher_iv __rte_unused, struct rte_crypto_va_iova_ptr *auth_iv, - struct rte_crypto_va_iova_ptr *digest) + struct rte_crypto_va_iova_ptr *digest, + struct qat_sym_op_cookie *cookie) { uint32_t auth_ofs = 0, auth_len = 0; int n_src, ret; @@ -355,7 +356,11 @@ qat_sym_convert_op_to_vec_auth(struct rte_crypto_op *op, out_sgl->num = 0; digest->va = (void *)op->sym->auth.digest.data; - digest->iova = op->sym->auth.digest.phys_addr; + + if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_NULL) + digest->iova = cookie->digest_null_phys_addr; + else + digest->iova = op->sym->auth.digest.phys_addr; return 0; } @@ -366,7 +371,8 @@ qat_sym_convert_op_to_vec_chain(struct rte_crypto_op *op, struct rte_crypto_sgl *in_sgl, struct rte_crypto_sgl *out_sgl, struct rte_crypto_va_iova_ptr *cipher_iv, struct rte_crypto_va_iova_ptr *auth_iv_or_aad, - struct rte_crypto_va_iova_ptr *digest) + struct rte_crypto_va_iova_ptr *digest, + struct qat_sym_op_cookie *cookie) { union rte_crypto_sym_ofs ofs; uint32_t max_len = 0; @@ -390,7 +396,11 @@ qat_sym_convert_op_to_vec_chain(struct rte_crypto_op *op, auth_iv_or_aad->iova = rte_crypto_op_ctophys_offset(op, ctx->auth_iv.offset); digest->va = (void *)op->sym->auth.digest.data; - digest->iova = op->sym->auth.digest.phys_addr; + + if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_NULL) + digest->iova = cookie->digest_null_phys_addr; + else + digest->iova = op->sym->auth.digest.phys_addr; ret = qat_cipher_is_len_in_bits(ctx, op); switch (ret) { diff --git a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c index 590eaa0057..b82d0575f8 100644 --- a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c +++ b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c @@ -274,7 +274,7 @@ qat_sym_build_op_auth_gen1(void *in_op, struct qat_sym_session *ctx, rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); ofs.raw = qat_sym_convert_op_to_vec_auth(op, ctx, &in_sgl, &out_sgl, - NULL, &auth_iv, &digest); + NULL, &auth_iv, &digest, op_cookie); if (unlikely(ofs.raw == UINT64_MAX)) { op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; return -EINVAL; @@ -368,7 +368,7 @@ qat_sym_build_op_chain_gen1(void *in_op, struct qat_sym_session *ctx, rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); ofs.raw = qat_sym_convert_op_to_vec_chain(op, ctx, &in_sgl, &out_sgl, - &cipher_iv, &auth_iv, &digest); + &cipher_iv, &auth_iv, &digest, cookie); if (unlikely(ofs.raw == UINT64_MAX)) { op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; return -EINVAL; diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c index 345c845325..aa21825c7f 100644 --- a/drivers/crypto/qat/qat_sym.c +++ b/drivers/crypto/qat/qat_sym.c @@ -51,6 +51,11 @@ qat_sym_init_op_cookie(void *op_cookie) rte_mempool_virt2iova(cookie) + offsetof(struct qat_sym_op_cookie, opt.spc_gmac.cd_cipher); + + cookie->digest_null_phys_addr = + rte_mempool_virt2iova(cookie) + + offsetof(struct qat_sym_op_cookie, + digest_null); } static __rte_always_inline int diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h index 3d841d0eba..99f3fd7a14 100644 --- a/drivers/crypto/qat/qat_sym.h +++ b/drivers/crypto/qat/qat_sym.h @@ -117,6 +117,8 @@ struct qat_sym_op_cookie { phys_addr_t cd_phys_addr; } spc_gmac; } opt; + uint8_t digest_null[4]; + phys_addr_t digest_null_phys_addr; }; struct qat_sym_dp_ctx { -- 2.25.1