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Thu, 29 Jun 2023 00:22:03 -0700 From: Itamar Gozlan To: , , , , , Ori Kam CC: Subject: [PATCH 5/5] net/mlx5/hws: support default miss action on FDB Date: Thu, 29 Jun 2023 10:21:25 +0300 Message-ID: <20230629072125.20369-5-igozlan@nvidia.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20230629072125.20369-1-igozlan@nvidia.com> References: <20230629072125.20369-1-igozlan@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT063:EE_|DM6PR12MB4337:EE_ X-MS-Office365-Filtering-Correlation-Id: 9477b5a8-efdd-4364-2b16-08db78719575 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: w+XCHmutxpzEWYWao5eUpOQWXS2L7YGjqyQIbbaxz0IwenQXKKApf7bk5qo3+EpcLEzu4CzeGlpjWr0a4FsICwkYWYyh9NNm9vSi1PQSGUIPpaxAZBRDhbDPTsYvk7AIq+dZs8mJZlMI6kik1KrrKB3/8e4HRNS+5JC48zMWEZl7pgM1HJjZD+LXF60Unkv1UBld/gsMEfDMra+6nYUjItRINQ1YcsxByFO9Q0pXp4MNd2iOSBe3mnyAE1P+IQnC/3QXNp/VrfwkA+5UgnNxv1z5Ow4zqOspfiLBrNy6tV92SKKvnwnCBZQpMO4HSwfr7rHWa7xYJB0lJ9un4103HOgKJ41MMpY24dtHKwVXMmGIV7FVjxp17ZebR1VhLt1/Ao0u8laXuSqLrREmasPK3I3wjgoN0zIWjgjngJPxTObmsg2c90VmGoCRzBanvCjEPe6jtXw4nn7dywA1WUzD2tjmTNY6oQF4aI51dLim9rrMTv1q9r/qe3V8Rk2cx/LPc2kj8HQbPwiHg2ZAZV2poTWQA/FznrRdpxkHO29WXP9Ik7xJU87xs7IigXdQlz1YoLhPNIJssPSn7n4g9szFndybWfTU/Ig5uHqxhTMZwmhLtb7aPW5OnbACsduTnAmLUe468qbdMbnSHbw4SomAsy8SMzdvygSJRJ5xcQx8sankTvEyclzhMYUXeeBmRbOee1BmL9tf2sgPdOTkGODrzKyWeZRia0fTfoewLWprtKs= X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230028)(4636009)(396003)(39860400002)(376002)(136003)(346002)(451199021)(46966006)(40470700004)(36840700001)(40460700003)(426003)(110136005)(82310400005)(7696005)(82740400003)(2616005)(6666004)(7636003)(83380400001)(356005)(6286002)(186003)(336012)(47076005)(36860700001)(55016003)(26005)(41300700001)(40480700001)(86362001)(2906002)(316002)(6636002)(70206006)(4326008)(8936002)(70586007)(36756003)(1076003)(5660300002)(8676002)(478600001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jun 2023 07:22:23.5147 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9477b5a8-efdd-4364-2b16-08db78719575 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT063.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4337 X-Mailman-Approved-At: Thu, 29 Jun 2023 09:26:43 +0200 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Alex Vesker Add the support for default miss on HWS FDB, this implementation was missing until now. Default miss can be used for more efficient miss flow instead of going to an empty matcher or some defecated empty table. Signed-off-by: Alex Vesker --- drivers/net/mlx5/hws/mlx5dr_table.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/net/mlx5/hws/mlx5dr_table.c b/drivers/net/mlx5/hws/mlx5dr_table.c index c18ee7c552..fd5b54ff0b 100644 --- a/drivers/net/mlx5/hws/mlx5dr_table.c +++ b/drivers/net/mlx5/hws/mlx5dr_table.c @@ -24,7 +24,6 @@ mlx5dr_table_up_default_fdb_miss_tbl(struct mlx5dr_table *tbl) struct mlx5dr_cmd_forward_tbl *default_miss; struct mlx5dr_context *ctx = tbl->ctx; uint8_t tbl_type = tbl->type; - uint32_t vport; if (tbl->type != MLX5DR_TABLE_TYPE_FDB) return 0; @@ -38,12 +37,9 @@ mlx5dr_table_up_default_fdb_miss_tbl(struct mlx5dr_table *tbl) ft_attr.level = tbl->ctx->caps->fdb_ft.max_level; /* The last level */ ft_attr.rtc_valid = false; - assert(ctx->caps->eswitch_manager); - vport = ctx->caps->eswitch_manager_vport_number; - fte_attr.action_flags = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; fte_attr.destination_type = MLX5_FLOW_DESTINATION_TYPE_VPORT; - fte_attr.destination_id = vport; + fte_attr.destination_id = ctx->caps->eswitch_manager_vport_number;; default_miss = mlx5dr_cmd_forward_tbl_create(mlx5dr_context_get_local_ibv(ctx), &ft_attr, &fte_attr); -- 2.18.1