From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 956D242DDE; Thu, 6 Jul 2023 01:27:21 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6A5D340144; Thu, 6 Jul 2023 01:27:21 +0200 (CEST) Received: from mail-pf1-f169.google.com (mail-pf1-f169.google.com [209.85.210.169]) by mails.dpdk.org (Postfix) with ESMTP id 2C3D2400D5 for ; Thu, 6 Jul 2023 01:27:20 +0200 (CEST) Received: by mail-pf1-f169.google.com with SMTP id d2e1a72fcca58-666683eb028so139224b3a.0 for ; Wed, 05 Jul 2023 16:27:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20221208.gappssmtp.com; s=20221208; t=1688599639; x=1691191639; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:from:to:cc:subject:date :message-id:reply-to; bh=G7FTycoE9TdwO9cB5MDyKlu/mwXT50pbvi+NcB68yKc=; b=EabRX1T8rI59m9jTlmof1sPewDuQMf5o6tZEMh5OAWUZKkW0VIpD8VU1NfquZGjJUc DaLXL0Rk4wR5I1KnXwZ5VHb/tAZ8U9kIYWIXd+jdn57MQcjkhEZF5AT4hChGzEyRCapo o6l7pw3N7PGWeJ+Mnx1i0UTDrIOmTS/QljZQvf5DfbY5kzknufvvpiqHy6xMXYcBfEU1 u7dn6LUfp4ehMelS+RQXyAN3ESSPuzzJmFne7zsilPLRz7O58qT1LyJHjPFNdVkE3IhJ UXxT3jwfMeJtlbG6z0Wg9ncvlohBeRHLcNIhGDLoFMQifGBP5tmxefRUxiVpOj8yjffi GH9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688599639; x=1691191639; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=G7FTycoE9TdwO9cB5MDyKlu/mwXT50pbvi+NcB68yKc=; b=cJy/eCdqXtkEQ2TB7r2UGoN51ny+m2biyi4hpzA574WkUCWqR+LSyhMsf/N/kah6W7 SzVWfmBtwlT4bqRaSKOw990KSQcj+MTWNteuCmfTnh/OMkaK2PzKAXcMvOWkYb/xIuLZ TOxfvwltjDU2CLpWvYumK2N4nSWGjIZQj3EAPYYiZR4eat1ZXi3pVUIgWTGbxkcrNmys yEcG6z02ZKbMvy5PhS3fo2CMx/7isaQbgNEQk3eLUSpcRKA5UqUuCHlW2/nN8q9wTAy8 HUF3ix4zAbKx1Mqh/QQ6QcxvnR6YlWy+4QLkGk4yt27JAjl+SljIyKZi9Cu3TLekz5je S1SQ== X-Gm-Message-State: ABy/qLaRPLZqnOCrOWLCDglRcMdcU85naT2bBT1V/N6L+vBqGM+zGHGI UkZrRKay225uNlPbAXNn0WmS+Q== X-Google-Smtp-Source: APBJJlHmQMXSn9RzjZ2Y6t7Wla4GRqSC1G+8hlFybkoxgWjdfI1M2AtgUeUjNXWI/gUmYBCSHKC4vQ== X-Received: by 2002:a05:6a00:2e9f:b0:668:8596:752f with SMTP id fd31-20020a056a002e9f00b006688596752fmr344682pfb.4.1688599639297; Wed, 05 Jul 2023 16:27:19 -0700 (PDT) Received: from hermes.local (204-195-120-218.wavecable.com. [204.195.120.218]) by smtp.gmail.com with ESMTPSA id u21-20020aa78395000000b006765cb32558sm65305pfm.139.2023.07.05.16.27.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jul 2023 16:27:19 -0700 (PDT) Date: Wed, 5 Jul 2023 16:27:17 -0700 From: Stephen Hemminger To: Vladimir Ratnikov Cc: hkalra@marvell.com, dev@dpdk.org, Junfeng Guo , Simei Su , qi.z.zhang@intel.com, Thomas Monjalon Subject: Re: [PATCH] eal/interrupts: Allow UIO interrupts when using igb_uio Message-ID: <20230705162717.4f191cd5@hermes.local> In-Reply-To: References: <20230614134018.2344-1-vratnikov@netgate.com> <20230614094638.2649366f@hermes.local> <8278146.NyiUUSuA9g@thomas> <20230704085530.1cf47bc7@hermes.local> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Tue, 4 Jul 2023 20:19:05 +0200 Vladimir Ratnikov wrote: > On systems with I225 interfaces it works in interrupt mode(rx), so not only > LSE interrupts are supported. > I could try add rte_intr_cap_single functionality and recheck it twice(if > several interfaces works in rx_mode=interrupt) > But actually it worked with changes above(CPU utilization close to the > zero, data passes through the interface etc) > But this will cause mess with other devices. For example igb has code that does: /* check and configure queue intr-vector mapping */ if ((rte_intr_cap_multiple(intr_handle) || !RTE_ETH_DEV_SRIOV(dev).active) && dev->data->dev_conf.intr_conf.rxq != 0) { intr_vector = dev->data->nb_rx_queues; if (rte_intr_efd_enable(intr_handle, intr_vector)) return -1; } /* Allocate the vector list */ if (rte_intr_dp_is_en(intr_handle)) { if (rte_intr_vec_list_alloc(intr_handle, "intr_vec", dev->data->nb_rx_queues)) { PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues" " intr_vec", dev->data->nb_rx_queues); return -ENOMEM; } } /* configure MSI-X for Rx interrupt */ eth_igb_configure_msix_intr(dev); MSI-X won't work with igb_uio because the interrupt vector region is not shared with userspace.