From: beilei.xing@intel.com
To: jingjing.wu@intel.com, mingxia.liu@intel.com
Cc: dev@dpdk.org, Beilei Xing <beilei.xing@intel.com>
Subject: [PATCH 09/19] net/cpfl: update vport info before creating representor
Date: Wed, 9 Aug 2023 15:51:24 +0000 [thread overview]
Message-ID: <20230809155134.539287-10-beilei.xing@intel.com> (raw)
In-Reply-To: <20230809155134.539287-1-beilei.xing@intel.com>
From: Beilei Xing <beilei.xing@intel.com>
Get port representor's vport list and update vport_map_hash
before creating the port representor.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
drivers/net/cpfl/cpfl_ethdev.c | 2 +-
drivers/net/cpfl/cpfl_ethdev.h | 3 +
drivers/net/cpfl/cpfl_representor.c | 124 ++++++++++++++++++++++++++++
3 files changed, 128 insertions(+), 1 deletion(-)
diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c
index 949a2c8069..fc0ebc6fb7 100644
--- a/drivers/net/cpfl/cpfl_ethdev.c
+++ b/drivers/net/cpfl/cpfl_ethdev.c
@@ -1633,7 +1633,7 @@ cpfl_handle_event_msg(struct idpf_vport *vport, uint8_t *msg, uint16_t msglen)
}
}
-static int
+int
cpfl_vport_info_create(struct cpfl_adapter_ext *adapter,
struct cpfl_vport_id *vport_identity,
struct cpchnl2_vport_info *vport_info)
diff --git a/drivers/net/cpfl/cpfl_ethdev.h b/drivers/net/cpfl/cpfl_ethdev.h
index 4b8c0da632..9cc96839ed 100644
--- a/drivers/net/cpfl/cpfl_ethdev.h
+++ b/drivers/net/cpfl/cpfl_ethdev.h
@@ -189,6 +189,9 @@ struct cpfl_adapter_ext {
TAILQ_HEAD(cpfl_adapter_list, cpfl_adapter_ext);
+int cpfl_vport_info_create(struct cpfl_adapter_ext *adapter,
+ struct cpfl_vport_id *vport_identity,
+ struct cpchnl2_vport_info *vport_info);
int cpfl_cc_vport_list_get(struct cpfl_adapter_ext *adapter,
struct cpfl_vport_id *vi,
struct cpchnl2_get_vport_list_response *response);
diff --git a/drivers/net/cpfl/cpfl_representor.c b/drivers/net/cpfl/cpfl_representor.c
index 4d91d7311d..dcc01d0669 100644
--- a/drivers/net/cpfl/cpfl_representor.c
+++ b/drivers/net/cpfl/cpfl_representor.c
@@ -368,6 +368,86 @@ match_repr_with_vport(const struct cpfl_repr_id *repr_id,
return false;
}
+static int
+cpfl_repr_vport_list_query(struct cpfl_adapter_ext *adapter,
+ const struct cpfl_repr_id *repr_id,
+ struct cpchnl2_get_vport_list_response *response)
+{
+ struct cpfl_vport_id vi;
+ int ret;
+
+ if (repr_id->type == RTE_ETH_REPRESENTOR_PF) {
+ /* PF */
+ vi.func_type = CPCHNL2_FUNC_TYPE_PF;
+ vi.pf_id = cpfl_func_id_get(repr_id->host_id, repr_id->pf_id);
+ vi.vf_id = 0;
+ } else {
+ /* VF */
+ vi.func_type = CPCHNL2_FUNC_TYPE_SRIOV;
+ vi.pf_id = HOST0_APF;
+ vi.vf_id = repr_id->vf_id;
+ }
+
+ ret = cpfl_cc_vport_list_get(adapter, &vi, response);
+
+ return ret;
+}
+
+static int
+cpfl_repr_vport_info_query(struct cpfl_adapter_ext *adapter,
+ const struct cpfl_repr_id *repr_id,
+ struct cpchnl2_vport_id *vport_id,
+ struct cpchnl2_get_vport_info_response *response)
+{
+ struct cpfl_vport_id vi;
+ int ret;
+
+ if (repr_id->type == RTE_ETH_REPRESENTOR_PF) {
+ /* PF */
+ vi.func_type = CPCHNL2_FUNC_TYPE_PF;
+ vi.pf_id = cpfl_func_id_get(repr_id->host_id, repr_id->pf_id);
+ vi.vf_id = 0;
+ } else {
+ /* VF */
+ vi.func_type = CPCHNL2_FUNC_TYPE_SRIOV;
+ vi.pf_id = HOST0_APF;
+ vi.vf_id = repr_id->vf_id;
+ }
+
+ ret = cpfl_cc_vport_info_get(adapter, vport_id, &vi, response);
+
+ return ret;
+}
+
+static int
+cpfl_repr_vport_map_update(struct cpfl_adapter_ext *adapter,
+ const struct cpfl_repr_id *repr_id, uint32_t vport_id,
+ struct cpchnl2_get_vport_info_response *response)
+{
+ struct cpfl_vport_id vi;
+ int ret;
+
+ vi.vport_id = vport_id;
+ if (repr_id->type == RTE_ETH_REPRESENTOR_PF) {
+ /* PF */
+ vi.func_type = CPCHNL2_FUNC_TYPE_PF;
+ vi.pf_id = cpfl_func_id_get(repr_id->host_id, repr_id->pf_id);
+ } else {
+ /* VF */
+ vi.func_type = CPCHNL2_FUNC_TYPE_SRIOV;
+ vi.pf_id = HOST0_APF;
+ vi.vf_id = repr_id->vf_id;
+ }
+
+ ret = cpfl_vport_info_create(adapter, &vi, &response->info);
+ if (ret != 0) {
+ PMD_INIT_LOG(ERR, "Fail to update vport map hash for representor.");
+ return ret;
+ }
+
+ return 0;
+}
+
int
cpfl_repr_create(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *adapter)
{
@@ -375,8 +455,14 @@ cpfl_repr_create(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *adapte
uint32_t iter = 0;
const struct cpfl_repr_id *repr_id;
const struct cpfl_vport_id *vp_id;
+ struct cpchnl2_get_vport_list_response *vlist_resp;
+ struct cpchnl2_get_vport_info_response vinfo_resp;
int ret;
+ vlist_resp = rte_zmalloc(NULL, IDPF_DFLT_MBX_BUF_SIZE, 0);
+ if (vlist_resp == NULL)
+ return -ENOMEM;
+
rte_spinlock_lock(&adapter->repr_lock);
while (rte_hash_iterate(adapter->repr_whitelist_hash,
@@ -385,6 +471,7 @@ cpfl_repr_create(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *adapte
char name[RTE_ETH_NAME_MAX_LEN];
uint32_t iter_iter = 0;
bool matched;
+ int i;
/* skip representor already be created */
if (dev != NULL)
@@ -402,6 +489,41 @@ cpfl_repr_create(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *adapte
repr_id->host_id,
repr_id->pf_id);
+ /* get vport list for the port representor */
+ ret = cpfl_repr_vport_list_query(adapter, repr_id, vlist_resp);
+ if (ret != 0) {
+ PMD_INIT_LOG(ERR, "Failed to get host%d pf%d vf%d's vport list",
+ repr_id->host_id, repr_id->pf_id, repr_id->vf_id);
+ rte_spinlock_unlock(&adapter->repr_lock);
+ rte_free(vlist_resp);
+ return ret;
+ }
+
+ /* get all vport info for the port representor */
+ for (i = 0; i < vlist_resp->nof_vports; i++) {
+ ret = cpfl_repr_vport_info_query(adapter, repr_id,
+ &vlist_resp->vports[i], &vinfo_resp);
+ if (ret != 0) {
+ PMD_INIT_LOG(ERR, "Failed to get host%d pf%d vf%d vport[%d]'s info",
+ repr_id->host_id, repr_id->pf_id, repr_id->vf_id,
+ vlist_resp->vports[i].vport_id);
+ rte_spinlock_unlock(&adapter->repr_lock);
+ rte_free(vlist_resp);
+ return ret;
+ }
+
+ ret = cpfl_repr_vport_map_update(adapter, repr_id,
+ vlist_resp->vports[i].vport_id, &vinfo_resp);
+ if (ret != 0) {
+ PMD_INIT_LOG(ERR, "Failed to update host%d pf%d vf%d vport[%d]'s info to vport_map_hash",
+ repr_id->host_id, repr_id->pf_id, repr_id->vf_id,
+ vlist_resp->vports[i].vport_id);
+ rte_spinlock_unlock(&adapter->repr_lock);
+ rte_free(vlist_resp);
+ return ret;
+ }
+ }
+
/* find a matched vport */
rte_spinlock_lock(&adapter->vport_map_lock);
@@ -428,6 +550,7 @@ cpfl_repr_create(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *adapte
PMD_INIT_LOG(ERR, "Failed to create representor %s", name);
rte_spinlock_unlock(&adapter->vport_map_lock);
rte_spinlock_unlock(&adapter->repr_lock);
+ rte_free(vlist_resp);
return ret;
}
break;
@@ -443,6 +566,7 @@ cpfl_repr_create(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *adapte
}
rte_spinlock_unlock(&adapter->repr_lock);
+ rte_free(vlist_resp);
return 0;
}
--
2.34.1
next prev parent reply other threads:[~2023-08-09 7:34 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-09 15:51 [PATCH 00/19] net/cpfl: support port representor beilei.xing
2023-08-09 15:51 ` [PATCH 01/19] net/cpfl: refine devargs parse and process beilei.xing
2023-08-09 15:51 ` [PATCH 02/19] net/cpfl: introduce interface structure beilei.xing
2023-08-09 15:51 ` [PATCH 03/19] net/cpfl: add cp channel beilei.xing
2023-08-09 15:51 ` [PATCH 04/19] net/cpfl: enable vport mapping beilei.xing
2023-08-09 15:51 ` [PATCH 05/19] net/cpfl: parse representor devargs beilei.xing
2023-08-09 15:51 ` [PATCH 06/19] net/cpfl: support probe again beilei.xing
2023-08-09 15:51 ` [PATCH 07/19] net/cpfl: create port representor beilei.xing
2023-08-09 15:51 ` [PATCH 08/19] net/cpfl: support vport list/info get beilei.xing
2023-08-09 15:51 ` beilei.xing [this message]
2023-08-09 15:51 ` [PATCH 10/19] net/cpfl: refine handle virtual channel message beilei.xing
2023-08-09 15:51 ` [PATCH 11/19] net/cpfl: add exceptional vport beilei.xing
2023-08-09 15:51 ` [PATCH 12/19] net/cpfl: support representor Rx/Tx queue setup beilei.xing
2023-08-09 15:51 ` [PATCH 13/19] net/cpfl: support link update for representor beilei.xing
2023-08-09 15:51 ` [PATCH 14/19] net/cpfl: add stats ops " beilei.xing
2023-08-09 15:51 ` [PATCH 15/19] common/idpf: refine inline function beilei.xing
2023-08-09 15:51 ` [PATCH 16/19] net/cpfl: support representor data path beilei.xing
2023-08-09 15:51 ` [PATCH 17/19] net/cpfl: support dispatch process beilei.xing
2023-08-09 15:51 ` [PATCH 18/19] net/cpfl: add dispatch service beilei.xing
2023-08-09 15:51 ` [PATCH 19/19] doc: update release notes for representor beilei.xing
2023-08-16 15:05 ` [PATCH v2 00/12] net/cpfl: support port representor beilei.xing
2023-08-16 15:05 ` [PATCH v2 01/12] net/cpfl: refine devargs parse and process beilei.xing
2023-08-16 15:05 ` [PATCH v2 02/12] net/cpfl: introduce interface structure beilei.xing
2023-08-16 15:05 ` [PATCH v2 03/12] net/cpfl: add cp channel beilei.xing
2023-08-16 15:05 ` [PATCH v2 04/12] net/cpfl: enable vport mapping beilei.xing
2023-08-16 15:05 ` [PATCH v2 05/12] net/cpfl: parse representor devargs beilei.xing
2023-08-16 15:05 ` [PATCH v2 06/12] net/cpfl: support probe again beilei.xing
2023-08-16 15:05 ` [PATCH v2 07/12] net/cpfl: create port representor beilei.xing
2023-09-05 7:35 ` Liu, Mingxia
2023-09-05 8:30 ` Liu, Mingxia
2023-08-16 15:05 ` [PATCH v2 08/12] net/cpfl: support vport list/info get beilei.xing
2023-08-16 15:05 ` [PATCH v2 09/12] net/cpfl: update vport info before creating representor beilei.xing
2023-09-06 2:33 ` Liu, Mingxia
2023-08-16 15:05 ` [PATCH v2 10/12] net/cpfl: refine handle virtual channel message beilei.xing
2023-08-16 15:05 ` [PATCH v2 11/12] net/cpfl: support link update for representor beilei.xing
2023-08-16 15:05 ` [PATCH v2 12/12] net/cpfl: support Rx/Tx queue setup " beilei.xing
2023-09-06 3:02 ` Liu, Mingxia
2023-09-07 15:15 ` [PATCH v3 00/11] net/cpfl: support port representor beilei.xing
2023-09-07 15:15 ` [PATCH v3 01/11] net/cpfl: refine devargs parse and process beilei.xing
2023-09-07 15:15 ` [PATCH v3 02/11] net/cpfl: introduce interface structure beilei.xing
2023-09-07 15:15 ` [PATCH v3 03/11] net/cpfl: refine handle virtual channel message beilei.xing
2023-09-07 15:15 ` [PATCH v3 04/11] net/cpfl: introduce CP channel API beilei.xing
2023-09-07 15:16 ` [PATCH v3 05/11] net/cpfl: enable vport mapping beilei.xing
2023-09-07 15:16 ` [PATCH v3 06/11] net/cpfl: parse representor devargs beilei.xing
2023-09-07 15:16 ` [PATCH v3 07/11] net/cpfl: support probe again beilei.xing
2023-09-07 15:16 ` [PATCH v3 08/11] net/cpfl: create port representor beilei.xing
2023-09-07 15:16 ` [PATCH v3 09/11] net/cpfl: support vport list/info get beilei.xing
2023-09-07 15:16 ` [PATCH v3 10/11] net/cpfl: update vport info before creating representor beilei.xing
2023-09-07 15:16 ` [PATCH v3 11/11] net/cpfl: support link update for representor beilei.xing
2023-09-08 11:16 ` [PATCH v4 00/10] net/cpfl: support port representor beilei.xing
2023-09-08 11:16 ` [PATCH v4 01/10] net/cpfl: refine devargs parse and process beilei.xing
2023-09-08 11:16 ` [PATCH v4 02/10] net/cpfl: introduce interface structure beilei.xing
2023-09-09 2:08 ` Wu, Jingjing
2023-09-08 11:16 ` [PATCH v4 03/10] net/cpfl: refine handle virtual channel message beilei.xing
2023-09-09 2:13 ` Wu, Jingjing
2023-09-08 11:16 ` [PATCH v4 04/10] net/cpfl: introduce CP channel API beilei.xing
2023-09-08 11:16 ` [PATCH v4 05/10] net/cpfl: enable vport mapping beilei.xing
2023-09-08 11:16 ` [PATCH v4 06/10] net/cpfl: parse representor devargs beilei.xing
2023-09-08 11:16 ` [PATCH v4 07/10] net/cpfl: support probe again beilei.xing
2023-09-08 11:16 ` [PATCH v4 08/10] net/cpfl: support vport list/info get beilei.xing
2023-09-09 2:34 ` Wu, Jingjing
2023-09-08 11:17 ` [PATCH v4 09/10] net/cpfl: create port representor beilei.xing
2023-09-09 3:04 ` Wu, Jingjing
2023-09-08 11:17 ` [PATCH v4 10/10] net/cpfl: support link update for representor beilei.xing
2023-09-09 3:05 ` Wu, Jingjing
2023-09-12 16:26 ` [PATCH v5 00/10] net/cpfl: support port representor beilei.xing
2023-09-12 16:26 ` [PATCH v5 01/10] net/cpfl: refine devargs parse and process beilei.xing
2023-09-12 16:26 ` [PATCH v5 02/10] net/cpfl: introduce interface structure beilei.xing
2023-09-12 16:26 ` [PATCH v5 03/10] net/cpfl: refine handle virtual channel message beilei.xing
2023-09-12 16:26 ` [PATCH v5 04/10] net/cpfl: introduce CP channel API beilei.xing
2023-09-12 16:26 ` [PATCH v5 05/10] net/cpfl: enable vport mapping beilei.xing
2023-09-12 16:26 ` [PATCH v5 06/10] net/cpfl: support vport list/info get beilei.xing
2023-09-12 16:26 ` [PATCH v5 07/10] net/cpfl: parse representor devargs beilei.xing
2023-09-12 16:26 ` [PATCH v5 08/10] net/cpfl: support probe again beilei.xing
2023-09-12 16:26 ` [PATCH v5 09/10] net/cpfl: create port representor beilei.xing
2023-09-12 16:26 ` [PATCH v5 10/10] net/cpfl: support link update for representor beilei.xing
2023-09-12 17:30 ` [PATCH v6 00/10] net/cpfl: support port representor beilei.xing
2023-09-12 17:30 ` [PATCH v6 01/10] net/cpfl: refine devargs parse and process beilei.xing
2023-09-12 17:30 ` [PATCH v6 02/10] net/cpfl: introduce interface structure beilei.xing
2023-09-12 17:30 ` [PATCH v6 03/10] net/cpfl: refine handle virtual channel message beilei.xing
2023-09-12 17:30 ` [PATCH v6 04/10] net/cpfl: introduce CP channel API beilei.xing
2023-09-12 17:30 ` [PATCH v6 05/10] net/cpfl: enable vport mapping beilei.xing
2023-09-12 17:30 ` [PATCH v6 06/10] net/cpfl: support vport list/info get beilei.xing
2023-09-12 17:30 ` [PATCH v6 07/10] net/cpfl: parse representor devargs beilei.xing
2023-09-12 17:30 ` [PATCH v6 08/10] net/cpfl: support probe again beilei.xing
2023-09-12 17:30 ` [PATCH v6 09/10] net/cpfl: create port representor beilei.xing
2023-09-12 17:30 ` [PATCH v6 10/10] net/cpfl: support link update for representor beilei.xing
2023-09-13 1:01 ` [PATCH v6 00/10] net/cpfl: support port representor Wu, Jingjing
2023-09-13 5:41 ` Zhang, Qi Z
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