From: Amit Prakash Shukla <amitprakashs@marvell.com>
To: Vamsi Attunuru <vattunuru@marvell.com>
Cc: <dev@dpdk.org>, <jerinj@marvell.com>,
Amit Prakash Shukla <amitprakashs@marvell.com>,
Radha Mohan Chintakuntla <radhac@marvell.com>
Subject: [PATCH v4 5/8] dma/cnxk: increase vchan per queue to max 4
Date: Mon, 21 Aug 2023 23:19:39 +0530 [thread overview]
Message-ID: <20230821174942.3165191-5-amitprakashs@marvell.com> (raw)
In-Reply-To: <20230821174942.3165191-1-amitprakashs@marvell.com>
To support multiple directions in same queue make use of multiple vchan
per queue. Each vchan can be configured in some direction and used.
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.
v3:
- Resolved review suggestions.
- Code improvement.
v4:
- Resolved checkpatch warnings.
drivers/dma/cnxk/cnxk_dmadev.c | 68 +++++++++++++++-------------------
drivers/dma/cnxk/cnxk_dmadev.h | 11 +++---
2 files changed, 36 insertions(+), 43 deletions(-)
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index d8cfb98cd7..7d83b70e8b 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -22,8 +22,8 @@ cnxk_dmadev_info_get(const struct rte_dma_dev *dev, struct rte_dma_info *dev_inf
RTE_SET_USED(dev);
RTE_SET_USED(size);
- dev_info->max_vchans = 1;
- dev_info->nb_vchans = 1;
+ dev_info->max_vchans = MAX_VCHANS_PER_QUEUE;
+ dev_info->nb_vchans = MAX_VCHANS_PER_QUEUE;
dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM | RTE_DMA_CAPA_MEM_TO_DEV |
RTE_DMA_CAPA_DEV_TO_MEM | RTE_DMA_CAPA_DEV_TO_DEV |
RTE_DMA_CAPA_OPS_COPY | RTE_DMA_CAPA_OPS_COPY_SG;
@@ -65,13 +65,12 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
const struct rte_dma_vchan_conf *conf, uint32_t conf_sz)
{
struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
- struct cnxk_dpi_conf *dpi_conf = &dpivf->conf;
+ struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
union dpi_instr_hdr_s *header = &dpi_conf->hdr;
uint16_t max_desc;
uint32_t size;
int i;
- RTE_SET_USED(vchan);
RTE_SET_USED(conf_sz);
if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG)
@@ -149,13 +148,12 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
const struct rte_dma_vchan_conf *conf, uint32_t conf_sz)
{
struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
- struct cnxk_dpi_conf *dpi_conf = &dpivf->conf;
+ struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
union dpi_instr_hdr_s *header = &dpi_conf->hdr;
uint16_t max_desc;
uint32_t size;
int i;
- RTE_SET_USED(vchan);
RTE_SET_USED(conf_sz);
if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG)
@@ -360,18 +358,17 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, rte_iova_t d
uint64_t flags)
{
struct cnxk_dpi_vf_s *dpivf = dev_private;
- union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+ union dpi_instr_hdr_s *header = &dpi_conf->hdr;
struct cnxk_dpi_compl_s *comp_ptr;
uint64_t cmd[DPI_MAX_CMD_SIZE];
rte_iova_t fptr, lptr;
int num_words = 0;
int rc;
- RTE_SET_USED(vchan);
-
- comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+ comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
header->cn9k.ptr = (uint64_t)comp_ptr;
- STRM_INC(dpivf->conf.c_desc, tail);
+ STRM_INC(dpi_conf->c_desc, tail);
header->cn9k.nfst = 1;
header->cn9k.nlst = 1;
@@ -400,7 +397,7 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, rte_iova_t d
rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
if (unlikely(rc)) {
- STRM_DEC(dpivf->conf.c_desc, tail);
+ STRM_DEC(dpi_conf->c_desc, tail);
return rc;
}
@@ -421,18 +418,17 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge
const struct rte_dma_sge *dst, uint16_t nb_src, uint16_t nb_dst, uint64_t flags)
{
struct cnxk_dpi_vf_s *dpivf = dev_private;
- union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+ union dpi_instr_hdr_s *header = &dpi_conf->hdr;
const struct rte_dma_sge *fptr, *lptr;
struct cnxk_dpi_compl_s *comp_ptr;
uint64_t cmd[DPI_MAX_CMD_SIZE];
int num_words = 0;
int i, rc;
- RTE_SET_USED(vchan);
-
- comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+ comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
header->cn9k.ptr = (uint64_t)comp_ptr;
- STRM_INC(dpivf->conf.c_desc, tail);
+ STRM_INC(dpi_conf->c_desc, tail);
/*
* For inbound case, src pointers are last pointers.
@@ -468,7 +464,7 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge
rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
if (unlikely(rc)) {
- STRM_DEC(dpivf->conf.c_desc, tail);
+ STRM_DEC(dpi_conf->c_desc, tail);
return rc;
}
@@ -489,18 +485,17 @@ cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, rte_iova_t
uint32_t length, uint64_t flags)
{
struct cnxk_dpi_vf_s *dpivf = dev_private;
- union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+ union dpi_instr_hdr_s *header = &dpi_conf->hdr;
struct cnxk_dpi_compl_s *comp_ptr;
uint64_t cmd[DPI_MAX_CMD_SIZE];
rte_iova_t fptr, lptr;
int num_words = 0;
int rc;
- RTE_SET_USED(vchan);
-
- comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+ comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
header->cn10k.ptr = (uint64_t)comp_ptr;
- STRM_INC(dpivf->conf.c_desc, tail);
+ STRM_INC(dpi_conf->c_desc, tail);
header->cn10k.nfst = 1;
header->cn10k.nlst = 1;
@@ -520,7 +515,7 @@ cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, rte_iova_t
rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
if (unlikely(rc)) {
- STRM_DEC(dpivf->conf.c_desc, tail);
+ STRM_DEC(dpi_conf->c_desc, tail);
return rc;
}
@@ -542,18 +537,17 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge
uint64_t flags)
{
struct cnxk_dpi_vf_s *dpivf = dev_private;
- union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+ union dpi_instr_hdr_s *header = &dpi_conf->hdr;
const struct rte_dma_sge *fptr, *lptr;
struct cnxk_dpi_compl_s *comp_ptr;
uint64_t cmd[DPI_MAX_CMD_SIZE];
int num_words = 0;
int i, rc;
- RTE_SET_USED(vchan);
-
- comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+ comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
header->cn10k.ptr = (uint64_t)comp_ptr;
- STRM_INC(dpivf->conf.c_desc, tail);
+ STRM_INC(dpi_conf->c_desc, tail);
header->cn10k.nfst = nb_src & DPI_MAX_POINTER;
header->cn10k.nlst = nb_dst & DPI_MAX_POINTER;
@@ -579,7 +573,7 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge
rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
if (unlikely(rc)) {
- STRM_DEC(dpivf->conf.c_desc, tail);
+ STRM_DEC(dpi_conf->c_desc, tail);
return rc;
}
@@ -600,12 +594,11 @@ cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t nb_cpls,
bool *has_error)
{
struct cnxk_dpi_vf_s *dpivf = dev_private;
- struct cnxk_dpi_cdesc_data_s *c_desc = &dpivf->conf.c_desc;
+ struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+ struct cnxk_dpi_cdesc_data_s *c_desc = &dpi_conf->c_desc;
struct cnxk_dpi_compl_s *comp_ptr;
int cnt;
- RTE_SET_USED(vchan);
-
for (cnt = 0; cnt < nb_cpls; cnt++) {
comp_ptr = c_desc->compl_ptr[c_desc->head];
@@ -633,11 +626,11 @@ cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan, const uint16_t n
uint16_t *last_idx, enum rte_dma_status_code *status)
{
struct cnxk_dpi_vf_s *dpivf = dev_private;
- struct cnxk_dpi_cdesc_data_s *c_desc = &dpivf->conf.c_desc;
+ struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+ struct cnxk_dpi_cdesc_data_s *c_desc = &dpi_conf->c_desc;
struct cnxk_dpi_compl_s *comp_ptr;
int cnt;
- RTE_SET_USED(vchan);
RTE_SET_USED(last_idx);
for (cnt = 0; cnt < nb_cpls; cnt++) {
@@ -663,11 +656,10 @@ static uint16_t
cnxk_damdev_burst_capacity(const void *dev_private, uint16_t vchan)
{
const struct cnxk_dpi_vf_s *dpivf = (const struct cnxk_dpi_vf_s *)dev_private;
+ const struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
uint16_t burst_cap;
- RTE_SET_USED(vchan);
-
- burst_cap = dpivf->conf.c_desc.max_cnt -
+ burst_cap = dpi_conf->c_desc.max_cnt -
((dpivf->stats.submitted - dpivf->stats.completed) + dpivf->pending) + 1;
return burst_cap;
diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h
index 9563295af0..4693960a19 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.h
+++ b/drivers/dma/cnxk/cnxk_dmadev.h
@@ -6,10 +6,11 @@
#include <roc_api.h>
-#define DPI_MAX_POINTER 15
-#define STRM_INC(s, var) ((s).var = ((s).var + 1) & (s).max_cnt)
-#define STRM_DEC(s, var) ((s).var = ((s).var - 1) == -1 ? (s).max_cnt : ((s).var - 1))
-#define DPI_MAX_DESC 1024
+#define DPI_MAX_POINTER 15
+#define STRM_INC(s, var) ((s).var = ((s).var + 1) & (s).max_cnt)
+#define STRM_DEC(s, var) ((s).var = ((s).var - 1) == -1 ? (s).max_cnt : ((s).var - 1))
+#define DPI_MAX_DESC 1024
+#define MAX_VCHANS_PER_QUEUE 4
/* Set Completion data to 0xFF when request submitted,
* upon successful request completion engine reset to completion status
@@ -39,7 +40,7 @@ struct cnxk_dpi_conf {
struct cnxk_dpi_vf_s {
struct roc_dpi rdpi;
- struct cnxk_dpi_conf conf;
+ struct cnxk_dpi_conf conf[MAX_VCHANS_PER_QUEUE];
struct rte_dma_stats stats;
uint16_t pending;
uint16_t pnum_words;
--
2.25.1
next prev parent reply other threads:[~2023-08-21 17:50 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-28 17:18 [PATCH 1/7] dma/cnxk: changes for dmadev autotest Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 2/7] drivers: changes for dmadev driver Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 3/7] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 4/7] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 5/7] dma/cnxk: increase vchan per queue to max 4 Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 6/7] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 7/7] common/cnxk: use unique name for DPI memzone Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 1/7] drivers: changes for dmadev driver Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 2/7] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 3/7] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 4/7] dma/cnxk: increase vchan per queue to max 4 Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 5/7] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 6/7] common/cnxk: use unique name for DPI memzone Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 7/7] dma/cnxk: add completion ring tail wrap check Amit Prakash Shukla
2023-08-16 8:13 ` [PATCH v2 1/7] drivers: changes for dmadev driver Jerin Jacob
2023-08-16 10:09 ` [EXT] " Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 1/8] common/cnxk: use unique name for DPI memzone Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 2/8] dma/cnxk: changes for dmadev driver Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 3/8] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 4/8] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 5/8] dma/cnxk: increase vchan per queue to max 4 Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 6/8] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 7/8] dma/cnxk: add completion ring tail wrap check Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 8/8] dma/cnxk: fix last index return value Amit Prakash Shukla
2023-08-21 13:27 ` [PATCH v3 1/8] common/cnxk: use unique name for DPI memzone Jerin Jacob
2023-08-21 17:49 ` [PATCH v4 " Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 2/8] dma/cnxk: changes for dmadev driver Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 3/8] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 4/8] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-08-21 17:49 ` Amit Prakash Shukla [this message]
2023-08-21 17:49 ` [PATCH v4 6/8] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 7/8] dma/cnxk: add completion ring tail wrap check Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 8/8] dma/cnxk: track last index return value Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 01/12] common/cnxk: use unique name for DPI memzone Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 02/12] dma/cnxk: support for burst capacity Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 03/12] dma/cnxk: set dmadev to ready state Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 04/12] dma/cnxk: flag support for dma device Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 05/12] dma/cnxk: allocate completion ring buffer Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 06/12] dma/cnxk: chunk buffer failure return code Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 07/12] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 08/12] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 09/12] dma/cnxk: increase vchan per queue to max 4 Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 10/12] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 11/12] dma/cnxk: add completion ring tail wrap check Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 12/12] dma/cnxk: track last index return value Amit Prakash Shukla
2023-08-23 15:30 ` [PATCH v5 01/12] common/cnxk: use unique name for DPI memzone Jerin Jacob
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