From: Hemant Agrawal <hemant.agrawal@nxp.com>
To: dev@dpdk.org
Cc: gakhil@marvell.com, Apeksha Gupta <apeksha.gupta@nxp.com>
Subject: [PATCH 07/12] crypto/dpaa2_sec: enhance dpaa FD FL FMT offset set
Date: Wed, 23 Aug 2023 12:38:50 +0530 [thread overview]
Message-ID: <20230823070855.27532-8-hemant.agrawal@nxp.com> (raw)
In-Reply-To: <20230823070855.27532-1-hemant.agrawal@nxp.com>
From: Apeksha Gupta <apeksha.gupta@nxp.com>
The macro DPAA2_SET_FLE_OFFSET(fle, offset) only works for masking the
offset upto with 12 bits. When the offset value is more that 12 bits,
this macro may over writing the FMT/SL/F bits which are beyond the
offset bits.
The FLE_ADDR is modified to FLE_ADDR + OFFSET, and the FLE_OFFSET
is made to 0.
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
---
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 87 +++++++--------------
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 47 +++--------
drivers/net/dpaa2/dpaa2_rxtx.c | 3 +-
3 files changed, 38 insertions(+), 99 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 0a0b7f15af..36f08afccc 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -138,16 +138,14 @@ build_proto_compound_sg_fd(dpaa2_sec_session *sess,
DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
/* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
/* o/p segs */
while (mbuf->next) {
sge->length = mbuf->data_len;
out_len += sge->length;
sge++;
mbuf = mbuf->next;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
}
/* using buf_len for last buf - so that extra data can be added */
sge->length = mbuf->buf_len - mbuf->data_off;
@@ -165,8 +163,7 @@ build_proto_compound_sg_fd(dpaa2_sec_session *sess,
DPAA2_SET_FLE_FIN(ip_fle);
/* Configure input SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
in_len += sge->length;
@@ -174,8 +171,7 @@ build_proto_compound_sg_fd(dpaa2_sec_session *sess,
/* i/p segs */
while (mbuf) {
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
in_len += sge->length;
mbuf = mbuf->next;
@@ -247,13 +243,11 @@ build_proto_compound_fd(dpaa2_sec_session *sess,
DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
/* Configure Output FLE with dst mbuf data */
- DPAA2_SET_FLE_ADDR(op_fle, DPAA2_MBUF_VADDR_TO_IOVA(dst_mbuf));
- DPAA2_SET_FLE_OFFSET(op_fle, dst_mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(op_fle, rte_pktmbuf_iova(dst_mbuf));
DPAA2_SET_FLE_LEN(op_fle, dst_mbuf->buf_len);
/* Configure Input FLE with src mbuf data */
- DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_MBUF_VADDR_TO_IOVA(src_mbuf));
- DPAA2_SET_FLE_OFFSET(ip_fle, src_mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(ip_fle, rte_pktmbuf_iova(src_mbuf));
DPAA2_SET_FLE_LEN(ip_fle, src_mbuf->pkt_len);
DPAA2_SET_FD_LEN(fd, ip_fle->length);
@@ -373,16 +367,14 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
sym_op->aead.data.length;
/* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->aead.data.offset);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + sym_op->aead.data.offset);
sge->length = mbuf->data_len - sym_op->aead.data.offset;
mbuf = mbuf->next;
/* o/p segs */
while (mbuf) {
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
mbuf = mbuf->next;
}
@@ -420,17 +412,14 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
sge++;
}
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
- mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + sym_op->aead.data.offset);
sge->length = mbuf->data_len - sym_op->aead.data.offset;
mbuf = mbuf->next;
/* i/p segs */
while (mbuf) {
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
mbuf = mbuf->next;
}
@@ -535,8 +524,7 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess,
DPAA2_SET_FLE_SG_EXT(fle);
/* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
- DPAA2_SET_FLE_OFFSET(sge, dst->data_off + sym_op->aead.data.offset);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(dst) + sym_op->aead.data.offset);
sge->length = sym_op->aead.data.length;
if (sess->dir == DIR_ENC) {
@@ -571,9 +559,7 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess,
sge++;
}
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
- DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
- sym_op->m_src->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(sym_op->m_src) + sym_op->aead.data.offset);
sge->length = sym_op->aead.data.length;
if (sess->dir == DIR_DEC) {
sge++;
@@ -666,16 +652,14 @@ build_authenc_sg_fd(dpaa2_sec_session *sess,
sym_op->cipher.data.length;
/* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->auth.data.offset);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + sym_op->auth.data.offset);
sge->length = mbuf->data_len - sym_op->auth.data.offset;
mbuf = mbuf->next;
/* o/p segs */
while (mbuf) {
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
mbuf = mbuf->next;
}
@@ -706,17 +690,14 @@ build_authenc_sg_fd(dpaa2_sec_session *sess,
sge->length = sess->iv.length;
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
- mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + sym_op->auth.data.offset);
sge->length = mbuf->data_len - sym_op->auth.data.offset;
mbuf = mbuf->next;
/* i/p segs */
while (mbuf) {
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
mbuf = mbuf->next;
}
@@ -830,9 +811,7 @@ build_authenc_fd(dpaa2_sec_session *sess,
DPAA2_SET_FLE_SG_EXT(fle);
/* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
- DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
- dst->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(dst) + sym_op->cipher.data.offset);
sge->length = sym_op->cipher.data.length;
if (sess->dir == DIR_ENC) {
@@ -862,9 +841,7 @@ build_authenc_fd(dpaa2_sec_session *sess,
sge->length = sess->iv.length;
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
- DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
- sym_op->m_src->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(sym_op->m_src) + sym_op->auth.data.offset);
sge->length = sym_op->auth.data.length;
if (sess->dir == DIR_DEC) {
sge++;
@@ -965,8 +942,7 @@ static inline int build_auth_sg_fd(
sge++;
}
/* i/p 1st seg */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, data_offset + mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + data_offset);
if (data_len <= (mbuf->data_len - data_offset)) {
sge->length = data_len;
@@ -978,8 +954,7 @@ static inline int build_auth_sg_fd(
while ((data_len = data_len - sge->length) &&
(mbuf = mbuf->next)) {
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
if (data_len > mbuf->data_len)
sge->length = mbuf->data_len;
else
@@ -1097,8 +1072,7 @@ build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
}
/* Setting data to authenticate */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
- DPAA2_SET_FLE_OFFSET(sge, data_offset + sym_op->m_src->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(sym_op->m_src) + data_offset);
sge->length = data_len;
if (sess->dir == DIR_DEC) {
@@ -1183,16 +1157,14 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
DPAA2_SET_FLE_SG_EXT(op_fle);
/* o/p 1st seg */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, data_offset + mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + data_offset);
sge->length = mbuf->data_len - data_offset;
mbuf = mbuf->next;
/* o/p segs */
while (mbuf) {
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
mbuf = mbuf->next;
}
@@ -1212,22 +1184,19 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
/* i/p IV */
DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sess->iv.length;
sge++;
/* i/p 1st seg */
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, data_offset + mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + data_offset);
sge->length = mbuf->data_len - data_offset;
mbuf = mbuf->next;
/* i/p segs */
while (mbuf) {
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
- DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
mbuf = mbuf->next;
}
@@ -1328,8 +1297,7 @@ build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
sess->iv.length,
sym_op->m_src->data_off);
- DPAA2_SET_FLE_ADDR(fle, DPAA2_MBUF_VADDR_TO_IOVA(dst));
- DPAA2_SET_FLE_OFFSET(fle, data_offset + dst->data_off);
+ DPAA2_SET_FLE_ADDR(fle, rte_pktmbuf_iova(dst) + data_offset);
fle->length = data_len + sess->iv.length;
@@ -1349,8 +1317,7 @@ build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
sge->length = sess->iv.length;
sge++;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
- DPAA2_SET_FLE_OFFSET(sge, data_offset + sym_op->m_src->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(sym_op->m_src) + data_offset);
sge->length = data_len;
DPAA2_SET_FLE_FIN(sge);
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
index 36c79e450a..4754b9d6f8 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
@@ -95,29 +95,25 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx,
/* OOP */
if (dest_sgl) {
/* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova + ofs.ofs.cipher.head);
sge->length = dest_sgl->vec[0].len - ofs.ofs.cipher.head;
/* o/p segs */
for (i = 1; i < dest_sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = dest_sgl->vec[i].len;
}
sge->length -= ofs.ofs.cipher.tail;
} else {
/* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + ofs.ofs.cipher.head);
sge->length = sgl->vec[0].len - ofs.ofs.cipher.head;
/* o/p segs */
for (i = 1; i < sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[i].len;
}
sge->length -= ofs.ofs.cipher.tail;
@@ -148,14 +144,12 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx,
sge->length = sess->iv.length;
sge++;
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.auth.head);
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + ofs.ofs.auth.head);
sge->length = sgl->vec[0].len - ofs.ofs.auth.head;
for (i = 1; i < sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[i].len;
}
@@ -244,28 +238,24 @@ build_raw_dp_aead_fd(uint8_t *drv_ctx,
/* OOP */
if (dest_sgl) {
/* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova + ofs.ofs.cipher.head);
sge->length = dest_sgl->vec[0].len - ofs.ofs.cipher.head;
/* o/p segs */
for (i = 1; i < dest_sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = dest_sgl->vec[i].len;
}
} else {
/* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + ofs.ofs.cipher.head);
sge->length = sgl->vec[0].len - ofs.ofs.cipher.head;
/* o/p segs */
for (i = 1; i < sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[i].len;
}
}
@@ -299,15 +289,13 @@ build_raw_dp_aead_fd(uint8_t *drv_ctx,
sge++;
}
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + ofs.ofs.cipher.head);
sge->length = sgl->vec[0].len - ofs.ofs.cipher.head;
/* i/p segs */
for (i = 1; i < sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[i].len;
}
@@ -412,8 +400,7 @@ build_raw_dp_auth_fd(uint8_t *drv_ctx,
sge++;
}
/* i/p 1st seg */
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, data_offset);
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + data_offset);
if (data_len <= (int)(sgl->vec[0].len - data_offset)) {
sge->length = data_len;
@@ -423,7 +410,6 @@ build_raw_dp_auth_fd(uint8_t *drv_ctx,
for (i = 1; i < sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[i].len;
}
}
@@ -502,14 +488,12 @@ build_raw_dp_proto_fd(uint8_t *drv_ctx,
if (dest_sgl) {
/* Configure Output SGE for Encap/Decap */
DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = dest_sgl->vec[0].len;
out_len += sge->length;
/* o/p segs */
for (i = 1; i < dest_sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = dest_sgl->vec[i].len;
out_len += sge->length;
}
@@ -518,14 +502,12 @@ build_raw_dp_proto_fd(uint8_t *drv_ctx,
} else {
/* Configure Output SGE for Encap/Decap */
DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[0].len;
out_len += sge->length;
/* o/p segs */
for (i = 1; i < sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[i].len;
out_len += sge->length;
}
@@ -545,14 +527,12 @@ build_raw_dp_proto_fd(uint8_t *drv_ctx,
/* Configure input SGE for Encap/Decap */
DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[0].len;
in_len += sge->length;
/* i/p segs */
for (i = 1; i < sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[i].len;
in_len += sge->length;
}
@@ -638,28 +618,24 @@ build_raw_dp_cipher_fd(uint8_t *drv_ctx,
/* OOP */
if (dest_sgl) {
/* o/p 1st seg */
- DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, data_offset);
+ DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova + data_offset);
sge->length = dest_sgl->vec[0].len - data_offset;
/* o/p segs */
for (i = 1; i < dest_sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = dest_sgl->vec[i].len;
}
} else {
/* o/p 1st seg */
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, data_offset);
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + data_offset);
sge->length = sgl->vec[0].len - data_offset;
/* o/p segs */
for (i = 1; i < sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[i].len;
}
}
@@ -678,21 +654,18 @@ build_raw_dp_cipher_fd(uint8_t *drv_ctx,
/* i/p IV */
DPAA2_SET_FLE_ADDR(sge, iv->iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sess->iv.length;
sge++;
/* i/p 1st seg */
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, data_offset);
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + data_offset);
sge->length = sgl->vec[0].len - data_offset;
/* i/p segs */
for (i = 1; i < sgl->num; i++) {
sge++;
DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
sge->length = sgl->vec[i].len;
}
DPAA2_SET_FLE_FIN(sge);
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 85910bbd8f..23f7c4132d 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -471,8 +471,7 @@ eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
sge = &sgt[i];
/*Resetting the buffer pool id and offset field*/
sge->fin_bpid_offset = 0;
- DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(cur_seg));
- DPAA2_SET_FLE_OFFSET(sge, cur_seg->data_off);
+ DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(cur_seg));
sge->length = cur_seg->data_len;
if (RTE_MBUF_DIRECT(cur_seg)) {
/* if we are using inline SGT in same buffers
--
2.17.1
next prev parent reply other threads:[~2023-08-23 7:10 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-23 7:08 [PATCH 00/12] crypto/dpaax_sec: misc enhancements Hemant Agrawal
2023-08-23 7:08 ` [PATCH 01/12] common/dpaax: update IPsec base descriptor length Hemant Agrawal
2023-08-23 7:08 ` [PATCH 02/12] common/dpaax: change mode to wait in shared desc Hemant Agrawal
2023-08-23 7:08 ` [PATCH 03/12] crypto/dpaa2_sec: initialize the pdcp alg to null Hemant Agrawal
2023-08-23 7:08 ` [PATCH 04/12] crypto/dpaa2_sec: supporting null cipher and auth Hemant Agrawal
2023-08-23 7:08 ` [PATCH 05/12] crypto/dpaa_sec: " Hemant Agrawal
2023-08-23 7:08 ` [PATCH 06/12] crypto/dpaax_sec: set the authdata in non-auth case Hemant Agrawal
2023-08-23 7:08 ` Hemant Agrawal [this message]
2023-08-23 7:08 ` [PATCH 08/12] crypto/dpaa2_sec: support copy df and dscp in proto offload Hemant Agrawal
2023-08-23 7:08 ` [PATCH 09/12] crypto/dpaa2_sec: increase the anti replay window size Hemant Agrawal
2023-08-23 7:08 ` [PATCH 10/12] crypto/dpaa2_sec: enable esn support Hemant Agrawal
2023-08-23 7:08 ` [PATCH 11/12] crypto/dpaa2_sec: add NAT-T support in IPsec offload Hemant Agrawal
2023-08-23 7:08 ` [PATCH 12/12] crypto/dpaa2_sec: add support to set df and diffserv Hemant Agrawal
2023-09-18 10:31 ` [EXT] [PATCH 00/12] crypto/dpaax_sec: misc enhancements Akhil Goyal
2023-09-20 13:33 ` [PATCH v2 00/13] " Hemant Agrawal
2023-09-20 13:33 ` [PATCH v2 01/13] common/dpaax: update IPsec base descriptor length Hemant Agrawal
2023-09-20 13:33 ` [PATCH v2 02/13] common/dpaax: change mode to wait in shared desc Hemant Agrawal
2023-09-20 13:33 ` [PATCH v2 03/13] crypto/dpaa2_sec: initialize the pdcp alg to null Hemant Agrawal
2023-09-20 13:33 ` [PATCH v2 04/13] crypto/dpaa2_sec: supporting null cipher and auth Hemant Agrawal
2023-09-20 13:33 ` [PATCH v2 05/13] crypto/dpaa_sec: " Hemant Agrawal
2023-09-20 13:33 ` [PATCH v2 06/13] crypto/dpaax_sec: set the authdata in non-auth case Hemant Agrawal
2023-09-20 13:33 ` [PATCH v2 07/13] crypto/dpaa2_sec: enhance dpaa FD FL FMT offset set Hemant Agrawal
2023-09-20 13:33 ` [PATCH v2 08/13] crypto/dpaa2_sec: support copy df and dscp in proto offload Hemant Agrawal
2023-09-20 13:33 ` [PATCH v2 09/13] crypto/dpaa2_sec: increase the anti replay window size Hemant Agrawal
2023-09-20 13:34 ` [PATCH v2 10/13] crypto/dpaa2_sec: enable esn support Hemant Agrawal
2023-09-20 13:34 ` [PATCH v2 11/13] crypto/dpaa2_sec: add NAT-T support in IPsec offload Hemant Agrawal
2023-09-20 13:34 ` [PATCH v2 12/13] crypto/dpaa2_sec: add support to set df and diffserv Hemant Agrawal
2023-09-20 13:34 ` [PATCH v2 13/13] crypto/dpaax_sec: enable sha224-hmac support for IPsec Hemant Agrawal
2023-09-21 8:05 ` [EXT] [PATCH v2 00/13] crypto/dpaax_sec: misc enhancements Akhil Goyal
2023-09-21 8:55 ` Hemant Agrawal
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