From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9080C430EF; Thu, 24 Aug 2023 13:14:10 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 61983432F3; Thu, 24 Aug 2023 13:11:37 +0200 (CEST) Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2129.outbound.protection.outlook.com [40.107.93.129]) by mails.dpdk.org (Postfix) with ESMTP id 94D67432DB for ; Thu, 24 Aug 2023 13:11:32 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=HljjRFlD3IVNBbC73VkjENFdyd48GpoyLfw5v2571cYr1Y3AlBA+Z9lBC6ZHBrL6mzWJ2wWR05miWmh2N0esGOZCUHRmhwvAO6RMkj8NODfqYwkogfJ7Ib7jY76+JKX8nh33E5rX/8oX+fy6CIiAa8pscENWEqSh0VBqBMxAnMjiAOL9kTVlE5N9qfdXO6vCCkmfyFHGGMU0yhHQaHRHwPj2vcfdO0D7XK6dWQHrInin8GMcgovYhiL7lJN9QscF9bz96/Y4PLG7lZup2QIigFhkz+wxm+KWNBD2rdLjmYzB1BBTWVRr6LOaitPqBRRGsGs9c7eIfCeBMvb3EUoBgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=r5P4vSzp4IvYosj5zToxzykSe5EnMyZ1tqFwvhNLzIk=; b=a8S6oM8Nc0U+NgAZqzIWrjzlqxDEiAHS5w108sIC86arxpvJHHHwhSqF1z5WTQnVq36wWRORO8Cm7zIwIhtxAaZeY6eKNVIVaKTQBd5mTd97P9RdzmufQmJ07nvV7Wnx4be0fljxKdChCiRWkMtzMIIDp//EAKyR4uanyD7I+7+2ciXBHNjby8ldpzV6iZG7ViAUlx66LoVkzBHh+gxRmeyGMoFmLIsftuRst4Tq2h2vrLEikCv2+B/30KDmyuTomln2PiEnTzlaJjD8jZMeR5Wf5KAI/zJdvWmr9DAIN6TLOBGCZqFXIYsmOGZMtRwG7PJOKHtB/74QcpTTEDHjng== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=corigine.com; dmarc=pass action=none header.from=corigine.com; dkim=pass header.d=corigine.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=corigine.onmicrosoft.com; s=selector2-corigine-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=r5P4vSzp4IvYosj5zToxzykSe5EnMyZ1tqFwvhNLzIk=; b=Z1TXgbd0h7ikYpI4UZaSfsgvvU0VvVCjXw+cfI73f2V3D/cV0lfa3/cIMfORe9OgZYQeBhswSi0t5+IB5730WiEGsHbsFL5HuiZW2RwSe3vKzHCcYg795asBJRFFVxhZbT8l9QUxX0aemcWLbE7wD2euBaRETzIy3QR2whZ52+I= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=corigine.com; Received: from SJ0PR13MB5545.namprd13.prod.outlook.com (2603:10b6:a03:424::5) by PH7PR13MB6116.namprd13.prod.outlook.com (2603:10b6:510:2b7::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6699.20; Thu, 24 Aug 2023 11:11:31 +0000 Received: from SJ0PR13MB5545.namprd13.prod.outlook.com ([fe80::51fe:5846:af8b:bace]) by SJ0PR13MB5545.namprd13.prod.outlook.com ([fe80::51fe:5846:af8b:bace%3]) with mapi id 15.20.6699.020; Thu, 24 Aug 2023 11:11:31 +0000 From: Chaoyong He To: dev@dpdk.org Cc: oss-drivers@corigine.com, niklas.soderlund@corigine.com, Chaoyong He Subject: [PATCH 25/27] net/nfp: refact the PCIe module Date: Thu, 24 Aug 2023 19:09:54 +0800 Message-Id: <20230824110956.1943559-26-chaoyong.he@corigine.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230824110956.1943559-1-chaoyong.he@corigine.com> References: <20230824110956.1943559-1-chaoyong.he@corigine.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: SJ0PR05CA0005.namprd05.prod.outlook.com (2603:10b6:a03:33b::10) To SJ0PR13MB5545.namprd13.prod.outlook.com (2603:10b6:a03:424::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ0PR13MB5545:EE_|PH7PR13MB6116:EE_ X-MS-Office365-Filtering-Correlation-Id: bba0f3b6-9c9a-44a8-0cc7-08dba492de7a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ajpBqGI8GMEAyd+GBW1rzQrkJHBSMpKQ1ZpGsV0jYrNw/0A/+P41P74HL+w/dK0MXZPMVgYGaGFndyQ8cDzOivQW9uBkyzf6D8CHdPKtw3F4tP6F1Hz6T8H0RKjm13EWtPLsWaTZGpSB1TT3rmPEutSDcJKQugUrLWRMZh++8qt2wueHMVXTSSJ4Xu6d0BxS1oYTHG913vAuvHhH9Ldx5X95P8ghNPsCi4jvAI3Gbh+wmFCLENppJ5Kvp/LrD+56m9v9xmJI+XV2YvENDoZRkexlE4ff1LbrkID75H7CHZs3oqYdlMnVOHca2G/ZgV4GUFE2Zp9paY2Sk0IekOwFggUYoI5KV3ZomciaPmFetmKGQrNLSuGNJzxBsD8Ap4ump8wYBc2IkVgb/MKADl/4nm1v8zrWRwvf8Zb1fFXnC13QjjEQnfp8NRBClnLW11THDAMpKT1gjLqp9GsP7ZseDo47qU4waPAoBon23N+gUeEkSxRissJCgAiw5jamBsvT9oQPoUhHE3VvNI4kbDvECwUlSURjs2ymBxBqP2bW/l09hnke5SMgczmPMNx2Dua4Jdmif29QIaJiF9VR938+fp4ArH0Tf7Cs0TcXEpoESh9+OT4LVBiRmyV9ECsHAm2ysc2EjHzSJmiSSAf6R+PXOhTS7jXkLpaLQm5MxYwNL5fqXyD8Y+P1wE8BIoh0AnDY X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SJ0PR13MB5545.namprd13.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(366004)(39830400003)(346002)(396003)(136003)(376002)(1800799009)(186009)(451199024)(6506007)(26005)(1076003)(2616005)(107886003)(52116002)(12101799020)(6512007)(66574015)(6486002)(83380400001)(38100700002)(8676002)(8936002)(36756003)(316002)(4326008)(41300700001)(2906002)(86362001)(5660300002)(44832011)(38350700002)(6666004)(6916009)(478600001)(66476007)(66946007)(66556008); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?ZVkrTEh6c0dhV0dQMUlsbFBOeXhpUko4VThoQm5EUm5iSS9XOTJON054Vkl6?= =?utf-8?B?UGxXNlpqcFRDU0swWE42cE0xNUtob3h0WFF6azRqQzdaWTExRDFoanNoUitV?= =?utf-8?B?S1ByUE9aN1RCRGtCWmZKKzdsaW5GdHpCM3NoWm5nMmY5TWNLS203c2ZuQ252?= =?utf-8?B?NUVSV1NpdFIzWXl3RWJzcWpzRXZYYVZ0bk5ibkEvUWZGZlJTY1hzN1pUSVNl?= =?utf-8?B?UEExQXN2dVJjWjUyN1A5andtUldVYkM4c2dGSFUvWEZRRUZndjR1NndDSkxa?= =?utf-8?B?SmFyVkVya0NWSWhSRjhjdnZpM2tuZHNmYXJ6TzZ0NnpidEdIRjNzNEJPa3J0?= =?utf-8?B?M2xvODBXeWlDL3c2emJjc21GbzB0d0RRZkRGdkZqZEpVWVhnWVhLRG44UW5N?= =?utf-8?B?a2FOMDNXVk1Jc2dxbTBZcG5PY1U0SzN5bVlKYTczWUhKcHFsMzNHdW9uME5z?= =?utf-8?B?RW9mZHkva1NGWjBaZ2dOZlNrWHJtRW5Ka0JZNm44NzNLWFF1YlQ0OU9iT2Np?= =?utf-8?B?Mm1kY0VlelY4NkRqTi9ON2pUNU95aEcwc1pFQnFucU5qTVdMWGZuZmE0eHVN?= =?utf-8?B?V0p3N2FBZC9hekhVRkRlQWJJd3JBcXdybUloSkJXYjY0cFpka21ZSXNKeDBh?= =?utf-8?B?M3JuaWtaRHpoMGdlNmlEeExOVVhRWlJtVFhNRUNxMmpFQTBmV3h0TWpwSkZW?= =?utf-8?B?aFZLdjRVcExza3pjdVV4aTd1T0N1bkZrdEJQQkZDZGJmcU1SNUg2ZDR2cUZG?= =?utf-8?B?UHh6cEwyekZDdjZ2VVY5L051ZDFweG8rN3FreThEaWsrc0UxTmhNdXgxV2xm?= =?utf-8?B?aDA1VE1PNlA1VUxCcHdrc0h2QjlSek9lY3J6VStjRlo2NjNSYkdhc1dvZVls?= =?utf-8?B?dFV0ZzNiK3RDR2h6UXljU1gvZjlDQzR1ZUx4MjlsVSs1d1k5ZmI2UXZWcWdB?= =?utf-8?B?ODloZUZBTDFTZ0VFZWs5WnQ4WE8zYkNNSjRmS1pQUlpvRVg5RFJGWDAxajM0?= =?utf-8?B?QmZ5a3RPaDhya0RUVGJIMXBJRmtmTEpXbWZBdGplUUVlNlExbm5NeFFsT3g3?= =?utf-8?B?WkZKdUIzMHQ4QVdsSlRWOExjKzlHbStzYzZSTWR0RVE5My9kbGI0bHFGWTdh?= =?utf-8?B?YTVhTnk1MjJReEYzU2MrUlZwaTZOSVF4NkJpQ0VmYmlBR3NSQ2s5SkdmeURC?= =?utf-8?B?SnJWR05ndTFyZ2dNZ3FiQjR3Z2VCUEUxYU5NUC90SFV4MFVLSW9sTEpoRkV1?= =?utf-8?B?S2hPQzJVZ1VWRlA1QjRwNDU3UW9TQ2Ryd1lMNnowdUxvSGlSMGI1eGl6a2Qx?= =?utf-8?B?bXJqd0lKS2IrOGtSREVzWVFiOFQzTFQwaklncDRaOUpuWmZPQVYwbFJTdVp1?= =?utf-8?B?VzBMdERuMi8wcjA2bVB5OFdRWXJ5c2liL3R1Q3NJc295RHZQeXZlQlU0TEdK?= =?utf-8?B?NHJabUZrZ3FXb1pIbDZ6cjRsWEkzNmtqdUZhYTVMRmFLSVpSeXhvVTJzRGt0?= =?utf-8?B?dWFXR21GZ04rcVE1V3ZWSVFKYk9VR0xaQWxZcmZ0S1Z2ZEhadDZGZVV3YUc1?= =?utf-8?B?blJZUHJhVmcxTVh4TW41eUx3aWZYUWtKejNSTHJtVjJrMnRNOTZwaWdkaTZE?= =?utf-8?B?Z2t0RkRaZjBpUXd1N3ZXQTVMcXIyN1c1V0NnUnJKMmNmaEJteSt5anh5ZkRN?= =?utf-8?B?NVdqaGtTYmZRTU83ZkxEckFialBYTG5IQjFNUlZadTBqMjhrVXhhOE40cURn?= =?utf-8?B?NGZLdFFWc2szZ2VHbTFabEs0OWFwc0NLVlQ1YjlGcWNpU1Nzd0NWKzQxeXhz?= =?utf-8?B?ZGlsMlE3MlFvTUZseTFKbGpqWTdCdVJrVWNXTUlZT2pyK2x0NVh5UU8zNE9H?= =?utf-8?B?NjBjdWpSNm9raFBsYWt0MWs1VXZWbUhVdHFvUGJpZDNJcU5GUGxXRFl6a2NH?= =?utf-8?B?bFFNbmlRRERhNjArZVJaalVpMEhxUjZGZ2pmZDRwRkZGQ1MvTFdhOVFIMUsr?= =?utf-8?B?RG9QT0JMczJ6amJoYTNlcStHZ2tBR2YrSVgvSDhKNlRFeEJ0cmw2NGY5b0Rn?= =?utf-8?B?bTNybEJLZHdGRXRITFNmZWRTSVdBYnlqOE1UaGxlMU84UHdDNDdONURabXBQ?= =?utf-8?B?UDJmZmJyWEY0MDdCcnJFMzExTmt1a1d0WUhPcUVZdWRkc3RLUzhUa0l3QmNC?= =?utf-8?B?dGc9PQ==?= X-OriginatorOrg: corigine.com X-MS-Exchange-CrossTenant-Network-Message-Id: bba0f3b6-9c9a-44a8-0cc7-08dba492de7a X-MS-Exchange-CrossTenant-AuthSource: SJ0PR13MB5545.namprd13.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Aug 2023 11:11:31.1115 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: fe128f2c-073b-4c20-818e-7246a585940c X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: HDQ58JfDgS5fgVuOiQg6xgOCK2ZSIjnep2DAKMG80rXkTjNOwsjwsZX7p7xXUPSpy2F3JrYTvhjBG1HpIIOuauiPMCHnQG65Ke+ildvYF9w= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR13MB6116 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sync the logic from kernel driver and remove the unneeded header file include statements. Signed-off-by: Chaoyong He Reviewed-by: Niklas Söderlund --- drivers/net/nfp/nfpcore/nfp6000_pcie.c | 211 +++++++++++++++++-------- drivers/net/nfp/nfpcore/nfp_cpp.h | 9 ++ 2 files changed, 150 insertions(+), 70 deletions(-) diff --git a/drivers/net/nfp/nfpcore/nfp6000_pcie.c b/drivers/net/nfp/nfpcore/nfp6000_pcie.c index 45645e04f8..eb03571f99 100644 --- a/drivers/net/nfp/nfpcore/nfp6000_pcie.c +++ b/drivers/net/nfp/nfpcore/nfp6000_pcie.c @@ -16,23 +16,8 @@ #include "nfp6000_pcie.h" -#include -#include -#include #include -#include -#include #include -#include -#include -#include -#include - -#include -#include -#include - -#include #include "nfp_cpp.h" #include "nfp_logs.h" @@ -43,8 +28,11 @@ #define NFP_PCIE_BAR(_pf) (0x30000 + ((_pf) & 7) * 0xc0) #define NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS(_x) (((_x) & 0x1f) << 16) +#define NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS_OF(_x) (((_x) >> 16) & 0x1f) #define NFP_PCIE_BAR_PCIE2CPP_BASEADDRESS(_x) (((_x) & 0xffff) << 0) +#define NFP_PCIE_BAR_PCIE2CPP_BASEADDRESS_OF(_x) (((_x) >> 0) & 0xffff) #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT(_x) (((_x) & 0x3) << 27) +#define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_OF(_x) (((_x) >> 27) & 0x3) #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_32BIT 0 #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_64BIT 1 #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_0BYTE 3 @@ -55,7 +43,9 @@ #define NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_TARGET 2 #define NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_GENERAL 3 #define NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS(_x) (((_x) & 0xf) << 23) +#define NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS_OF(_x) (((_x) >> 23) & 0xf) #define NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS(_x) (((_x) & 0x3) << 21) +#define NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS_OF(_x) (((_x) >> 21) & 0x3) /* * Minimal size of the PCIe cfg memory we depend on being mapped, @@ -132,7 +122,7 @@ nfp_compute_bar(const struct nfp_bar *bar, uint32_t newcfg; uint32_t bitsize; - if (target >= 16) + if (target >= NFP_CPP_NUM_TARGETS) return -EINVAL; switch (width) { @@ -182,10 +172,6 @@ nfp_compute_bar(const struct nfp_bar *bar, offset &= mask; bitsize = 40 - 21; } - - if (bar->bitsize < bitsize) - return -EINVAL; - newcfg |= offset >> bitsize; if (bar_base != NULL) @@ -434,7 +420,7 @@ nfp6000_area_acquire(struct nfp_cpp_area *area) /* Must have been too big. Sub-allocate. */ if (priv->bar->iomem == NULL) - return (-ENOMEM); + return -ENOMEM; priv->iomem = priv->bar->iomem + priv->bar_offset; @@ -464,9 +450,9 @@ nfp6000_area_read(struct nfp_cpp_area *area, uint32_t offset, size_t length) { + int ret; size_t n; int width; - bool is_64; uint32_t *wrptr32 = address; uint64_t *wrptr64 = address; struct nfp6000_area_priv *priv; @@ -484,47 +470,54 @@ nfp6000_area_read(struct nfp_cpp_area *area, if (width <= 0) return -EINVAL; + /* MU reads via a PCIe2CPP BAR support 32bit (and other) lengths */ + if (priv->target == (NFP_CPP_TARGET_MU & NFP_CPP_TARGET_ID_MASK) && + priv->action == NFP_CPP_ACTION_RW && + (offset % sizeof(uint64_t) == 4 || + length % sizeof(uint64_t) == 4)) + width = TARGET_WIDTH_32; + /* Unaligned? Translate to an explicit access */ if (((priv->offset + offset) & (width - 1)) != 0) { PMD_DRV_LOG(ERR, "aread_read unaligned!!!"); return -EINVAL; } - is_64 = width == TARGET_WIDTH_64; - - /* MU reads via a PCIe2CPP BAR supports 32bit (and other) lengths */ - if (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) && - priv->action == NFP_CPP_ACTION_RW) { - is_64 = false; - } + if (priv->bar == NULL) + return -EFAULT; - if (is_64) { - if (offset % sizeof(uint64_t) != 0 || - length % sizeof(uint64_t) != 0) - return -EINVAL; - } else { + switch (width) { + case TARGET_WIDTH_32: if (offset % sizeof(uint32_t) != 0 || length % sizeof(uint32_t) != 0) return -EINVAL; - } - if (priv->bar == NULL) - return -EFAULT; + for (n = 0; n < length; n += sizeof(uint32_t)) { + *wrptr32 = *rdptr32; + wrptr32++; + rdptr32++; + } + + ret = n; + break; + case TARGET_WIDTH_64: + if (offset % sizeof(uint64_t) != 0 || + length % sizeof(uint64_t) != 0) + return -EINVAL; - if (is_64) for (n = 0; n < length; n += sizeof(uint64_t)) { *wrptr64 = *rdptr64; wrptr64++; rdptr64++; } - else - for (n = 0; n < length; n += sizeof(uint32_t)) { - *wrptr32 = *rdptr32; - wrptr32++; - rdptr32++; - } - return n; + ret = n; + break; + default: + return -EINVAL; + } + + return ret; } static int @@ -533,9 +526,9 @@ nfp6000_area_write(struct nfp_cpp_area *area, uint32_t offset, size_t length) { + int ret; size_t n; int width; - bool is_64; uint32_t *wrptr32; uint64_t *wrptr64; struct nfp6000_area_priv *priv; @@ -553,47 +546,53 @@ nfp6000_area_write(struct nfp_cpp_area *area, if (width <= 0) return -EINVAL; + /* MU reads via a PCIe2CPP BAR support 32bit (and other) lengths */ + if (priv->target == (NFP_CPP_TARGET_MU & NFP_CPP_TARGET_ID_MASK) && + priv->action == NFP_CPP_ACTION_RW && + (offset % sizeof(uint64_t) == 4 || + length % sizeof(uint64_t) == 4)) + width = TARGET_WIDTH_32; + /* Unaligned? Translate to an explicit access */ if (((priv->offset + offset) & (width - 1)) != 0) return -EINVAL; - is_64 = width == TARGET_WIDTH_64; - - /* MU writes via a PCIe2CPP BAR supports 32bit (and other) lengths */ - if (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) && - priv->action == NFP_CPP_ACTION_RW) - is_64 = false; + if (priv->bar == NULL) + return -EFAULT; - if (is_64) { - if (offset % sizeof(uint64_t) != 0 || - length % sizeof(uint64_t) != 0) - return -EINVAL; - } else { + switch (width) { + case TARGET_WIDTH_32: if (offset % sizeof(uint32_t) != 0 || length % sizeof(uint32_t) != 0) return -EINVAL; - } - if (priv->bar == NULL) - return -EFAULT; + for (n = 0; n < length; n += sizeof(uint32_t)) { + *wrptr32 = *rdptr32; + wrptr32++; + rdptr32++; + } + + ret = n; + break; + case TARGET_WIDTH_64: + if (offset % sizeof(uint64_t) != 0 || + length % sizeof(uint64_t) != 0) + return -EINVAL; - if (is_64) for (n = 0; n < length; n += sizeof(uint64_t)) { *wrptr64 = *rdptr64; wrptr64++; rdptr64++; } - else - for (n = 0; n < length; n += sizeof(uint32_t)) { - *wrptr32 = *rdptr32; - wrptr32++; - rdptr32++; - } - return n; -} + ret = n; + break; + default: + return -EINVAL; + } -#define PCI_DEVICES "/sys/bus/pci/devices" + return ret; +} static int nfp_acquire_process_lock(struct nfp_pcie_user *desc) @@ -706,6 +705,74 @@ nfp6000_set_serial(struct rte_pci_device *dev, return 0; } +static int +nfp6000_get_dsn(struct rte_pci_device *pci_dev, + uint64_t *dsn) +{ + off_t pos; + size_t len; + uint64_t tmp; + + pos = rte_pci_find_ext_capability(pci_dev, RTE_PCI_EXT_CAP_ID_DSN); + if (pos <= 0) { + PMD_DRV_LOG(ERR, "PCI_EXT_CAP_ID_DSN not found"); + return -ENODEV; + } + + pos += 4; + len = sizeof(tmp); + + if (rte_pci_read_config(pci_dev, &tmp, len, pos) < 0) { + PMD_DRV_LOG(ERR, "nfp get device serial number failed"); + return -ENOENT; + } + + *dsn = tmp; + + return 0; +} + +static int +nfp6000_get_interface(struct rte_pci_device *dev, + uint16_t *interface) +{ + int ret; + uint64_t dsn; + + ret = nfp6000_get_dsn(dev, &dsn); + if (ret != 0) + return ret; + + *interface = dsn & 0xffff; + + return 0; +} + +static int +nfp6000_get_serial(struct rte_pci_device *dev, + uint8_t *serial, + size_t length) +{ + int ret; + uint64_t dsn; + + if (length < NFP_SERIAL_LEN) + return -ENOMEM; + + ret = nfp6000_get_dsn(dev, &dsn); + if (ret != 0) + return ret; + + serial[0] = (dsn >> 56) & 0xff; + serial[1] = (dsn >> 48) & 0xff; + serial[2] = (dsn >> 40) & 0xff; + serial[3] = (dsn >> 32) & 0xff; + serial[4] = (dsn >> 24) & 0xff; + serial[5] = (dsn >> 16) & 0xff; + + return 0; +} + static int nfp6000_set_barsz(struct rte_pci_device *dev, struct nfp_pcie_user *desc) @@ -789,6 +856,10 @@ static const struct nfp_cpp_operations nfp6000_pcie_ops = { .free = nfp6000_free, .area_priv_size = sizeof(struct nfp6000_area_priv), + + .get_interface = nfp6000_get_interface, + .get_serial = nfp6000_get_serial, + .area_init = nfp6000_area_init, .area_acquire = nfp6000_area_acquire, .area_release = nfp6000_area_release, diff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h index 34ed50ceca..0f36ba0b50 100644 --- a/drivers/net/nfp/nfpcore/nfp_cpp.h +++ b/drivers/net/nfp/nfpcore/nfp_cpp.h @@ -16,6 +16,8 @@ struct nfp_cpp_area; #define NFP_SERIAL_LEN 6 +#define NFP_CPP_NUM_TARGETS 16 + /* * NFP CPP operations structure */ @@ -33,6 +35,13 @@ struct nfp_cpp_operations { */ void (*free)(struct nfp_cpp *cpp); + int (*get_interface)(struct rte_pci_device *dev, + uint16_t *interface); + + int (*get_serial)(struct rte_pci_device *dev, + uint8_t *serial, + size_t length); + /* * Initialize a new NFP CPP area * NOTE: This is _not_ serialized -- 2.39.1