From: Sivaramakrishnan VenkatX <venkatx.sivaramakrishnan@intel.com>
To: Kai Ji <kai.ji@intel.com>
Cc: dev@dpdk.org,
Sivaramakrishnan VenkatX <venkatx.sivaramakrishnan@intel.com>
Subject: [PATCH v2] drivers/crypto: cipher buffer alignment check
Date: Tue, 5 Sep 2023 11:21:25 +0000 [thread overview]
Message-ID: <20230905112125.5735-1-venkatx.sivaramakrishnan@intel.com> (raw)
In-Reply-To: <20230822104610.954234-1-venkatx.sivaramakrishnan@intel.com>
Cipher length alignment checked for 3DES-CBC and AES-CBC to avoid slice
hang error in QAT CPM1.8
Signed-off-by: Sivaramakrishnan VenkatX <venkatx.sivaramakrishnan@intel.com>
--
V2:
Set auth_length = 0 for NULL CIPHER NULL AUTH operation.
---
drivers/crypto/qat/dev/qat_crypto_pmd_gens.h | 22 ++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
index cab7e214c0..37647374d5 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
@@ -10,6 +10,13 @@
#include "qat_sym_session.h"
#include "qat_sym.h"
+#define AES_OR_3DES_MISALIGNED (ctx->qat_mode == ICP_QAT_HW_CIPHER_CBC_MODE && \
+ ((((ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128) || \
+ (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES192) || \
+ (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES256)) && \
+ (cipher_param->cipher_length % ICP_QAT_HW_AES_BLK_SZ)) || \
+ ((ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_3DES) && \
+ (cipher_param->cipher_length % ICP_QAT_HW_3DES_BLK_SZ))))
#define QAT_SYM_DP_GET_MAX_ENQ(q, c, n) \
RTE_MIN((q->max_inflights - q->enqueued + q->dequeued - c), n)
@@ -704,6 +711,21 @@ enqueue_one_chain_job_gen1(struct qat_sym_session *ctx,
auth_param->auth_off = ofs.ofs.auth.head;
auth_param->auth_len = auth_len;
auth_param->auth_res_addr = digest->iova;
+ /* Input cipher length alignment requirement for 3DES-CBC and AES-CBC.
+ * For 3DES-CBC cipher algo, ESP Payload size requires 8 Byte aligned.
+ * For AES-CBC cipher algo, ESP Payload size requires 16 Byte aligned.
+ * The alignment should be guaranteed by the ESP package padding field
+ * according to the RFC4303. Under this condition, QAT will pass through
+ * chain job as NULL cipher and NULL auth operation and report misalignment
+ * error detected.
+ */
+ if (AES_OR_3DES_MISALIGNED) {
+ QAT_LOG(ERR, "Input cipher length alignment error detected.\n");
+ ctx->qat_cipher_alg = ICP_QAT_HW_CIPHER_ALGO_NULL;
+ ctx->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
+ cipher_param->cipher_length = 0;
+ auth_param->auth_len = 0;
+ }
switch (ctx->qat_hash_alg) {
case ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2:
--
2.25.1
next prev parent reply other threads:[~2023-09-06 13:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-22 10:46 [PATCH v1] " Sivaramakrishnan VenkatX
2023-09-05 11:21 ` Sivaramakrishnan VenkatX [this message]
2023-09-19 14:41 ` [PATCH v2] " Power, Ciara
2023-09-19 19:46 ` Akhil Goyal
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