From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BA72B4258F; Thu, 14 Sep 2023 03:50:05 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5A9B340647; Thu, 14 Sep 2023 03:49:53 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 9FB97402DB for ; Thu, 14 Sep 2023 03:49:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694656189; x=1726192189; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UWfhUxHVq60PWNnZH2K/7txPEkfeuOY7CklsCK6FU0A=; b=EXab7aZloohFm51o4KfOV+GhEV+vdbkHiZ3Ng04tRI/u2xbSESi06P99 mS8JJNVSzOwAOUSD0YAPYH3iBL4yGUXlOpJK7xmPtZ/MFk2aJQai0hkOU 8jVZqE2Df076/sbZMOptPJZ0WGcL2Hfl0nMwhSk0xUCxZIEJJZT6+F2Pd tuRtMnNgthobq4TCNRRTsOCNjlMwbeg0h8iN59yO0oLJIn2CjmVjrusH8 0N7uNpRyrog0Fh1K+K8tSgdxOR8Jr0MRNReebTQMqUmTX4b2avouIr+KZ 8H/7A2m9sSWdreyBTwIy48MCQDLcDsOmZcokEFs3NKLW/mwsLQat7nKyP Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10832"; a="369101415" X-IronPort-AV: E=Sophos;i="6.02,144,1688454000"; d="scan'208";a="369101415" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Sep 2023 18:49:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10832"; a="773699556" X-IronPort-AV: E=Sophos;i="6.02,144,1688454000"; d="scan'208";a="773699556" Received: from dpdk-simei-icelake.sh.intel.com ([10.67.110.167]) by orsmga008.jf.intel.com with ESMTP; 13 Sep 2023 18:49:47 -0700 From: Simei Su To: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com Cc: dev@dpdk.org, wenjun1.wu@intel.com, Simei Su Subject: [PATCH v4 3/3] net/cpfl: refine Tx queue setup Date: Thu, 14 Sep 2023 09:50:31 +0800 Message-Id: <20230914015031.2560501-4-simei.su@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230914015031.2560501-1-simei.su@intel.com> References: <20230908102827.2256297-1-simei.su@intel.com> <20230914015031.2560501-1-simei.su@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch refines Tx single queue setup to align with Tx data path. Signed-off-by: Simei Su Acked-by: Wenjun Wu --- drivers/net/cpfl/cpfl_rxtx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c index 2ef6871a85..ab8bec4645 100644 --- a/drivers/net/cpfl/cpfl_rxtx.c +++ b/drivers/net/cpfl/cpfl_rxtx.c @@ -135,7 +135,7 @@ cpfl_dma_zone_reserve(struct rte_eth_dev *dev, uint16_t queue_idx, ring_size = RTE_ALIGN(len * sizeof(struct idpf_flex_tx_sched_desc), CPFL_DMA_MEM_ALIGN); else - ring_size = RTE_ALIGN(len * sizeof(struct idpf_flex_tx_desc), + ring_size = RTE_ALIGN(len * sizeof(struct idpf_base_tx_desc), CPFL_DMA_MEM_ALIGN); memcpy(ring_name, "cpfl Tx ring", sizeof("cpfl Tx ring")); break; -- 2.25.1