From: Rahul Bhansali <rbhansali@marvell.com>
To: <dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>
Cc: <jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>
Subject: [PATCH 1/2] common/cnxk: reserve last LMT line for control ops
Date: Mon, 18 Sep 2023 17:10:34 +0530 [thread overview]
Message-ID: <20230918114035.751407-1-rbhansali@marvell.com> (raw)
As rte_eth_dev_configure() can be called from any EAL or non-EAL cores.
And in case of non-EAL core, LMT address will not be a valid. So,
reserving last LMT line 2047 for control path specific functionality.
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
drivers/common/cnxk/roc_dev.c | 5 +++++
drivers/common/cnxk/roc_nix_inl.c | 6 ++++--
drivers/common/cnxk/roc_platform.c | 25 +++++++++++++++++++++++++
drivers/common/cnxk/roc_platform.h | 5 +++++
drivers/common/cnxk/version.map | 2 ++
5 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c
index 18d7981825..3815da078a 100644
--- a/drivers/common/cnxk/roc_dev.c
+++ b/drivers/common/cnxk/roc_dev.c
@@ -1369,6 +1369,11 @@ dev_init(struct dev *dev, struct plt_pci_device *pci_dev)
if (!dev_cache_line_size_valid())
return -EFAULT;
+ if (!roc_plt_lmt_validate()) {
+ plt_err("Failed to validate LMT line");
+ return -EFAULT;
+ }
+
bar2 = (uintptr_t)pci_dev->mem_resource[2].addr;
bar4 = (uintptr_t)pci_dev->mem_resource[4].addr;
if (bar2 == 0 || bar4 == 0) {
diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c
index 5cb1f11f53..750fd08355 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -779,8 +779,10 @@ nix_inl_eng_caps_get(struct nix *nix)
hw_res->cn10k.compcode = CPT_COMP_NOT_DONE;
- /* Use this lcore's LMT line as no one else is using it */
- ROC_LMT_BASE_ID_GET(lmt_base, lmt_id);
+ /* Use this reserved LMT line as no one else is using it */
+ lmt_id = roc_plt_control_lmt_id_get();
+ lmt_base += ((uint64_t)lmt_id << ROC_LMT_LINE_SIZE_LOG2);
+
memcpy((void *)lmt_base, &inst, sizeof(inst));
lmt_arg = ROC_CN10K_CPT_LMT_ARG | (uint64_t)lmt_id;
diff --git a/drivers/common/cnxk/roc_platform.c b/drivers/common/cnxk/roc_platform.c
index f91b95ceab..ffc82720b0 100644
--- a/drivers/common/cnxk/roc_platform.c
+++ b/drivers/common/cnxk/roc_platform.c
@@ -21,6 +21,31 @@ roc_plt_init_cb_register(roc_plt_init_cb_t cb)
return 0;
}
+uint16_t
+roc_plt_control_lmt_id_get(void)
+{
+ uint32_t lcore_id = plt_lcore_id();
+ if (lcore_id != LCORE_ID_ANY)
+ return lcore_id << ROC_LMT_LINES_PER_CORE_LOG2;
+ else
+ /* Return Last LMT ID to be use in control path functionality */
+ return ROC_NUM_LMT_LINES - 1;
+}
+
+uint16_t
+roc_plt_lmt_validate(void)
+{
+ if (!roc_model_is_cn9k()) {
+ /* Last LMT line is reserved for control specific operation and can be
+ * use from any EAL or non EAL cores.
+ */
+ if ((RTE_MAX_LCORE << ROC_LMT_LINES_PER_CORE_LOG2) >
+ (ROC_NUM_LMT_LINES - 1))
+ return 0;
+ }
+ return 1;
+}
+
int
roc_plt_init(void)
{
diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
index e7a6564163..7605eed33d 100644
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -314,6 +314,11 @@ extern int cnxk_logtype_ree;
__rte_internal
int roc_plt_init(void);
+__rte_internal
+uint16_t roc_plt_control_lmt_id_get(void);
+__rte_internal
+uint16_t roc_plt_lmt_validate(void);
+
/* Init callbacks */
typedef int (*roc_plt_init_cb_t)(void);
int __roc_api roc_plt_init_cb_register(roc_plt_init_cb_t cb);
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 43c3d9ed77..04f8fabfcb 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -463,6 +463,8 @@ INTERNAL {
roc_ot_ipsec_outb_sa_init;
roc_plt_init;
roc_plt_init_cb_register;
+ roc_plt_lmt_validate;
+ roc_plt_control_lmt_id_get;
roc_sso_dev_fini;
roc_sso_dev_init;
roc_sso_dump;
--
2.25.1
next reply other threads:[~2023-09-18 11:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-18 11:40 Rahul Bhansali [this message]
2023-09-20 10:12 Rahul Bhansali
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