From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 27A0242604; Tue, 19 Sep 2023 15:43:34 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D722E40DFB; Tue, 19 Sep 2023 15:43:23 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 3023B40E72 for ; Tue, 19 Sep 2023 15:43:22 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38JDZvGr011923; Tue, 19 Sep 2023 06:43:21 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=ffp43xLkvTb61QSxx5g54sdg14z9oAKhL4q6AWdH53I=; b=hyZxa8BOK2A/iF1La/cozRBecHrprd1U5ev4WcPRt+lO/uX4EUThJU5gtnUHLZbZa3Jc fcjWsCPGeonFgpnvuOsJPgtfE9t10TAQZlROmBfheLS9l6oV8yT5CMq2OkOE98jjim+w ztrCmstlr8ACAbQRe89+X6ayr4nUZaKYDKmAfniR2ws/D95N5g82JBi8cV/6s4VX7nUi 1NPDHEiyXKQ4KsOyO3SIaN3muiHgKqoyiGPltryDxmnU8oBmVnP2tXHLzB+FMXLF54b4 KY+nEfFQizZV5BWaiT5XuystIPiQANDgUAB+GaLhdi+YZ9eGP4pSnDBbyfqLwWJ9hlmI tg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3t7cnq00xb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 19 Sep 2023 06:43:21 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 19 Sep 2023 06:43:19 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 19 Sep 2023 06:43:19 -0700 Received: from localhost.localdomain (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 8E9793F7099; Tue, 19 Sep 2023 06:43:14 -0700 (PDT) From: Amit Prakash Shukla To: Pavan Nikhilesh , Shijith Thotton CC: , , , , , , , , , , , , , , Amit Prakash Shukla Subject: [PATCH v1 7/7] event/cnxk: support DMA event functions Date: Tue, 19 Sep 2023 19:12:22 +0530 Message-ID: <20230919134222.2500033-7-amitprakashs@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230919134222.2500033-1-amitprakashs@marvell.com> References: <20230919134222.2500033-1-amitprakashs@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: g1NIZsjgddGI2G7GxPgM_HtJkxpvG-vX X-Proofpoint-GUID: g1NIZsjgddGI2G7GxPgM_HtJkxpvG-vX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-19_06,2023-09-19_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added support of dma driver callback assignment to eventdev enqueue and dequeue. The change also defines dma adapter capabilities function. Signed-off-by: Amit Prakash Shukla --- drivers/event/cnxk/cn10k_eventdev.c | 20 ++++++++++++++++++++ drivers/event/cnxk/cn10k_worker.h | 3 +++ drivers/event/cnxk/cn9k_eventdev.c | 17 +++++++++++++++++ drivers/event/cnxk/cn9k_worker.h | 3 +++ drivers/event/cnxk/meson.build | 3 +-- 5 files changed, 44 insertions(+), 2 deletions(-) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index c5d4be0474..9bb8b8ff01 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -8,6 +8,9 @@ #include "cn10k_cryptodev_ops.h" #include "cnxk_eventdev.h" #include "cnxk_worker.h" +#include "cnxk_dma_event_dp.h" + +#include #define CN10K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \ deq_op = deq_ops[dev->rx_offloads & (NIX_RX_OFFLOAD_MAX - 1)] @@ -469,6 +472,8 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) else event_dev->ca_enqueue = cn10k_cpt_sg_ver1_crypto_adapter_enqueue; + event_dev->dma_enqueue = cn10k_dma_adapter_enqueue; + if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) CN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, sso_hws_tx_adptr_enq_seg); else @@ -978,6 +983,19 @@ cn10k_crypto_adapter_vec_limits(const struct rte_eventdev *event_dev, return 0; } +static int +cn10k_dma_adapter_caps_get(const struct rte_eventdev *event_dev, + const struct rte_dma_dev *dma_dev, uint32_t *caps) +{ + RTE_SET_USED(dma_dev); + + CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn10k", EINVAL); + + *caps = RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_FWD; + + return 0; +} + static struct eventdev_ops cn10k_sso_dev_ops = { .dev_infos_get = cn10k_sso_info_get, .dev_configure = cn10k_sso_dev_configure, @@ -1017,6 +1035,8 @@ static struct eventdev_ops cn10k_sso_dev_ops = { .crypto_adapter_queue_pair_del = cn10k_crypto_adapter_qp_del, .crypto_adapter_vector_limits_get = cn10k_crypto_adapter_vec_limits, + .dma_adapter_caps_get = cn10k_dma_adapter_caps_get, + .xstats_get = cnxk_sso_xstats_get, .xstats_reset = cnxk_sso_xstats_reset, .xstats_get_names = cnxk_sso_xstats_get_names, diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h index e71ab3c523..3d35fcb657 100644 --- a/drivers/event/cnxk/cn10k_worker.h +++ b/drivers/event/cnxk/cn10k_worker.h @@ -7,6 +7,7 @@ #include #include "cn10k_cryptodev_event_dp.h" +#include "cnxk_dma_event_dp.h" #include "cn10k_rx.h" #include "cnxk_worker.h" #include "cn10k_eventdev.h" @@ -226,6 +227,8 @@ cn10k_sso_hws_post_process(struct cn10k_sso_hws *ws, uint64_t *u64, /* Mark vector mempool object as get */ RTE_MEMPOOL_CHECK_COOKIES(rte_mempool_from_obj((void *)u64[1]), (void **)&u64[1], 1, 1); + } else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_DMADEV) { + u64[1] = cnxk_dma_adapter_dequeue(u64[1]); } } diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index f77a9d7085..980932bd12 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -510,6 +510,8 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev) sso_hws_dual_tx_adptr_enq); } + event_dev->dma_enqueue = cn9k_dma_adapter_enqueue; + event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue; rte_mb(); #else @@ -991,6 +993,19 @@ cn9k_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags, cn9k_sso_set_priv_mem); } +static int +cn9k_dma_adapter_caps_get(const struct rte_eventdev *event_dev, + const struct rte_dma_dev *dma_dev, uint32_t *caps) +{ + RTE_SET_USED(dma_dev); + + CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn9k"); + + *caps = RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_FWD; + + return 0; +} + static struct eventdev_ops cn9k_sso_dev_ops = { .dev_infos_get = cn9k_sso_info_get, .dev_configure = cn9k_sso_dev_configure, @@ -1027,6 +1042,8 @@ static struct eventdev_ops cn9k_sso_dev_ops = { .crypto_adapter_queue_pair_add = cn9k_crypto_adapter_qp_add, .crypto_adapter_queue_pair_del = cn9k_crypto_adapter_qp_del, + .dma_adapter_caps_get = cn9k_dma_adapter_caps_get, + .xstats_get = cnxk_sso_xstats_get, .xstats_reset = cnxk_sso_xstats_reset, .xstats_get_names = cnxk_sso_xstats_get_names, diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h index 9ddab095ac..6ac6fffc86 100644 --- a/drivers/event/cnxk/cn9k_worker.h +++ b/drivers/event/cnxk/cn9k_worker.h @@ -11,6 +11,7 @@ #include "cnxk_ethdev.h" #include "cnxk_eventdev.h" #include "cnxk_worker.h" +#include "cnxk_dma_event_dp.h" #include "cn9k_cryptodev_ops.h" #include "cn9k_ethdev.h" @@ -214,6 +215,8 @@ cn9k_sso_hws_post_process(uint64_t *u64, uint64_t mbuf, const uint32_t flags, if (flags & NIX_RX_OFFLOAD_TSTAMP_F) cn9k_sso_process_tstamp(u64[1], mbuf, tstamp[port]); u64[1] = mbuf; + } else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_DMADEV) { + u64[1] = cnxk_dma_adapter_dequeue(u64[1]); } } diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build index 51f1be8848..649419d5d3 100644 --- a/drivers/event/cnxk/meson.build +++ b/drivers/event/cnxk/meson.build @@ -314,8 +314,7 @@ foreach flag: extra_flags endif endforeach -deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk'] - +deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk', 'dma_cnxk'] require_iova_in_mbuf = false annotate_locks = false -- 2.25.1