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From: Haifei Luo <haifeil@nvidia.com>
To: <dev@dpdk.org>
CC: <orika@nvidia.com>, <viacheslavo@nvidia.com>, <rasland@nvidia.com>,
<xuemingl@nvidia.com>, <haifeil@nvidia.com>, Dariusz Sosnowski
<dsosnowski@nvidia.com>, Matan Azrad <matan@nvidia.com>, Suanming Mou
<suanmingm@nvidia.com>
Subject: [PATCH v2 3/5] net/mlx5: enhance the validation for item VXLAN-GPE
Date: Mon, 25 Sep 2023 05:09:18 +0300
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Enhance the validation so that configuring vxlan-gpe's next protocol as NSH
is supported.
1. The spec's protocol can have value and nic_mask's protocol is 0xff.
Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
drivers/net/mlx5/mlx5_flow.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index f7f8f54eb4..202e878ddf 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -3198,6 +3198,11 @@ mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
uint8_t vni[4];
} id = { .vlan_id = 0, };
+ struct rte_flow_item_vxlan_gpe nic_mask = {
+ .vni = "\xff\xff\xff",
+ .protocol = 0xff,
+ };
+
if (!priv->sh->config.l3_vxlan_en)
return rte_flow_error_set(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_ITEM, item,
@@ -3221,18 +3226,12 @@ mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
mask = &rte_flow_item_vxlan_gpe_mask;
ret = mlx5_flow_item_acceptable
(item, (const uint8_t *)mask,
- (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
+ (const uint8_t *)&nic_mask,
sizeof(struct rte_flow_item_vxlan_gpe),
MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
if (ret < 0)
return ret;
if (spec) {
- if (spec->hdr.proto)
- return rte_flow_error_set(error, ENOTSUP,
- RTE_FLOW_ERROR_TYPE_ITEM,
- item,
- "VxLAN-GPE protocol"
- " not supported");
memcpy(&id.vni[1], spec->hdr.vni, 3);
memcpy(&id.vni[1], mask->hdr.vni, 3);
}
--
2.27.0