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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Sep 2023 15:10:56.8611 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a429e366-1184-4bee-dbc7-08dbbdd99ea1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6418 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Sivaprasad Tummala By default, max lcores are limited to 128 for x86 platforms. On AMD EPYC processors, this limit needs to be increased to leverage all the cores. The patch adjusts the limit specifically for native compilation on AMD EPYC CPUs. Signed-off-by: Sivaprasad Tummala --- config/x86/meson.build | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/config/x86/meson.build b/config/x86/meson.build index d8ef50fb40..5355731cef 100644 --- a/config/x86/meson.build +++ b/config/x86/meson.build @@ -83,4 +83,21 @@ endif dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) dpdk_conf.set('RTE_MAX_LCORE', 128) + +epyc_zen_cores = { + '__znver4__':512, + '__znver3__':256, + '__znver2__':256, + '__znver1__':128 + } + +if get_option('platform') == 'native' + foreach m:epyc_zen_cores.keys() + if cc.get_define(m, args: machine_args) != '' + dpdk_conf.set('RTE_MAX_LCORE', epyc_zen_cores[m]) + break + endif + endforeach +endif + dpdk_conf.set('RTE_MAX_NUMA_NODES', 32) -- 2.34.1