From: Nicolas Chautru <nicolas.chautru@intel.com>
To: dev@dpdk.org, maxime.coquelin@redhat.com
Cc: hemant.agrawal@nxp.com, david.marchand@redhat.com,
hernan.vargas@intel.com,
Nicolas Chautru <nicolas.chautru@intel.com>
Subject: [PATCH v4 11/12] baseband/acc: add support for VRB2 engine error detection
Date: Thu, 5 Oct 2023 02:18:53 +0000 [thread overview]
Message-ID: <20231005021854.109096-12-nicolas.chautru@intel.com> (raw)
In-Reply-To: <20231005021854.109096-1-nicolas.chautru@intel.com>
Adding missing incremental functionality for the VRB2
variant. Notably detection of engine error during the
dequeue. Minor cosmetic edits.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc/rte_vrb_pmd.c | 19 ++++++++++++-------
drivers/baseband/acc/vrb1_pf_enum.h | 17 ++++++++++++-----
2 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c
index d2e60d6ca8..eb9c4e4a5c 100644
--- a/drivers/baseband/acc/rte_vrb_pmd.c
+++ b/drivers/baseband/acc/rte_vrb_pmd.c
@@ -1499,6 +1499,7 @@ vrb_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)
fcw->ea = op->turbo_dec.cb_params.e;
fcw->eb = op->turbo_dec.cb_params.e;
}
+
if (op->turbo_dec.rv_index == 0)
fcw->k0_start_col = ACC_FCW_TD_RVIDX_0;
else if (op->turbo_dec.rv_index == 1)
@@ -2073,7 +2074,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ops,
return num;
}
-/* Enqueue one encode operations for device for a partial TB
+/* Enqueue one encode operations for VRB1 device for a partial TB
* all codes blocks have same configuration multiplexed on the same descriptor.
*/
static inline void
@@ -2417,7 +2418,7 @@ enqueue_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
return 1;
}
-/** Enqueue one decode operations for device in CB mode */
+/** Enqueue one decode operations for device in CB mode. */
static inline int
vrb_enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
uint16_t total_enqueued_cbs, bool same_op)
@@ -2981,7 +2982,6 @@ vrb_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
break;
}
avail -= 1;
-
rte_bbdev_log(INFO, "Op %d %d %d %d %d %d %d %d %d %d %d %d\n",
i, ops[i]->ldpc_dec.op_flags, ops[i]->ldpc_dec.rv_index,
ops[i]->ldpc_dec.iter_max, ops[i]->ldpc_dec.iter_count,
@@ -3109,6 +3109,7 @@ vrb_dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
op->status |= ((rsp.input_err) ? (1 << RTE_BBDEV_DATA_ERROR) : 0);
op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
+ op->status |= ((rsp.engine_hung) ? (1 << RTE_BBDEV_ENGINE_ERROR) : 0);
if (desc->req.last_desc_in_batch) {
(*aq_dequeued)++;
@@ -3225,6 +3226,7 @@ vrb_dequeue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
op->status |= ((rsp.input_err) ? (1 << RTE_BBDEV_DATA_ERROR) : 0);
op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
+ op->status |= ((rsp.engine_hung) ? (1 << RTE_BBDEV_ENGINE_ERROR) : 0);
if (desc->req.last_desc_in_batch) {
(*aq_dequeued)++;
@@ -3271,6 +3273,8 @@ vrb_dequeue_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
op->status |= ((rsp.input_err) ? (1 << RTE_BBDEV_DATA_ERROR) : 0);
op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
+ op->status |= rsp.engine_hung << RTE_BBDEV_ENGINE_ERROR;
+
if (op->status != 0) {
/* These errors are not expected. */
q_data->queue_stats.dequeue_err_count++;
@@ -3324,6 +3328,7 @@ vrb_dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
op->status |= rsp.input_err << RTE_BBDEV_DATA_ERROR;
op->status |= rsp.dma_err << RTE_BBDEV_DRV_ERROR;
op->status |= rsp.fcw_err << RTE_BBDEV_DRV_ERROR;
+ op->status |= rsp.engine_hung << RTE_BBDEV_ENGINE_ERROR;
if (op->status != 0)
q_data->queue_stats.dequeue_err_count++;
@@ -3405,6 +3410,7 @@ vrb_dequeue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
op->status |= ((rsp.input_err) ? (1 << RTE_BBDEV_DATA_ERROR) : 0);
op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
+ op->status |= ((rsp.engine_hung) ? (1 << RTE_BBDEV_ENGINE_ERROR) : 0);
if (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK))
tb_crc_check ^= desc->rsp.add_info_1;
@@ -3456,7 +3462,6 @@ vrb_dequeue_enc(struct rte_bbdev_queue_data *q_data,
if (avail == 0)
return 0;
op = acc_op_tail(q, 0);
-
cbm = op->turbo_enc.code_block_mode;
for (i = 0; i < avail; i++) {
@@ -3796,9 +3801,8 @@ vrb_enqueue_fft_one_op(struct acc_queue *q, struct rte_bbdev_fft_op *op,
&in_offset, &out_offset, &win_offset, &pwr_offset);
}
#ifdef RTE_LIBRTE_BBDEV_DEBUG
- rte_memdump(stderr, "FCW", &desc->req.fcw_fft,
- sizeof(desc->req.fcw_fft));
- rte_memdump(stderr, "Req Desc.", desc, sizeof(*desc));
+ rte_memdump(stderr, "FCW", fcw, 128);
+ rte_memdump(stderr, "Req Desc.", desc, 128);
#endif
return 1;
}
@@ -3871,6 +3875,7 @@ vrb_dequeue_fft_one_op(struct rte_bbdev_queue_data *q_data,
op->status |= rsp.input_err << RTE_BBDEV_DATA_ERROR;
op->status |= rsp.dma_err << RTE_BBDEV_DRV_ERROR;
op->status |= rsp.fcw_err << RTE_BBDEV_DRV_ERROR;
+ op->status |= rsp.engine_hung << RTE_BBDEV_ENGINE_ERROR;
if (op->status != 0)
q_data->queue_stats.dequeue_err_count++;
diff --git a/drivers/baseband/acc/vrb1_pf_enum.h b/drivers/baseband/acc/vrb1_pf_enum.h
index 82a36685e9..6dc359800f 100644
--- a/drivers/baseband/acc/vrb1_pf_enum.h
+++ b/drivers/baseband/acc/vrb1_pf_enum.h
@@ -98,11 +98,18 @@ enum {
ACC_PF_INT_DMA_UL5G_DESC_IRQ = 8,
ACC_PF_INT_DMA_DL5G_DESC_IRQ = 9,
ACC_PF_INT_DMA_MLD_DESC_IRQ = 10,
- ACC_PF_INT_ARAM_ECC_1BIT_ERR = 11,
- ACC_PF_INT_PARITY_ERR = 12,
- ACC_PF_INT_QMGR_ERR = 13,
- ACC_PF_INT_INT_REQ_OVERFLOW = 14,
- ACC_PF_INT_APB_TIMEOUT = 15,
+ ACC_PF_INT_ARAM_ACCESS_ERR = 11,
+ ACC_PF_INT_ARAM_ECC_1BIT_ERR = 12,
+ ACC_PF_INT_PARITY_ERR = 13,
+ ACC_PF_INT_QMGR_OVERFLOW = 14,
+ ACC_PF_INT_QMGR_ERR = 15,
+ ACC_PF_INT_ATS_ERR = 22,
+ ACC_PF_INT_ARAM_FUUL = 23,
+ ACC_PF_INT_EXTRA_READ = 24,
+ ACC_PF_INT_COMPLETION_TIMEOUT = 25,
+ ACC_PF_INT_CORE_HANG = 26,
+ ACC_PF_INT_DMA_HANG = 28,
+ ACC_PF_INT_DS_HANG = 27,
};
#endif /* VRB1_PF_ENUM_H */
--
2.34.1
next prev parent reply other threads:[~2023-10-05 2:27 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-05 2:18 [PATCH v4 00/12] VRB2 bbdev PMD introduction Nicolas Chautru
2023-10-05 2:18 ` [PATCH v4 01/12] bbdev: add FFT window width member in driver info Nicolas Chautru
2023-10-05 2:18 ` [PATCH v4 02/12] baseband/acc: add FFT window width in the VRB PMD Nicolas Chautru
2023-10-05 2:18 ` [PATCH v4 03/12] baseband/acc: remove the 4G SO capability for VRB1 Nicolas Chautru
2023-10-05 2:18 ` [PATCH v4 04/12] baseband/acc: allocate FCW memory separately Nicolas Chautru
2023-10-05 2:18 ` [PATCH v4 05/12] baseband/acc: add support for MLD operation Nicolas Chautru
2023-10-05 2:18 ` [PATCH v4 06/12] baseband/acc: refactor to allow unified driver extension Nicolas Chautru
2023-10-05 2:18 ` [PATCH v4 07/12] baseband/acc: adding VRB2 device variant Nicolas Chautru
2023-10-05 2:18 ` [PATCH v4 08/12] baseband/acc: add FEC capabilities for the VRB2 variant Nicolas Chautru
2023-10-05 2:18 ` [PATCH v4 09/12] baseband/acc: add FFT support to " Nicolas Chautru
2023-10-10 9:07 ` Maxime Coquelin
2023-10-05 2:18 ` [PATCH v4 10/12] baseband/acc: add MLD support in " Nicolas Chautru
2023-10-05 2:18 ` Nicolas Chautru [this message]
2023-10-05 2:18 ` [PATCH v4 12/12] baseband/acc: add configure helper for VRB2 Nicolas Chautru
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