From: Gregory Etelson <getelson@nvidia.com>
To: <dev@dpdk.org>
Cc: <getelson@nvidia.com>, <mkashani@nvidia.com>,
<rasland@nvidia.com>, "Hamdan Igbaria" <hamdani@nvidia.com>,
Alex Vesker <valex@nvidia.com>, Matan Azrad <matan@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Ori Kam <orika@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>
Subject: [PATCH 19/30] net/mlx5/hws: support ASO first hit action
Date: Sun, 29 Oct 2023 18:31:51 +0200 [thread overview]
Message-ID: <20231029163202.216450-19-getelson@nvidia.com> (raw)
In-Reply-To: <20231029163202.216450-1-getelson@nvidia.com>
From: Hamdan Igbaria <hamdani@nvidia.com>
Support ASO first hit action.
This action allows tracking if a rule gets hit by a packet.
Signed-off-by: Hamdan Igbaria <hamdani@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/common/mlx5/mlx5_prm.h | 5 +++++
drivers/net/mlx5/hws/mlx5dr.h | 25 +++++++++++++++++++++
drivers/net/mlx5/hws/mlx5dr_action.c | 33 ++++++++++++++++++++++++++++
drivers/net/mlx5/hws/mlx5dr_debug.c | 1 +
4 files changed, 64 insertions(+)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 793fc1a674..40e461cb82 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3541,6 +3541,7 @@ enum {
MLX5_ASO_CT_NUM_PER_OBJ = 1,
MLX5_ASO_METER_NUM_PER_OBJ = 2,
MLX5_ASO_IPSEC_NUM_PER_OBJ = 1,
+ MLX5_ASO_FIRST_HIT_NUM_PER_OBJ = 512,
};
struct mlx5_ifc_stc_ste_param_execute_aso_bits {
@@ -5371,6 +5372,10 @@ enum {
MLX5_FLOW_COLOR_UNDEFINED,
};
+enum {
+ MLX5_ASO_FIRST_HIT_SET = 1,
+};
+
/* Maximum value of srTCM & trTCM metering parameters. */
#define MLX5_SRTCM_XBS_MAX (0xFF * (1ULL << 0x1F))
#define MLX5_SRTCM_XIR_MAX (8 * (1ULL << 30) * 0xFF)
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index e425a8803a..e7d89ad7ec 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -47,6 +47,7 @@ enum mlx5dr_action_type {
MLX5DR_ACTION_TYP_ASO_METER,
MLX5DR_ACTION_TYP_ASO_CT,
MLX5DR_ACTION_TYP_ASO_IPSEC,
+ MLX5DR_ACTION_TYP_ASO_FIRST_HIT,
MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT,
MLX5DR_ACTION_TYP_CRYPTO_DECRYPT,
MLX5DR_ACTION_TYP_DEST_ROOT,
@@ -256,6 +257,11 @@ struct mlx5dr_rule_action {
uint32_t offset;
} aso_ipsec;
+ struct {
+ uint32_t offset;
+ bool set;
+ } aso_first_hit;
+
struct {
uint32_t offset;
} crypto;
@@ -714,6 +720,25 @@ mlx5dr_action_create_aso_ipsec(struct mlx5dr_context *ctx,
uint8_t return_reg_id,
uint32_t flags);
+/* Create direct rule ASO FIRST HIT action.
+ *
+ * @param[in] ctx
+ * The context in which the new action will be created.
+ * @param[in] devx_obj
+ * The DEVX ASO object.
+ * @param[in] return_reg_id
+ * When a packet hits a flow connected to this object, a flag is set indicating this event,
+ * copy the original value of this flag into this reg_id.
+ * @param[in] flags
+ * Action creation flags. (enum mlx5dr_action_flags)
+ * @return pointer to mlx5dr_action on success NULL otherwise.
+ */
+struct mlx5dr_action *
+mlx5dr_action_create_aso_first_hit(struct mlx5dr_context *ctx,
+ struct mlx5dr_devx_obj *devx_obj,
+ uint8_t return_reg_id,
+ uint32_t flags);
+
/* Create direct rule pop vlan action.
* @param[in] ctx
* The context in which the new action will be created.
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index f8de3d8d98..fe9c39b207 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -7,6 +7,7 @@
#define WIRE_PORT 0xFFFF
#define MLX5DR_ACTION_METER_INIT_COLOR_OFFSET 1
+#define MLX5DR_ACTION_ASO_FIRST_HIT_SET_OFFSET 9
/* This is the maximum allowed action order for each table type:
* TX: POP_VLAN, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, TRAILER, ENCRYPT,
@@ -29,6 +30,7 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_ASO_METER),
BIT(MLX5DR_ACTION_TYP_ASO_CT),
BIT(MLX5DR_ACTION_TYP_ASO_IPSEC),
+ BIT(MLX5DR_ACTION_TYP_ASO_FIRST_HIT),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
@@ -49,6 +51,7 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_ASO_METER),
BIT(MLX5DR_ACTION_TYP_ASO_CT),
BIT(MLX5DR_ACTION_TYP_ASO_IPSEC),
+ BIT(MLX5DR_ACTION_TYP_ASO_FIRST_HIT),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
@@ -73,6 +76,7 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_ASO_METER),
BIT(MLX5DR_ACTION_TYP_ASO_CT),
BIT(MLX5DR_ACTION_TYP_ASO_IPSEC),
+ BIT(MLX5DR_ACTION_TYP_ASO_FIRST_HIT),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
@@ -672,6 +676,13 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action,
attr->aso.devx_obj_id = obj->id;
attr->aso.return_reg_id = action->aso.return_reg_id;
break;
+ case MLX5DR_ACTION_TYP_ASO_FIRST_HIT:
+ attr->action_offset = MLX5DR_ACTION_OFFSET_DW6;
+ attr->action_type = MLX5_IFC_STC_ACTION_TYPE_ASO;
+ attr->aso.aso_type = ASO_OPC_MOD_FLOW_HIT;
+ attr->aso.devx_obj_id = obj->id;
+ attr->aso.return_reg_id = action->aso.return_reg_id;
+ break;
case MLX5DR_ACTION_TYP_VPORT:
attr->action_offset = MLX5DR_ACTION_OFFSET_HIT;
attr->action_type = MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_VPORT;
@@ -1123,6 +1134,16 @@ mlx5dr_action_create_aso_ipsec(struct mlx5dr_context *ctx,
devx_obj, return_reg_id, flags);
}
+struct mlx5dr_action *
+mlx5dr_action_create_aso_first_hit(struct mlx5dr_context *ctx,
+ struct mlx5dr_devx_obj *devx_obj,
+ uint8_t return_reg_id,
+ uint32_t flags)
+{
+ return mlx5dr_action_create_aso(ctx, MLX5DR_ACTION_TYP_ASO_FIRST_HIT,
+ devx_obj, return_reg_id, flags);
+}
+
struct mlx5dr_action *
mlx5dr_action_create_counter(struct mlx5dr_context *ctx,
struct mlx5dr_devx_obj *obj,
@@ -2185,6 +2206,7 @@ static void mlx5dr_action_destroy_hws(struct mlx5dr_action *action)
case MLX5DR_ACTION_TYP_ASO_METER:
case MLX5DR_ACTION_TYP_ASO_CT:
case MLX5DR_ACTION_TYP_ASO_IPSEC:
+ case MLX5DR_ACTION_TYP_ASO_FIRST_HIT:
case MLX5DR_ACTION_TYP_PUSH_VLAN:
case MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT:
case MLX5DR_ACTION_TYP_CRYPTO_DECRYPT:
@@ -2601,6 +2623,15 @@ mlx5dr_action_setter_aso(struct mlx5dr_actions_apply_data *apply,
offset = rule_action->aso_ipsec.offset / MLX5_ASO_IPSEC_NUM_PER_OBJ;
exe_aso_ctrl = 0;
break;
+ case MLX5DR_ACTION_TYP_ASO_FIRST_HIT:
+ /* exe_aso_ctrl FIRST HIT format:
+ * [STC only and reserved bits 22b][set 1b][offset 9b]
+ */
+ offset = rule_action->aso_first_hit.offset / MLX5_ASO_FIRST_HIT_NUM_PER_OBJ;
+ exe_aso_ctrl = rule_action->aso_first_hit.offset % MLX5_ASO_FIRST_HIT_NUM_PER_OBJ;
+ exe_aso_ctrl |= rule_action->aso_first_hit.set <<
+ MLX5DR_ACTION_ASO_FIRST_HIT_SET_OFFSET;
+ break;
default:
DR_LOG(ERR, "Unsupported ASO action type: %d", rule_action->action->type);
rte_errno = ENOTSUP;
@@ -2803,6 +2834,8 @@ int mlx5dr_action_template_process(struct mlx5dr_action_template *at)
case MLX5DR_ACTION_TYP_ASO_METER:
case MLX5DR_ACTION_TYP_ASO_CT:
case MLX5DR_ACTION_TYP_ASO_IPSEC:
+ case MLX5DR_ACTION_TYP_ASO_FIRST_HIT:
+ /* Double ASO action */
setter = mlx5dr_action_setter_find_first(last_setter, ASF_DOUBLE);
setter->flags |= ASF_DOUBLE;
setter->set_double = &mlx5dr_action_setter_aso;
diff --git a/drivers/net/mlx5/hws/mlx5dr_debug.c b/drivers/net/mlx5/hws/mlx5dr_debug.c
index 976a1993e3..552dba5e63 100644
--- a/drivers/net/mlx5/hws/mlx5dr_debug.c
+++ b/drivers/net/mlx5/hws/mlx5dr_debug.c
@@ -24,6 +24,7 @@ const char *mlx5dr_debug_action_type_str[] = {
[MLX5DR_ACTION_TYP_ASO_METER] = "ASO_METER",
[MLX5DR_ACTION_TYP_ASO_CT] = "ASO_CT",
[MLX5DR_ACTION_TYP_ASO_IPSEC] = "ASO_IPSEC",
+ [MLX5DR_ACTION_TYP_ASO_FIRST_HIT] = "ASO_FIRST_HIT",
[MLX5DR_ACTION_TYP_DEST_ROOT] = "DEST_ROOT",
[MLX5DR_ACTION_TYP_DEST_ARRAY] = "DEST_ARRAY",
[MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT] = "CRYPTO_ENCRYPT",
--
2.39.2
next prev parent reply other threads:[~2023-10-29 16:35 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-29 16:31 [PATCH 01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data Gregory Etelson
2023-10-29 16:31 ` [PATCH 02/30] net/mlx5: add flow_hw_get_reg_id_from_ctx() Gregory Etelson
2023-10-29 16:31 ` [PATCH 03/30] net/mlx5/hws: Definer, use flow_hw_get_reg_id_from_ctx function call Gregory Etelson
2023-10-29 16:31 ` [PATCH 04/30] net/mlx5: add rte_device parameter to locate HWS registers Gregory Etelson
2023-11-05 20:27 ` Thomas Monjalon
2023-10-29 16:31 ` [PATCH 05/30] net/mlx5: separate port REG_C registers usage Gregory Etelson
2023-10-29 16:31 ` [PATCH 06/30] net/mlx5: merge REG_C aliases Gregory Etelson
2023-10-29 16:31 ` [PATCH 07/30] net/mlx5: initialize HWS flow tags registers in shared dev context Gregory Etelson
2023-10-29 16:31 ` [PATCH 08/30] net/mlx5/hws: adding method to query rule hash Gregory Etelson
2023-10-29 16:31 ` [PATCH 09/30] net/mlx5: add support for calc hash Gregory Etelson
2023-10-29 16:31 ` [PATCH 10/30] net/mlx5: fix insert by index Gregory Etelson
2023-10-29 16:31 ` [PATCH 11/30] net/mlx5: fix query for NIC flow cap Gregory Etelson
2023-10-29 16:31 ` [PATCH 12/30] net/mlx5: add support for more registers Gregory Etelson
2023-10-29 16:31 ` [PATCH 13/30] net/mlx5: add validation support for tags Gregory Etelson
2023-10-29 16:31 ` [PATCH 14/30] net/mlx5: reuse reformat and modify header actions in a table Gregory Etelson
2023-10-29 16:31 ` [PATCH 15/30] net/mlx5/hws: check the rule status on rule update Gregory Etelson
2023-10-29 16:31 ` [PATCH 16/30] net/mlx5/hws: support IPsec encryption/decryption action Gregory Etelson
2023-10-29 16:31 ` [PATCH 17/30] net/mlx5/hws: support ASO IPsec action Gregory Etelson
2023-10-29 16:31 ` [PATCH 18/30] net/mlx5/hws: support reformat trailer action Gregory Etelson
2023-10-29 16:31 ` Gregory Etelson [this message]
2023-10-29 16:31 ` [PATCH 20/30] net/mlx5/hws: support insert header action Gregory Etelson
2023-10-29 16:31 ` [PATCH 21/30] net/mlx5/hws: support remove " Gregory Etelson
2023-10-29 16:31 ` [PATCH 22/30] net/mlx5/hws: allow jump to TIR over FDB Gregory Etelson
2023-10-29 16:31 ` [PATCH 23/30] net/mlx5/hws: support dynamic re-parse Gregory Etelson
2023-10-29 16:31 ` [PATCH 24/30] net/mlx5/hws: dynamic re-parse for modify header Gregory Etelson
2023-10-29 16:31 ` [PATCH 25/30] net/mlx5: sample the srv6 last segment Gregory Etelson
2023-10-29 16:31 ` [PATCH 26/30] net/mlx5/hws: fix potential wrong errno value Gregory Etelson
2023-10-29 16:31 ` [PATCH 27/30] net/mlx5/hws: add IPv6 routing extension push remove actions Gregory Etelson
2023-10-29 16:32 ` [PATCH 28/30] net/mlx5/hws: add setter for IPv6 routing push remove Gregory Etelson
2023-10-29 16:32 ` [PATCH 29/30] net/mlx5: implement " Gregory Etelson
2023-10-29 16:32 ` [PATCH 30/30] net/mlx5/hws: add stc reparse support for srv6 push pop Gregory Etelson
2023-11-05 18:49 ` [PATCH 01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data Thomas Monjalon
2023-11-06 7:32 ` Etelson, Gregory
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