From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F263343238; Sun, 29 Oct 2023 17:37:10 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0246C42DFE; Sun, 29 Oct 2023 17:34:38 +0100 (CET) Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2043.outbound.protection.outlook.com [40.107.243.43]) by mails.dpdk.org (Postfix) with ESMTP id ABA9E409FA for ; Sun, 29 Oct 2023 17:34:05 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=QjydXYnWmjfYCttp9U2TzrHZfWv19/EDLOH2M7DFhUpChcXYy0lHwHjsM9qCzSrsmYya+HKP2tu0NcbVoIs/IuByp4hef/oXCypgJUyBcKSfgDyY0dZJJ/3CdRZ8OcmuZC3nAmhppdN9Rp0KFY98/aP7UiyrtbIgaRenuqoda/yIQAHnsg72z3Gx3wuYgCpzhNmiV1yrvLLlaxhmwT4TslOg0MA0aqC9grKs886vRvCPtg40twu4zj08cYhrSo1bbr1+LMmlIieQ578kfkVFZKErC4Zvg5Fm9E3W6M88P4VFU68zNwNQ11piXHYHoHsgi8uOB5PhLivuuj5bzJ3bgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=lUyr6nBdU2CNAyEtgM35ZdkJk4cHgMxAu7pN2kHnjo8=; b=G3B2Yv1hE8LGR1FFeXXvHXo5BzvALfKh5prtwu+TUIhPIu5B/cQ6FrX5rWXNtsjCrN2CgzUwYh7xrZguL42f70b+G9b+ZLnfoB8l5byhauMOeM2kGr0Ia3UZjiQgKWR1fyHZ5CiD4u4st+Sa+XkbRto1pG0YrUd30i4RPUGFoKqKBn9xOkN0nhtzoFnRhbjywcQ93yC5+Wr7XpB9eJi6MyGW/drjQ30UcsdM6NB5WhhBYQXIGPEzi8MyD1Igp8Ub6WCchZtnbRwr3Jc0K2xLqgP2h8iY0Pw9EkN+QIVUIPYQlg1rKmZL9TXPORcGPwPMDjmREHDsSgGaticD5DZdVQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=lUyr6nBdU2CNAyEtgM35ZdkJk4cHgMxAu7pN2kHnjo8=; b=ga0SCUcDKWUIjAdQk4rLMYjty5JqgawB6wg172VrsKGsuYukfPxzYyWO7I9/al+2BJowyfivLDlHXSt8CRxcKly7EyS6zUSoy92pADmGDlH5E//IqdWiJRAW7ocYiJBZeRNd0H0y9uV8lqaOwzdwrxXMcr3Y+ScG5DXWV6rWcWk1/JlUoOKoF0OhoTfDwflSid/HaNnLdsoxBrxxQNVmn5GvrKHOf7yHcbkReledIK0F4zeifsUvJJUucpbOEgIcw2vD9dQvM1jNqKvrJGXFwvJMPFk9x4wSjL38AeXeA36Fv6TEtmNuwzixoAE1c3Xz3p2aJ3yRqmBXGPuTFWrwCg== Received: from BY3PR05CA0058.namprd05.prod.outlook.com (2603:10b6:a03:39b::33) by DS0PR12MB8814.namprd12.prod.outlook.com (2603:10b6:8:14e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6933.26; Sun, 29 Oct 2023 16:34:03 +0000 Received: from DS2PEPF00003448.namprd04.prod.outlook.com (2603:10b6:a03:39b:cafe::ef) by BY3PR05CA0058.outlook.office365.com (2603:10b6:a03:39b::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6954.14 via Frontend Transport; Sun, 29 Oct 2023 16:34:03 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by DS2PEPF00003448.mail.protection.outlook.com (10.167.17.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6933.15 via Frontend Transport; Sun, 29 Oct 2023 16:34:02 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 29 Oct 2023 09:33:55 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 29 Oct 2023 09:33:52 -0700 From: Gregory Etelson To: CC: , , , Rongwei Liu , Erez Shitrit , Ori Kam , Matan Azrad , Viacheslav Ovsiienko , Suanming Mou Subject: [PATCH 30/30] net/mlx5/hws: add stc reparse support for srv6 push pop Date: Sun, 29 Oct 2023 18:32:02 +0200 Message-ID: <20231029163202.216450-30-getelson@nvidia.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231029163202.216450-1-getelson@nvidia.com> References: <20231029163202.216450-1-getelson@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003448:EE_|DS0PR12MB8814:EE_ X-MS-Office365-Filtering-Correlation-Id: 849e6a66-f347-47d5-accb-08dbd89cdc7b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Sav8sPUQltmQZlU4S8pJkxuYPHpMpkgRVcDb9/O5TSI8Ye0FzAf49AHBWk/bTEG/nnHgZh5da4rQA3D6cV+4OqobYe48nmu52h4m6R2pF1ciJ0RKfdlQ2dIe2nlpM4DoesKdELa7AF6OPRi1ucV2pnoYxcKmMDPtYz+iGfaSZKP8IlbPg/xgL2fqYlTlzR3ddmgpUUdKkvTJv2L8fimHOYOoJ+3nKF8Y3/rKC+5SqwV6fLF6c838chFbCOmADjDLwewj9hVOtw3uq59/ihRvKmufRN5RMXje6GCZZ1shv/vncW3NcEW0Racpv6s4UWrZMijegZxEM4cfWr+4Hr9X45iN+M+DKQ0XKeCnBeSqb7AcO/x31X1hChjulRy2J2Dj2BIUAjmN8VakLBlOs4SuP/2dmlwNodnCeMKJXqqXlvnpXoDLYDCwZnsa2PuZjH+KrQkuD6z0MjNAXQ/phxf3BS8HR4BgS1NIomdm+zDmrG3MDQxoMhB8YGhtloYm/lPtZ/yYe5K7Gizp6JrKG66R8IGJxb0QlF7Y9ozNDKC/Mktgph8bMo3DWhRz3gmlhoIis5I3pg7gyCuafNU9+Ftzd7RjuLhOynhWr3Ln8mY5zn2A5pyKFGodi6Lqf/AeYcRT42OWvUSrEnyYno+0vDaYbMF9RaxxcGvYELjZVa7bzHb/k+MGzyLX0voY2K5pZYpz8+bZEkB4ZHghIJ6PWi/l0u6Mp7tMVzXpEJMtdWNvU0yXjaypTKkt58ih48DgllvLCKPlUPqY4fkHzBpZNu0xXSGZMgQXIrdbeEQTQKmKGFQ= X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(4636009)(39860400002)(346002)(136003)(396003)(376002)(230173577357003)(230922051799003)(230273577357003)(186009)(64100799003)(82310400011)(1800799009)(451199024)(46966006)(40470700004)(36840700001)(40460700003)(7696005)(55016003)(6666004)(83380400001)(426003)(336012)(82740400003)(86362001)(7636003)(356005)(47076005)(36756003)(36860700001)(107886003)(2616005)(1076003)(40480700001)(16526019)(6286002)(26005)(41300700001)(70586007)(70206006)(316002)(54906003)(6916009)(5660300002)(478600001)(8936002)(4326008)(8676002)(30864003)(2906002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2023 16:34:02.7241 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 849e6a66-f347-47d5-accb-08dbd89cdc7b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003448.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8814 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Rongwei Liu After pushing/popping srv6 into/from IPv6 packets, the checksum needs to be correct. In order to achieve this, there is a need to control each STE' reparse behavior(CX7 and above). Add two more flags enumeration definitions to allow external control of reparse property in stc. 1. Push a. 1st STE, insert header action, reparse ignored(default reparse always) b. 2nd STE, modify IPv6 protocol, reparse always as default. c. 3rd STE, modify header list, reparse always(default reparse ignored) 2. Pop a. 1st STE, modify header list, reparse always(default reparse ignored) b. 2nd STE, modify header list, reparse always(default reparse ignored) c. 3rd STE, modify IPv6 protocol, reparse ignored(default reparse always); remove header action, reparse always as default. For CX6Lx and CX6Dx, the reparse behavior is controlled by RTC as always. Only pop action can work well. Signed-off-by: Rongwei Liu Reviewed-by: Erez Shitrit Acked-by: Ori Kam --- drivers/net/mlx5/hws/mlx5dr_action.c | 115 +++++++++++++++++++-------- drivers/net/mlx5/hws/mlx5dr_action.h | 7 ++ 2 files changed, 87 insertions(+), 35 deletions(-) diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c index 281b09a582..daeabead2a 100644 --- a/drivers/net/mlx5/hws/mlx5dr_action.c +++ b/drivers/net/mlx5/hws/mlx5dr_action.c @@ -640,6 +640,7 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action, case MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2: case MLX5DR_ACTION_TYP_MODIFY_HDR: attr->action_offset = MLX5DR_ACTION_OFFSET_DW6; + attr->reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE; if (action->modify_header.require_reparse) attr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS; @@ -678,9 +679,12 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action, case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2: case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3: case MLX5DR_ACTION_TYP_INSERT_HEADER: + attr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS; + if (!action->reformat.require_reparse) + attr->reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE; + attr->action_type = MLX5_IFC_STC_ACTION_TYPE_HEADER_INSERT; attr->action_offset = MLX5DR_ACTION_OFFSET_DW6; - attr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS; attr->insert_header.encap = action->reformat.encap; attr->insert_header.insert_anchor = action->reformat.anchor; attr->insert_header.arg_id = action->reformat.arg_obj->id; @@ -1441,7 +1445,7 @@ static int mlx5dr_action_handle_insert_with_ptr(struct mlx5dr_action *action, uint8_t num_of_hdrs, struct mlx5dr_action_reformat_header *hdrs, - uint32_t log_bulk_sz) + uint32_t log_bulk_sz, uint32_t reparse) { struct mlx5dr_devx_obj *arg_obj; size_t max_sz = 0; @@ -1478,6 +1482,11 @@ mlx5dr_action_handle_insert_with_ptr(struct mlx5dr_action *action, action[i].reformat.encap = 1; } + if (likely(reparse == MLX5DR_ACTION_STC_REPARSE_DEFAULT)) + action[i].reformat.require_reparse = true; + else if (reparse == MLX5DR_ACTION_STC_REPARSE_ON) + action[i].reformat.require_reparse = true; + ret = mlx5dr_action_create_stcs(&action[i], NULL); if (ret) { DR_LOG(ERR, "Failed to create stc for reformat"); @@ -1514,7 +1523,8 @@ mlx5dr_action_handle_l2_to_tunnel_l3(struct mlx5dr_action *action, ret = mlx5dr_action_handle_insert_with_ptr(action, num_of_hdrs, hdrs, - log_bulk_sz); + log_bulk_sz, + MLX5DR_ACTION_STC_REPARSE_DEFAULT); if (ret) goto put_shared_stc; @@ -1657,7 +1667,8 @@ mlx5dr_action_create_reformat_hws(struct mlx5dr_action *action, ret = mlx5dr_action_create_stcs(action, NULL); break; case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2: - ret = mlx5dr_action_handle_insert_with_ptr(action, num_of_hdrs, hdrs, bulk_size); + ret = mlx5dr_action_handle_insert_with_ptr(action, num_of_hdrs, hdrs, bulk_size, + MLX5DR_ACTION_STC_REPARSE_DEFAULT); break; case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3: ret = mlx5dr_action_handle_l2_to_tunnel_l3(action, num_of_hdrs, hdrs, bulk_size); @@ -1765,7 +1776,8 @@ static int mlx5dr_action_create_modify_header_hws(struct mlx5dr_action *action, uint8_t num_of_patterns, struct mlx5dr_action_mh_pattern *pattern, - uint32_t log_bulk_size) + uint32_t log_bulk_size, + uint32_t reparse) { struct mlx5dr_devx_obj *pat_obj, *arg_obj = NULL; struct mlx5dr_context *ctx = action->ctx; @@ -1799,8 +1811,12 @@ mlx5dr_action_create_modify_header_hws(struct mlx5dr_action *action, action[i].modify_header.num_of_patterns = num_of_patterns; action[i].modify_header.max_num_of_actions = max_mh_actions; action[i].modify_header.num_of_actions = num_actions; - action[i].modify_header.require_reparse = - mlx5dr_pat_require_reparse(pattern[i].data, num_actions); + + if (likely(reparse == MLX5DR_ACTION_STC_REPARSE_DEFAULT)) + action[i].modify_header.require_reparse = + mlx5dr_pat_require_reparse(pattern[i].data, num_actions); + else if (reparse == MLX5DR_ACTION_STC_REPARSE_ON) + action[i].modify_header.require_reparse = true; if (num_actions == 1) { pat_obj = NULL; @@ -1843,12 +1859,12 @@ mlx5dr_action_create_modify_header_hws(struct mlx5dr_action *action, return rte_errno; } -struct mlx5dr_action * -mlx5dr_action_create_modify_header(struct mlx5dr_context *ctx, - uint8_t num_of_patterns, - struct mlx5dr_action_mh_pattern *patterns, - uint32_t log_bulk_size, - uint32_t flags) +static struct mlx5dr_action * +mlx5dr_action_create_modify_header_reparse(struct mlx5dr_context *ctx, + uint8_t num_of_patterns, + struct mlx5dr_action_mh_pattern *patterns, + uint32_t log_bulk_size, + uint32_t flags, uint32_t reparse) { struct mlx5dr_action *action; int ret; @@ -1896,7 +1912,8 @@ mlx5dr_action_create_modify_header(struct mlx5dr_context *ctx, ret = mlx5dr_action_create_modify_header_hws(action, num_of_patterns, patterns, - log_bulk_size); + log_bulk_size, + reparse); if (ret) goto free_action; @@ -1907,6 +1924,17 @@ mlx5dr_action_create_modify_header(struct mlx5dr_context *ctx, return NULL; } +struct mlx5dr_action * +mlx5dr_action_create_modify_header(struct mlx5dr_context *ctx, + uint8_t num_of_patterns, + struct mlx5dr_action_mh_pattern *patterns, + uint32_t log_bulk_size, + uint32_t flags) +{ + return mlx5dr_action_create_modify_header_reparse(ctx, num_of_patterns, patterns, + log_bulk_size, flags, + MLX5DR_ACTION_STC_REPARSE_DEFAULT); +} static struct mlx5dr_devx_obj * mlx5dr_action_dest_array_process_reformat(struct mlx5dr_context *ctx, enum mlx5dr_action_type type, @@ -2254,12 +2282,12 @@ mlx5dr_action_create_reformat_trailer(struct mlx5dr_context *ctx, return action; } -struct mlx5dr_action * -mlx5dr_action_create_insert_header(struct mlx5dr_context *ctx, - uint8_t num_of_hdrs, - struct mlx5dr_action_insert_header *hdrs, - uint32_t log_bulk_size, - uint32_t flags) +static struct mlx5dr_action * +mlx5dr_action_create_insert_header_reparse(struct mlx5dr_context *ctx, + uint8_t num_of_hdrs, + struct mlx5dr_action_insert_header *hdrs, + uint32_t log_bulk_size, + uint32_t flags, uint32_t reparse) { struct mlx5dr_action_reformat_header *reformat_hdrs; struct mlx5dr_action *action; @@ -2312,7 +2340,8 @@ mlx5dr_action_create_insert_header(struct mlx5dr_context *ctx, } ret = mlx5dr_action_handle_insert_with_ptr(action, num_of_hdrs, - reformat_hdrs, log_bulk_size); + reformat_hdrs, log_bulk_size, + reparse); if (ret) { DR_LOG(ERR, "Failed to create HWS reformat action"); goto free_reformat_hdrs; @@ -2329,6 +2358,18 @@ mlx5dr_action_create_insert_header(struct mlx5dr_context *ctx, return NULL; } +struct mlx5dr_action * +mlx5dr_action_create_insert_header(struct mlx5dr_context *ctx, + uint8_t num_of_hdrs, + struct mlx5dr_action_insert_header *hdrs, + uint32_t log_bulk_size, + uint32_t flags) +{ + return mlx5dr_action_create_insert_header_reparse(ctx, num_of_hdrs, hdrs, + log_bulk_size, flags, + MLX5DR_ACTION_STC_REPARSE_DEFAULT); +} + struct mlx5dr_action * mlx5dr_action_create_remove_header(struct mlx5dr_context *ctx, struct mlx5dr_action_remove_header_attr *attr, @@ -2422,8 +2463,9 @@ mlx5dr_action_create_pop_ipv6_route_ext_mhdr1(struct mlx5dr_action *action) pattern.data = cmd; pattern.sz = sizeof(cmd); - return mlx5dr_action_create_modify_header(action->ctx, 1, &pattern, - 0, action->flags); + return mlx5dr_action_create_modify_header_reparse(action->ctx, 1, &pattern, 0, + action->flags, + MLX5DR_ACTION_STC_REPARSE_ON); } static void * @@ -2469,8 +2511,9 @@ mlx5dr_action_create_pop_ipv6_route_ext_mhdr2(struct mlx5dr_action *action) pattern.data = cmd; pattern.sz = sizeof(cmd); - return mlx5dr_action_create_modify_header(action->ctx, 1, &pattern, - 0, action->flags); + return mlx5dr_action_create_modify_header_reparse(action->ctx, 1, &pattern, 0, + action->flags, + MLX5DR_ACTION_STC_REPARSE_ON); } static void * @@ -2496,8 +2539,9 @@ mlx5dr_action_create_pop_ipv6_route_ext_mhdr3(struct mlx5dr_action *action) pattern.data = (__be64 *)cmd; pattern.sz = sizeof(cmd); - return mlx5dr_action_create_modify_header(action->ctx, 1, &pattern, - 0, action->flags); + return mlx5dr_action_create_modify_header_reparse(action->ctx, 1, &pattern, 0, + action->flags, + MLX5DR_ACTION_STC_REPARSE_OFF); } static int @@ -2644,8 +2688,9 @@ mlx5dr_action_create_push_ipv6_route_ext(struct mlx5dr_action *action, insert_hdr.hdr.sz = hdr->sz; insert_hdr.hdr.data = header; action->ipv6_route_ext.action[0] = - mlx5dr_action_create_insert_header(action->ctx, 1, &insert_hdr, - bulk_size, action->flags); + mlx5dr_action_create_insert_header_reparse(action->ctx, 1, &insert_hdr, + bulk_size, action->flags, + MLX5DR_ACTION_STC_REPARSE_OFF); action->ipv6_route_ext.action[1] = mlx5dr_action_create_push_ipv6_route_ext_mhdr1(action); action->ipv6_route_ext.action[2] = @@ -2678,12 +2723,6 @@ mlx5dr_action_create_reformat_ipv6_ext(struct mlx5dr_context *ctx, struct mlx5dr_action *action; int ret; - if (mlx5dr_context_cap_dynamic_reparse(ctx)) { - DR_LOG(ERR, "IPv6 extension actions is not supported"); - rte_errno = ENOTSUP; - return NULL; - } - if (!mlx5dr_action_is_hws_flags(flags) || ((flags & MLX5DR_ACTION_FLAG_SHARED) && log_bulk_size)) { DR_LOG(ERR, "IPv6 extension flags don't fit HWS (flags: 0x%x)", flags); @@ -2708,6 +2747,12 @@ mlx5dr_action_create_reformat_ipv6_ext(struct mlx5dr_context *ctx, ret = mlx5dr_action_create_pop_ipv6_route_ext(action); break; case MLX5DR_ACTION_TYP_PUSH_IPV6_ROUTE_EXT: + if (!mlx5dr_context_cap_dynamic_reparse(ctx)) { + DR_LOG(ERR, "IPv6 routing extension push actions is not supported"); + rte_errno = ENOTSUP; + goto free_action; + } + ret = mlx5dr_action_create_push_ipv6_route_ext(action, hdr, log_bulk_size); break; default: diff --git a/drivers/net/mlx5/hws/mlx5dr_action.h b/drivers/net/mlx5/hws/mlx5dr_action.h index ce9091a336..ec6605bf7a 100644 --- a/drivers/net/mlx5/hws/mlx5dr_action.h +++ b/drivers/net/mlx5/hws/mlx5dr_action.h @@ -65,6 +65,12 @@ enum mlx5dr_action_setter_flag { ASF_HIT = 1 << 7, }; +enum mlx5dr_action_stc_reparse { + MLX5DR_ACTION_STC_REPARSE_DEFAULT, + MLX5DR_ACTION_STC_REPARSE_ON, + MLX5DR_ACTION_STC_REPARSE_OFF, +}; + struct mlx5dr_action_default_stc { struct mlx5dr_pool_chunk nop_ctr; struct mlx5dr_pool_chunk nop_dw5; @@ -146,6 +152,7 @@ struct mlx5dr_action { uint8_t anchor; uint8_t offset; bool encap; + uint8_t require_reparse; } reformat; struct { struct mlx5dr_action -- 2.39.2