From: Jie Hai <haijie1@huawei.com>
To: <dev@dpdk.org>, Yisen Zhuang <yisen.zhuang@huawei.com>,
Huisong Li <lihuisong@huawei.com>,
Chengwen Feng <fengchengwen@huawei.com>,
Chengchang Tang <tangchengchang@huawei.com>,
"Wei Hu (Xavier)" <xavier.huwei@huawei.com>,
"Min Hu (Connor)" <humin29@huawei.com>
Cc: <liudongdong3@huawei.com>
Subject: [PATCH 2/6] net/hns3: fix LRO offload to report
Date: Tue, 31 Oct 2023 20:23:55 +0800 [thread overview]
Message-ID: <20231031122359.3930935-3-haijie1@huawei.com> (raw)
In-Reply-To: <20231031122359.3930935-1-haijie1@huawei.com>
From: Huisong Li <lihuisong@huawei.com>
Some network engines, like part of HIP09, may not support LRO
offload, but this offload capability is also reported to user.
So this patch determines whether driver reports this capability
based on the capabilities from firmware.
In addition, some network engines, like HIP08, always support LRO
offload and their firmware don't report this capability. So this
patch has to move getting revision ID codes to earlier stage and set
default capabilities for these network engines based on revision ID.
Fixes: ab2e2e344163 ("net/hns3: get device capability in primary process")
Fixes: f5ed7d99cf45 ("net/hns3: extract common function to obtain revision ID")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Jie Hai <haijie1@huawei.com>
---
drivers/net/hns3/hns3_cmd.c | 17 ++++++++++++++++-
drivers/net/hns3/hns3_cmd.h | 1 +
drivers/net/hns3/hns3_common.c | 5 +++--
drivers/net/hns3/hns3_dump.c | 3 ++-
drivers/net/hns3/hns3_ethdev.c | 8 ++++----
drivers/net/hns3/hns3_ethdev.h | 1 +
drivers/net/hns3/hns3_ethdev_vf.c | 8 ++++----
drivers/net/hns3/hns3_rxtx.c | 3 +++
8 files changed, 34 insertions(+), 12 deletions(-)
diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index 62c55f347fa3..a5c4c11dc8c4 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -513,6 +513,8 @@ hns3_parse_capability(struct hns3_hw *hw,
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_TM_B, 1);
if (hns3_get_bit(caps, HNS3_CAPS_FC_AUTO_B))
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_FC_AUTO_B, 1);
+ if (hns3_get_bit(caps, HNS3_CAPS_GRO_B))
+ hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_GRO_B, 1);
}
static uint32_t
@@ -547,6 +549,19 @@ hns3_set_dcb_capability(struct hns3_hw *hw)
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1);
}
+static void
+hns3_set_default_capability(struct hns3_hw *hw)
+{
+ hns3_set_dcb_capability(hw);
+
+ /*
+ * The firmware of the network engines with HIP08 do not report some
+ * capabilities, like GRO. Set default capabilities for it.
+ */
+ if (hw->revision < PCI_REVISION_ID_HIP09_A)
+ hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_GRO_B, 1);
+}
+
static int
hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw)
{
@@ -565,7 +580,7 @@ hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw)
hw->fw_version = rte_le_to_cpu_32(resp->firmware);
- hns3_set_dcb_capability(hw);
+ hns3_set_default_capability(hw);
/*
* Make sure mask the capability before parse capability because it
diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h
index 3f2bb4fd292c..79a8c1edad56 100644
--- a/drivers/net/hns3/hns3_cmd.h
+++ b/drivers/net/hns3/hns3_cmd.h
@@ -323,6 +323,7 @@ enum HNS3_CAPS_BITS {
HNS3_CAPS_RAS_IMP_B,
HNS3_CAPS_RXD_ADV_LAYOUT_B = 15,
HNS3_CAPS_TM_B = 19,
+ HNS3_CAPS_GRO_B = 20,
HNS3_CAPS_FC_AUTO_B = 30,
};
diff --git a/drivers/net/hns3/hns3_common.c b/drivers/net/hns3/hns3_common.c
index c4d47f43fe44..9327adbdc113 100644
--- a/drivers/net/hns3/hns3_common.c
+++ b/drivers/net/hns3/hns3_common.c
@@ -70,8 +70,7 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
RTE_ETH_RX_OFFLOAD_SCATTER |
RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
RTE_ETH_RX_OFFLOAD_VLAN_FILTER |
- RTE_ETH_RX_OFFLOAD_RSS_HASH |
- RTE_ETH_RX_OFFLOAD_TCP_LRO);
+ RTE_ETH_RX_OFFLOAD_RSS_HASH);
info->tx_offload_capa = (RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
@@ -99,6 +98,8 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
if (hns3_dev_get_support(hw, PTP))
info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TIMESTAMP;
+ if (hns3_dev_get_support(hw, GRO))
+ info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TCP_LRO;
info->rx_desc_lim = (struct rte_eth_desc_lim) {
.nb_max = HNS3_MAX_RING_DESC,
diff --git a/drivers/net/hns3/hns3_dump.c b/drivers/net/hns3/hns3_dump.c
index 5c21ff0a3318..cb369be5beb6 100644
--- a/drivers/net/hns3/hns3_dump.c
+++ b/drivers/net/hns3/hns3_dump.c
@@ -104,7 +104,8 @@ hns3_get_dev_feature_capability(FILE *file, struct hns3_hw *hw)
{HNS3_DEV_SUPPORT_RAS_IMP_B, "RAS IMP"},
{HNS3_DEV_SUPPORT_TM_B, "TM"},
{HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B, "VF VLAN FILTER MOD"},
- {HNS3_DEV_SUPPORT_FC_AUTO_B, "FC AUTO"}
+ {HNS3_DEV_SUPPORT_FC_AUTO_B, "FC AUTO"},
+ {HNS3_DEV_SUPPORT_GRO_B, "GRO"}
};
uint32_t i;
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 29f9625b4036..08d6eed1990a 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2672,10 +2672,6 @@ hns3_get_capability(struct hns3_hw *hw)
struct hns3_pf *pf = &hns->pf;
int ret;
- ret = hns3_get_pci_revision_id(hw, &hw->revision);
- if (ret)
- return ret;
-
ret = hns3_query_mac_stats_reg_num(hw);
if (ret)
return ret;
@@ -4532,6 +4528,10 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)
/* Get hardware io base address from pcie BAR2 IO space */
hw->io_base = pci_dev->mem_resource[2].addr;
+ ret = hns3_get_pci_revision_id(hw, &hw->revision);
+ if (ret)
+ return ret;
+
/* Firmware command queue initialize */
ret = hns3_cmd_init_queue(hw);
if (ret) {
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index c85a6912ada4..a3da395ea08d 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -888,6 +888,7 @@ enum hns3_dev_cap {
HNS3_DEV_SUPPORT_TM_B,
HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B,
HNS3_DEV_SUPPORT_FC_AUTO_B,
+ HNS3_DEV_SUPPORT_GRO_B,
};
#define hns3_dev_get_support(hw, _name) \
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index 007f5d619fbf..f5fc272a23bd 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -681,10 +681,6 @@ hns3vf_get_capability(struct hns3_hw *hw)
{
int ret;
- ret = hns3_get_pci_revision_id(hw, &hw->revision);
- if (ret)
- return ret;
-
if (hw->revision < PCI_REVISION_ID_HIP09_A) {
hns3_set_default_dev_specifications(hw);
hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_RSV_ONE;
@@ -1337,6 +1333,10 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)
/* Get hardware io base address from pcie BAR2 IO space */
hw->io_base = pci_dev->mem_resource[2].addr;
+ ret = hns3_get_pci_revision_id(hw, &hw->revision);
+ if (ret)
+ return ret;
+
/* Firmware command queue initialize */
ret = hns3_cmd_init_queue(hw);
if (ret) {
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index f3c3b38c55d1..f31cf09c01d1 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -3119,6 +3119,9 @@ hns3_config_gro(struct hns3_hw *hw, bool en)
struct hns3_cmd_desc desc;
int ret;
+ if (!hns3_dev_get_support(hw, GRO))
+ return 0;
+
hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_GRO_GENERIC_CONFIG, false);
req = (struct hns3_cfg_gro_status_cmd *)desc.data;
--
2.30.0
next prev parent reply other threads:[~2023-10-31 12:35 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-31 12:23 [PATCH 0/6] net/hns3: add some bugfix for hns3 Jie Hai
2023-10-31 12:23 ` [PATCH 1/6] net/hns3: fix setting DCB capability Jie Hai
2023-10-31 12:23 ` Jie Hai [this message]
2023-10-31 12:23 ` [PATCH 3/6] net/hns3: fix return value Jie Hai
2023-10-31 12:23 ` [PATCH 4/6] net/hns3: fix some error log Jie Hai
2023-10-31 12:23 ` [PATCH 5/6] net/hns3: do not export API for setting and getting algo and key Jie Hai
2023-10-31 12:23 ` [PATCH 6/6] net/hns3: fix uninitialized value Jie Hai
2023-11-01 21:40 ` [PATCH 0/6] net/hns3: add some bugfix for hns3 Ferruh Yigit
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