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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CY4PEPF0000EDD2.mail.protection.outlook.com (10.167.241.206) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6954.19 via Frontend Transport; Tue, 31 Oct 2023 14:28:10 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 31 Oct 2023 07:28:01 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 31 Oct 2023 07:27:59 -0700 From: Dariusz Sosnowski To: Matan Azrad , Viacheslav Ovsiienko , Ori Kam , Suanming Mou CC: , Raslan Darawsheh Subject: [PATCH 4/8] net/mlx5: add sysfs check for Multiport E-Switch Date: Tue, 31 Oct 2023 16:27:29 +0200 Message-ID: <20231031142733.2009166-5-dsosnowski@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231031142733.2009166-1-dsosnowski@nvidia.com> References: <20231031142733.2009166-1-dsosnowski@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EDD2:EE_|CY8PR12MB8194:EE_ X-MS-Office365-Filtering-Correlation-Id: 23bd9477-7c79-4f4f-60b2-08dbda1d9c0a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Oct 2023 14:28:10.8639 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 23bd9477-7c79-4f4f-60b2-08dbda1d9c0a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8194 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch implements checking if Multiport E-Switch is enabled on a given PCI device, using sysfs Linux kernel interface. This facility will be used in follow up commits, which add support for such configuration to mlx5 PMD. MLNX_OFED mlx5_core kernel module versions which support Multiport E-Switch do not expose this configuration through Devlink, but through sysfs interface. If such a version is used, then Multiport E-Switch can be enabled (or its state can be probed) through a sysfs file under path: # should be substituted with Linux interface name. /sys/class/net//compat/devlink/lag_port_select_mode Writing "multiport_esw" to this file enables Multiport E-Switch. If "multiport_esw" is read from this file, then Multiport E-Switch is enabled. If this file does not exist or writing "multiport_esw" to this file, raises an error, then Multiport E-Switch is not supported. Signed-off-by: Dariusz Sosnowski Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/linux/mlx5_os.c | 69 ++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 2f08f2354e..7a656a7237 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -1931,6 +1931,75 @@ mlx5_device_bond_pci_match(const char *ibdev_name, return pf; } +#define SYSFS_MPESW_PARAM_MAX_LEN 16 + +static __rte_unused int +mlx5_sysfs_esw_multiport_get(struct ibv_device *ibv, struct rte_pci_addr *pci_addr, int *enabled) +{ + int nl_rdma; + unsigned int n_ports; + unsigned int i; + int ret; + + /* Provide correct value to have defined enabled state in case of an error. */ + *enabled = 0; + nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); + if (nl_rdma < 0) + return nl_rdma; + n_ports = mlx5_nl_portnum(nl_rdma, ibv->name); + if (!n_ports) { + ret = -rte_errno; + goto close_nl_rdma; + } + for (i = 1; i <= n_ports; ++i) { + unsigned int ifindex; + char ifname[IF_NAMESIZE + 1]; + struct rte_pci_addr if_pci_addr; + char mpesw[SYSFS_MPESW_PARAM_MAX_LEN + 1]; + FILE *sysfs; + int n; + + ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i); + if (!ifindex) + continue; + if (!if_indextoname(ifindex, ifname)) + continue; + MKSTR(sysfs_if_path, "/sys/class/net/%s", ifname); + if (mlx5_get_pci_addr(sysfs_if_path, &if_pci_addr)) + continue; + if (pci_addr->domain != if_pci_addr.domain || + pci_addr->bus != if_pci_addr.bus || + pci_addr->devid != if_pci_addr.devid || + pci_addr->function != if_pci_addr.function) + continue; + MKSTR(sysfs_mpesw_path, + "/sys/class/net/%s/compat/devlink/lag_port_select_mode", ifname); + sysfs = fopen(sysfs_mpesw_path, "r"); + if (!sysfs) + continue; + n = fscanf(sysfs, "%" RTE_STR(SYSFS_MPESW_PARAM_MAX_LEN) "s", mpesw); + fclose(sysfs); + if (n != 1) + continue; + ret = 0; + if (strcmp(mpesw, "multiport_esw") == 0) { + *enabled = 1; + break; + } + *enabled = 0; + break; + } + if (i > n_ports) { + DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by sysfs."); + rte_errno = ENOENT; + ret = -rte_errno; + } + +close_nl_rdma: + close(nl_rdma); + return ret; +} + /** * Register a PCI device within bonding. * -- 2.25.1