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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CY4PEPF0000E9D3.mail.protection.outlook.com (10.167.241.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6954.19 via Frontend Transport; Wed, 1 Nov 2023 04:45:02 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 31 Oct 2023 21:44:57 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 31 Oct 2023 21:44:54 -0700 From: Rongwei Liu To: , , , , , CC: , Alex Vesker Subject: [PATCH v4 08/13] net/mlx5/hws: fix potential wrong rte_errno value Date: Wed, 1 Nov 2023 06:44:14 +0200 Message-ID: <20231101044419.732726-9-rongweil@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20231101044419.732726-1-rongweil@nvidia.com> References: <20231031105131.441078-1-rongweil@nvidia.com> <20231101044419.732726-1-rongweil@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D3:EE_|SA1PR12MB7149:EE_ X-MS-Office365-Filtering-Correlation-Id: 72555a41-1e6e-45bb-b767-08dbda954f7e X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2023 04:45:02.0181 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 72555a41-1e6e-45bb-b767-08dbda954f7e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D3.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7149 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org A valid rte_errno is desired when DR layer api returns error and it can't over-write the value set by under-layer. Fixes: 0a2657c4ff4d ("net/mlx5/hws: support insert header action") Cc: hamdani@nvidia.com Signed-off-by: Rongwei Liu Reviewed-by: Alex Vesker Acked-by: Ori Kam --- drivers/net/mlx5/hws/mlx5dr_action.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c index 98bb556b7b..e66a8135dc 100644 --- a/drivers/net/mlx5/hws/mlx5dr_action.c +++ b/drivers/net/mlx5/hws/mlx5dr_action.c @@ -2015,6 +2015,7 @@ mlx5dr_action_create_insert_header(struct mlx5dr_context *ctx, if (!num_of_hdrs) { DR_LOG(ERR, "Reformat num_of_hdrs cannot be zero"); + rte_errno = EINVAL; return NULL; } @@ -2062,7 +2063,6 @@ mlx5dr_action_create_insert_header(struct mlx5dr_context *ctx, reformat_hdrs, log_bulk_size); if (ret) { DR_LOG(ERR, "Failed to create HWS reformat action"); - rte_errno = EINVAL; goto free_reformat_hdrs; } -- 2.27.0