DPDK patches and discussions
 help / color / mirror / Atom feed
From: Nicolas Chautru <nicolas.chautru@intel.com>
To: dev@dpdk.org, maxime.coquelin@redhat.com
Cc: hemant.agrawal@nxp.com, david.marchand@redhat.com,
	hernan.vargas@intel.com, stable@dpdk.org,
	Nicolas Chautru <nicolas.chautru@intel.com>
Subject: [PATCH v3 02/10] test/bbdev: rename macros from acc200 to vrb
Date: Fri,  3 Nov 2023 23:34:05 +0000	[thread overview]
Message-ID: <20231103233413.756110-3-nicolas.chautru@intel.com> (raw)
In-Reply-To: <20231103233413.756110-1-nicolas.chautru@intel.com>

Renaming ACC200 macros to use generic intel vRAN Boost (VRB).
No functional impact.

Fixes: 69a9d9e139d2 ("baseband/acc: rename files from acc200 to vrb")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
 app/test-bbdev/test_bbdev_perf.c | 91 ++++++++++++++++----------------
 1 file changed, 45 insertions(+), 46 deletions(-)

diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c
index 276bbf0a2e..09e4549b10 100644
--- a/app/test-bbdev/test_bbdev_perf.c
+++ b/app/test-bbdev/test_bbdev_perf.c
@@ -64,14 +64,14 @@
 #define ACC100_QMGR_INVALID_IDX -1
 #define ACC100_QMGR_RR 1
 #define ACC100_QOS_GBR 0
-#define ACC200PF_DRIVER_NAME   ("intel_acc200_pf")
-#define ACC200VF_DRIVER_NAME   ("intel_acc200_vf")
-#define ACC200_QMGR_NUM_AQS 16
-#define ACC200_QMGR_NUM_QGS 2
-#define ACC200_QMGR_AQ_DEPTH 5
-#define ACC200_QMGR_INVALID_IDX -1
-#define ACC200_QMGR_RR 1
-#define ACC200_QOS_GBR 0
+#define VRBPF_DRIVER_NAME   ("intel_vran_boost_pf")
+#define VRBVF_DRIVER_NAME   ("intel_vran_boost_vf")
+#define VRB_QMGR_NUM_AQS 16
+#define VRB_QMGR_NUM_QGS 2
+#define VRB_QMGR_AQ_DEPTH 5
+#define VRB_QMGR_INVALID_IDX -1
+#define VRB_QMGR_RR 1
+#define VRB_QOS_GBR 0
 #endif
 
 #define OPS_CACHE_SIZE 256U
@@ -794,11 +794,11 @@ add_bbdev_dev(uint8_t dev_id, struct rte_bbdev_info *info,
 				info->dev_name);
 	}
 	if ((get_init_device() == true) &&
-		(!strcmp(info->drv.driver_name, ACC200PF_DRIVER_NAME))) {
+		(!strcmp(info->drv.driver_name, VRBPF_DRIVER_NAME))) {
 		struct rte_acc_conf conf;
 		unsigned int i;
 
-		printf("Configure ACC200 FEC Driver %s with default values\n",
+		printf("Configure Driver %s with default values\n",
 				info->drv.driver_name);
 
 		/* clear default configuration before initialization */
@@ -807,52 +807,51 @@ add_bbdev_dev(uint8_t dev_id, struct rte_bbdev_info *info,
 		/* Always set in PF mode for built-in configuration */
 		conf.pf_mode_en = true;
 		for (i = 0; i < RTE_ACC_NUM_VFS; ++i) {
-			conf.arb_dl_4g[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_dl_4g[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_dl_4g[i].round_robin_weight = ACC200_QMGR_RR;
-			conf.arb_ul_4g[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_ul_4g[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_ul_4g[i].round_robin_weight = ACC200_QMGR_RR;
-			conf.arb_dl_5g[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_dl_5g[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_dl_5g[i].round_robin_weight = ACC200_QMGR_RR;
-			conf.arb_ul_5g[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_ul_5g[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_ul_5g[i].round_robin_weight = ACC200_QMGR_RR;
-			conf.arb_fft[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_fft[i].gbr_threshold1 = ACC200_QOS_GBR;
-			conf.arb_fft[i].round_robin_weight = ACC200_QMGR_RR;
+			conf.arb_dl_4g[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_dl_4g[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_dl_4g[i].round_robin_weight = VRB_QMGR_RR;
+			conf.arb_ul_4g[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_ul_4g[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_ul_4g[i].round_robin_weight = VRB_QMGR_RR;
+			conf.arb_dl_5g[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_dl_5g[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_dl_5g[i].round_robin_weight = VRB_QMGR_RR;
+			conf.arb_ul_5g[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_ul_5g[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_ul_5g[i].round_robin_weight = VRB_QMGR_RR;
+			conf.arb_fft[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_fft[i].gbr_threshold1 = VRB_QOS_GBR;
+			conf.arb_fft[i].round_robin_weight = VRB_QMGR_RR;
 		}
 
 		conf.input_pos_llr_1_bit = true;
 		conf.output_pos_llr_1_bit = true;
 		conf.num_vf_bundles = 1; /**< Number of VF bundles to setup */
 
-		conf.q_ul_4g.num_qgroups = ACC200_QMGR_NUM_QGS;
-		conf.q_ul_4g.first_qgroup_index = ACC200_QMGR_INVALID_IDX;
-		conf.q_ul_4g.num_aqs_per_groups = ACC200_QMGR_NUM_AQS;
-		conf.q_ul_4g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
-		conf.q_dl_4g.num_qgroups = ACC200_QMGR_NUM_QGS;
-		conf.q_dl_4g.first_qgroup_index = ACC200_QMGR_INVALID_IDX;
-		conf.q_dl_4g.num_aqs_per_groups = ACC200_QMGR_NUM_AQS;
-		conf.q_dl_4g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
-		conf.q_ul_5g.num_qgroups = ACC200_QMGR_NUM_QGS;
-		conf.q_ul_5g.first_qgroup_index = ACC200_QMGR_INVALID_IDX;
-		conf.q_ul_5g.num_aqs_per_groups = ACC200_QMGR_NUM_AQS;
-		conf.q_ul_5g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
-		conf.q_dl_5g.num_qgroups = ACC200_QMGR_NUM_QGS;
-		conf.q_dl_5g.first_qgroup_index = ACC200_QMGR_INVALID_IDX;
-		conf.q_dl_5g.num_aqs_per_groups = ACC200_QMGR_NUM_AQS;
-		conf.q_dl_5g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
-		conf.q_fft.num_qgroups = ACC200_QMGR_NUM_QGS;
-		conf.q_fft.first_qgroup_index = ACC200_QMGR_INVALID_IDX;
-		conf.q_fft.num_aqs_per_groups = ACC200_QMGR_NUM_AQS;
-		conf.q_fft.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
+		conf.q_ul_4g.num_qgroups = VRB_QMGR_NUM_QGS;
+		conf.q_ul_4g.first_qgroup_index = VRB_QMGR_INVALID_IDX;
+		conf.q_ul_4g.num_aqs_per_groups = VRB_QMGR_NUM_AQS;
+		conf.q_ul_4g.aq_depth_log2 = VRB_QMGR_AQ_DEPTH;
+		conf.q_dl_4g.num_qgroups = VRB_QMGR_NUM_QGS;
+		conf.q_dl_4g.first_qgroup_index = VRB_QMGR_INVALID_IDX;
+		conf.q_dl_4g.num_aqs_per_groups = VRB_QMGR_NUM_AQS;
+		conf.q_dl_4g.aq_depth_log2 = VRB_QMGR_AQ_DEPTH;
+		conf.q_ul_5g.num_qgroups = VRB_QMGR_NUM_QGS;
+		conf.q_ul_5g.first_qgroup_index = VRB_QMGR_INVALID_IDX;
+		conf.q_ul_5g.num_aqs_per_groups = VRB_QMGR_NUM_AQS;
+		conf.q_ul_5g.aq_depth_log2 = VRB_QMGR_AQ_DEPTH;
+		conf.q_dl_5g.num_qgroups = VRB_QMGR_NUM_QGS;
+		conf.q_dl_5g.first_qgroup_index = VRB_QMGR_INVALID_IDX;
+		conf.q_dl_5g.num_aqs_per_groups = VRB_QMGR_NUM_AQS;
+		conf.q_dl_5g.aq_depth_log2 = VRB_QMGR_AQ_DEPTH;
+		conf.q_fft.num_qgroups = VRB_QMGR_NUM_QGS;
+		conf.q_fft.first_qgroup_index = VRB_QMGR_INVALID_IDX;
+		conf.q_fft.num_aqs_per_groups = VRB_QMGR_NUM_AQS;
 
 		/* setup PF with configuration information */
 		ret = rte_acc_configure(info->dev_name, &conf);
 		TEST_ASSERT_SUCCESS(ret,
-				"Failed to configure ACC200 PF for bbdev %s",
+				"Failed to configure PF for bbdev %s",
 				info->dev_name);
 	}
 #endif
-- 
2.34.1


  parent reply	other threads:[~2023-11-03 23:41 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-03 23:34 [PATCH v3 00/10] test-bbdev changes for 23.11 Nicolas Chautru
2023-11-03 23:34 ` [PATCH v3 01/10] test/bbdev: fix python script subprocess Nicolas Chautru
2023-11-09 12:37   ` Maxime Coquelin
2023-11-03 23:34 ` Nicolas Chautru [this message]
2023-11-09 12:37   ` [PATCH v3 02/10] test/bbdev: rename macros from acc200 to vrb Maxime Coquelin
2023-11-03 23:34 ` [PATCH v3 03/10] test/bbdev: handle exception for LLR generation Nicolas Chautru
2023-11-09 12:46   ` Maxime Coquelin
2023-11-03 23:34 ` [PATCH v3 04/10] test/bbdev: improve test log messages Nicolas Chautru
2023-11-03 23:34 ` [PATCH v3 05/10] test/bbdev: assert failed test for queue configure Nicolas Chautru
2023-11-03 23:34 ` [PATCH v3 06/10] test/bbdev: ldpc encoder concatenation vector Nicolas Chautru
2023-11-03 23:34 ` [PATCH v3 07/10] test/bbdev: add MLD support Nicolas Chautru
2023-11-09 15:44   ` Maxime Coquelin
2023-11-03 23:34 ` [PATCH v3 08/10] test/bbdev: support new FFT capabilities Nicolas Chautru
2023-11-03 23:34 ` [PATCH v3 09/10] test/bbdev: support 4 bit LLR compression Nicolas Chautru
2023-11-03 23:34 ` [PATCH v3 10/10] test/bbdev: update python script parameters Nicolas Chautru
2023-11-09 10:16   ` Maxime Coquelin
2023-11-09 15:37     ` Chautru, Nicolas
2023-11-09 15:51 ` [PATCH v3 00/10] test-bbdev changes for 23.11 Maxime Coquelin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231103233413.756110-3-nicolas.chautru@intel.com \
    --to=nicolas.chautru@intel.com \
    --cc=david.marchand@redhat.com \
    --cc=dev@dpdk.org \
    --cc=hemant.agrawal@nxp.com \
    --cc=hernan.vargas@intel.com \
    --cc=maxime.coquelin@redhat.com \
    --cc=stable@dpdk.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).