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From: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
To: <bruce.richardson@intel.com>, <konstantin.v.ananyev@yandex.ru>
CC: <dev@dpdk.org>, <david.marchand@redhat.com>, <ferruh.yigit@amd.com>,
 <jerin.jacob@caviumnetworks.com>, <stable@dpdk.org>
Subject: [PATCH v2] eal/x86: add AMD vendor check to choose TSC calibration
Date: Wed, 22 Nov 2023 23:27:30 -0800
Message-ID: <20231123072730.22948-1-sivaprasad.tummala@amd.com>
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AMD Epyc processors doesn't support get_tsc_freq_arch().
The patch allows graceful return to allow fallback to
alternate TSC calibration.

Fixes: 3dbc565e81a0 ("timer: honor arch-specific TSC frequency query")
Cc: jerin.jacob@caviumnetworks.com
Cc: stable@dpdk.org

Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
---
 lib/eal/x86/rte_cycles.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/lib/eal/x86/rte_cycles.c b/lib/eal/x86/rte_cycles.c
index 69ed59b4f0..f147a5231d 100644
--- a/lib/eal/x86/rte_cycles.c
+++ b/lib/eal/x86/rte_cycles.c
@@ -10,6 +10,10 @@
 #include <cpuid.h>
 #endif
 
+#define x86_vendor_amd(t1, t2, t3)        \
+	((t1 == 0x68747541) && /* htuA */   \
+	 (t2 == 0x444d4163) && /* DMAc */   \
+	 (t3 == 0x69746e65))   /* itne */
 
 #include "eal_private.h"
 
@@ -110,6 +114,18 @@ get_tsc_freq_arch(void)
 	uint8_t mult, model;
 	int32_t ret;
 
+#ifdef RTE_TOOLCHAIN_MSVC
+	__cpuid(cpuinfo, 0);
+	a = cpuinfo[0];
+	b = cpuinfo[1];
+	c = cpuinfo[2];
+	d = cpuinfo[3];
+#else
+	__cpuid(0, a, b, c, d);
+#endif
+	if (x86_vendor_amd(b, c, d))
+		return 0;
+
 	/*
 	 * Time Stamp Counter and Nominal Core Crystal Clock
 	 * Information Leaf
-- 
2.34.1