From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B412343412; Thu, 30 Nov 2023 17:40:43 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3323942F02; Thu, 30 Nov 2023 17:40:34 +0100 (CET) Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2057.outbound.protection.outlook.com [40.107.223.57]) by mails.dpdk.org (Postfix) with ESMTP id D22FB42EF2 for ; Thu, 30 Nov 2023 17:40:31 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Lj8ZLC5sE7EDubXHtMsEo+y3/oNIo4YaeG1bkkyqBc+wYprUraau6b1lLHKwUv1sm255SXwDOQO5TyZ6j6ilHF/HPUqekVK6gKAMWrFbxyDZwsKyoGzpoenHin765tAovccZHEQjyofuTCA4THI2k0aohG1UEnBpxTGI2kj0+/EMvJD2I/gv7STDMGVfkZOoCN7BeiOv/VLt2FxkiUNNExJz14Qn76dd2OHytDpEd65rH++W+++SwD6jZ6T5JTCkHme7gHeRE9owBde5CCrayByP4PvZbSBXY8NUcOM5LFDHEAMxQzV+m0zYrHZaGDmBoAyGNOusuvN7cDzEekxeRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=YZuvYzgm9qffpVnUAJ2imG2k/objirmiGk97KRVgLig=; b=DGYsncjUanc/ilopeJn71NnB5px9hEvtxeYm4rZCJLcCH+maJin01vhH+D/q/rzkbV4KWRU6RLf/NQLhxu4vYsBvohWkfkePRM+E7paB0ofkcioKgZbnJ0TA7POAwDikAJCFc0kVBU0Av0IDO5dz4Y/4PrfqPDBIr7/QFLra3+erbFPDxd48ZofHLq7S81Uff7zjxhwMOFj56QNQdzBwbnSRQW8RtHVuBx3uihobu3tlgfF6Ti3pp89PClfnjgCkNHd2jdz9abL9dlWdWq3R+sJVIi0j/hr1r6eMWNRXzqFz6BU49NfItgOWbSboXCzewMfbB7XEmNGovwJcWJ1sHA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=YZuvYzgm9qffpVnUAJ2imG2k/objirmiGk97KRVgLig=; b=k1s4AFLlVPN2m44KJLH5/fuBUDQ9i/Va64LvzWaTJV63vhzi187PM/QsIb4oprJ1p6h0fFUMlupWJsco0ji/UTG/8ffJz7kEKYeVl+rU2sFmyjDie4f446blvR6orDW+Xz0Av5ddX/k2ZuuL+x3TgitAq7Udg2I1Qx7P9ML56kUAHZNuquezWF0TQbLSJReIL9d3P96jG9NI6nry+4v9IeTsKjRgC/xUGm9YndmtNEuPHMoGmYc95iBbc4Y9/uW5mCf0JVdXfp+S6P/CTmYN0cHiY3/ttWmKhrnyxH+6N+gpu6cwNCA14+1fLkzlW820B8J81BR2GlH1qR3pjXLwpQ== Received: from SJ0P220CA0008.NAMP220.PROD.OUTLOOK.COM (2603:10b6:a03:41b::17) by SA3PR12MB9132.namprd12.prod.outlook.com (2603:10b6:806:394::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7025.29; Thu, 30 Nov 2023 16:40:29 +0000 Received: from MWH0EPF000971E5.namprd02.prod.outlook.com (2603:10b6:a03:41b:cafe::9f) by SJ0P220CA0008.outlook.office365.com (2603:10b6:a03:41b::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.22 via Frontend Transport; Thu, 30 Nov 2023 16:40:28 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by MWH0EPF000971E5.mail.protection.outlook.com (10.167.243.73) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.17 via Frontend Transport; Thu, 30 Nov 2023 16:40:28 +0000 Received: from rnnvmail202.nvidia.com (10.129.68.7) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Thu, 30 Nov 2023 08:40:13 -0800 Received: from rnnvmail205.nvidia.com (10.129.68.10) by rnnvmail202.nvidia.com (10.129.68.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Thu, 30 Nov 2023 08:40:12 -0800 Received: from nvidia.com (10.127.8.13) by mail.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41 via Frontend Transport; Thu, 30 Nov 2023 08:40:10 -0800 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH v2 2/2] net/mlx5: add random item support Date: Thu, 30 Nov 2023 18:40:01 +0200 Message-ID: <20231130164001.666702-3-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231130164001.666702-1-michaelba@nvidia.com> References: <20230822103600.3247680-1-michaelba@nvidia.com> <20231130164001.666702-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E5:EE_|SA3PR12MB9132:EE_ X-MS-Office365-Filtering-Correlation-Id: 7221afc8-4dbc-4815-42e8-08dbf1c30fbe X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 2ENiMLPhH7jgW5HcWsb/OxEWvN8RzvN8LRZcEp7ZUpdwB2g8t3PKGtAAJ2u7OiScH9rwdXIM603Y+9RCJdb/cI312BdRLr3qV2B9gOqE9F8+e2l9PR5PeMWNiKb4vFFTZHsCv4EGP7lRmvX8mdg3034vLsPvCcFyrFm8XY/rMWLWwXsOWwCL/34bOzYUwI5+aIsTZNFvys9iVYE46W1055PY8hhZyg+2QG+722F5qWnTmfXciIg9J9JITFLjL+O3b3/YB4HIi0KlBK9ER/dPK6a9G+aBensJY21BkRdz6IvELLWK2Rwx8gFyRgWjYZD+vNMaLNeNCepVnepnbjbd6elBR9pPK0jggiN0ZSXiUTqbL4sRIRKJ7AtfDSAVCRZBDIWTTexmAaAlQLSvGpsm6pJn7j7HZcrz4F9ZLbPnVRLiIL66FBt1OGTaz8XGQ1Mojgw5YJhRcu4w67WGHRAyNPdzj3Wai1ysrcuvDijTO7fioXQeNHSSjegj70GQQWFstsoVTKA45uqBVxlTS8O9Q82BrNei0CKeOL6kZsXmWHKb6YNI5QpeSs1L3E6zBoHTt6CDJufJnK9zBCDxZ9kgjDqeWoEWEjBpbaNn/+apOwGairquBvthC/FnR/nSU/1pqWAMp2W9KcTtrMfEB9D6K3frmcgybc7aIYNFxAgP2MFFJegyC9xoDRwvQDJTVtu2ysxxllFZDnKrmOn++LDyK4Vo07xxlmC3gNRNfBN7W9FtB2Jp5Tqy6Sm5EYoly+OM X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230031)(4636009)(39860400002)(136003)(376002)(396003)(346002)(230922051799003)(82310400011)(64100799003)(451199024)(186009)(1800799012)(46966006)(40470700004)(36840700001)(36860700001)(40460700003)(36756003)(82740400003)(86362001)(7636003)(70206006)(478600001)(8936002)(41300700001)(316002)(54906003)(70586007)(55016003)(8676002)(7696005)(6666004)(5660300002)(2616005)(2906002)(356005)(4326008)(6916009)(26005)(40480700001)(47076005)(426003)(336012)(6286002)(1076003)(83380400001)(107886003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Nov 2023 16:40:28.7319 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7221afc8-4dbc-4815-42e8-08dbf1c30fbe X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB9132 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support for random item in HWS mode. Signed-off-by: Michael Baum --- doc/guides/nics/features/mlx5.ini | 1 + doc/guides/nics/mlx5.rst | 10 +++++++++- doc/guides/rel_notes/release_24_03.rst | 3 +++ drivers/net/mlx5/mlx5_flow_dv.c | 5 +++++ drivers/net/mlx5/mlx5_flow_hw.c | 5 +++++ 5 files changed, 23 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini index 0739fe9d63..6261b7d657 100644 --- a/doc/guides/nics/features/mlx5.ini +++ b/doc/guides/nics/features/mlx5.ini @@ -88,6 +88,7 @@ port_id = Y port_representor = Y ptype = Y quota = Y +random = Y tag = Y tcp = Y udp = Y diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 6b52fb93c5..129f7d9d24 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -167,7 +167,7 @@ Features - Sub-Function. - Matching on represented port. - Matching on aggregated affinity. - +- Matching on random value. Limitations ----------- @@ -564,6 +564,7 @@ Limitations - Modification of the MPLS header is supported only in HWS and only to copy from, the encapsulation level is always 0. - Modification of the 802.1Q Tag, VXLAN Network or GENEVE Network ID's is not supported. + - Modify field action using ``RTE_FLOW_FIELD_RANDOM`` is not supported. - Encapsulation levels are not supported, can modify outermost header fields only. - Offsets cannot skip past the boundary of a field. - If the field type is ``RTE_FLOW_FIELD_MAC_TYPE`` @@ -770,6 +771,13 @@ Limitations - In HW steering (``dv_flow_en`` = 2): - not supported on guest port. +- Match on random value: + + - Supported only with HW Steering enabled (``dv_flow_en`` = 2). + - Supported only in table with ``nb_flows=1``. + - NIC ingress flow in group 0 is not supported. + - Supports matching only 16 bits (LSB). + - During live migration to a new process set its flow engine as standby mode, the user should only program flow rules in group 0 (``fdb_def_rule_en=0``). Live migration is only supported under SWS (``dv_flow_en=1``). diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index ab91ce2b21..164cf74f5b 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -59,6 +59,9 @@ New Features Added ``RTE_FLOW_ITEM_RANDOM`` to match random value. +* **Updated NVIDIA mlx5 net driver.** + + * Added support for ``RTE_FLOW_ITEM_TYPE_RUNDOM`` flow item. Removed Items ------------- diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 115d730317..67a44095d7 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -5396,6 +5396,11 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifications of the MPLS header " "is not supported"); + if (dst_data->field == RTE_FLOW_FIELD_RANDOM || + src_data->field == RTE_FLOW_FIELD_RANDOM) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "modifications of random value is not supported"); if (dst_data->field == RTE_FLOW_FIELD_MARK || src_data->field == RTE_FLOW_FIELD_MARK) if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index da873ae2e2..af4e9abd89 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -5047,6 +5047,10 @@ flow_hw_validate_action_modify_field(struct rte_eth_dev *dev, return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifying vlan_type is not supported"); + if (flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_RANDOM)) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "modifying random value is not supported"); if (flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_GENEVE_VNI)) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, action, @@ -6807,6 +6811,7 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev, case RTE_FLOW_ITEM_TYPE_FLEX: case RTE_FLOW_ITEM_TYPE_IB_BTH: case RTE_FLOW_ITEM_TYPE_PTYPE: + case RTE_FLOW_ITEM_TYPE_RANDOM: break; case RTE_FLOW_ITEM_TYPE_INTEGRITY: /* -- 2.25.1