From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D86D64381D; Thu, 4 Jan 2024 20:36:52 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4B693402B9; Thu, 4 Jan 2024 20:36:52 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 8BF844029A for ; Thu, 4 Jan 2024 20:36:51 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 404I1Fi4029541 for ; Thu, 4 Jan 2024 11:36:50 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:content-type; s=pfpt0220; bh=mgySEyyr kqpar+NealpBTgtuVROX22BXX1AKw76cIYU=; b=VJPhnRfuWsVRFpLWKQGWlVPX iOwlRLdC17WDdn1SO0L0BykWtOyN4SR5yOt+p7jMtOhexEgZ5m9zZNy15HhR60uC JvPHX55Y99FdM/JQuiLbAUtD/CoyB0aNi3mgPCVvGvfZ3s/Z9SGjDizLiNp90FcU hMUnyu7Co82MXXc30EJ1ViAPaJ5lsJKKndo6x6vDqLlW86AFr2t2ZfKZSvlpMkxN gjYddfR6vZI8oEIKJgYy0zfOPZ1vI6M5S9zwX89D9daZlB9iUxFNjFQowfhzmDN6 Gdsa/Bv7c4ThusU/eqnxlqVAATp4pj7cbh+RY/lqfBzztP7fuEFYrp7bzOMpGA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3ve1jv8d1u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 04 Jan 2024 11:36:50 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 4 Jan 2024 11:36:36 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Thu, 4 Jan 2024 11:36:36 -0800 Received: from MININT-80QBFE8.corp.innovium.com (MININT-80QBFE8.marvell.com [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id 1FD673F7073; Thu, 4 Jan 2024 11:36:34 -0800 (PST) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Subject: [PATCH] event/cnxk: use WFE LDP loop for getwork routine Date: Fri, 5 Jan 2024 01:06:33 +0530 Message-ID: <20240104193633.2264-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 1y_hZprqigL4JSOBDwdoGuw4u9lIb3u_ X-Proofpoint-GUID: 1y_hZprqigL4JSOBDwdoGuw4u9lIb3u_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Use WFE LDP loop while polling for GETWORK completion for better power savings. Disabled by default and can be enabled by setting `RTE_ARM_USE_WFE` to `true` in `config/arm/meson.build` Signed-off-by: Pavan Nikhilesh --- doc/guides/eventdevs/cnxk.rst | 9 ++++++ drivers/event/cnxk/cn10k_worker.h | 52 +++++++++++++++++++++++++------ 2 files changed, 52 insertions(+), 9 deletions(-) diff --git a/doc/guides/eventdevs/cnxk.rst b/doc/guides/eventdevs/cnxk.rst index cccb8a0304..d62c143c77 100644 --- a/doc/guides/eventdevs/cnxk.rst +++ b/doc/guides/eventdevs/cnxk.rst @@ -198,6 +198,15 @@ Runtime Config Options -a 0002:0e:00.0,tim_eclk_freq=122880000-1000000000-0 +Power Savings on CN10K +---------------------- + +ARM cores can additionally use WFE when polling for transactions on SSO bus +to save power i.e., in the event dequeue call ARM core can enter WFE and exit +when either work has been scheduled or dequeue timeout has reached. +This can be enabled by setting ``RTE_ARM_USE_WFE`` to ``true`` in +``config/arm/meson.build``. + Debugging Options ----------------- diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h index 8aa916fa12..92d5190842 100644 --- a/drivers/event/cnxk/cn10k_worker.h +++ b/drivers/event/cnxk/cn10k_worker.h @@ -250,23 +250,57 @@ cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev, gw.get_work = ws->gw_wdata; #if defined(RTE_ARCH_ARM64) -#if !defined(__clang__) - asm volatile( - PLT_CPU_FEATURE_PREAMBLE - "caspal %[wdata], %H[wdata], %[wdata], %H[wdata], [%[gw_loc]]\n" - : [wdata] "+r"(gw.get_work) - : [gw_loc] "r"(ws->base + SSOW_LF_GWS_OP_GET_WORK0) - : "memory"); -#else +#if defined(__clang__) register uint64_t x0 __asm("x0") = (uint64_t)gw.u64[0]; register uint64_t x1 __asm("x1") = (uint64_t)gw.u64[1]; +#if defined(RTE_ARM_USE_WFE) + plt_write64(gw.u64[0], ws->base + SSOW_LF_GWS_OP_GET_WORK0); + asm volatile(PLT_CPU_FEATURE_PREAMBLE + " ldp %[x0], %[x1], [%[tag_loc]] \n" + " tbz %[x0], %[pend_gw], done%= \n" + " sevl \n" + "rty%=: wfe \n" + " ldp %[x0], %[x1], [%[tag_loc]] \n" + " tbnz %[x0], %[pend_gw], rty%= \n" + "done%=: \n" + " dmb ld \n" + : [x0] "+r" (x0), [x1] "+r" (x1) + : [tag_loc] "r"(ws->base + SSOW_LF_GWS_WQE0), + [pend_gw] "i"(SSOW_LF_GWS_TAG_PEND_GET_WORK_BIT) + : "memory"); +#else asm volatile(".arch armv8-a+lse\n" "caspal %[x0], %[x1], %[x0], %[x1], [%[dst]]\n" - : [x0] "+r"(x0), [x1] "+r"(x1) + : [x0] "+r" (x0), [x1] "+r" (x1) : [dst] "r"(ws->base + SSOW_LF_GWS_OP_GET_WORK0) : "memory"); +#endif gw.u64[0] = x0; gw.u64[1] = x1; +#else +#if defined(RTE_ARM_USE_WFE) + plt_write64(gw.u64[0], ws->base + SSOW_LF_GWS_OP_GET_WORK0); + asm volatile(PLT_CPU_FEATURE_PREAMBLE + " ldp %[wdata], %H[wdata], [%[tag_loc]] \n" + " tbz %[wdata], %[pend_gw], done%= \n" + " sevl \n" + "rty%=: wfe \n" + " ldp %[wdata], %H[wdata], [%[tag_loc]] \n" + " tbnz %[wdata], %[pend_gw], rty%= \n" + "done%=: \n" + " dmb ld \n" + : [wdata] "=&r"(gw.get_work) + : [tag_loc] "r"(ws->base + SSOW_LF_GWS_WQE0), + [pend_gw] "i"(SSOW_LF_GWS_TAG_PEND_GET_WORK_BIT) + : "memory"); +#else + asm volatile( + PLT_CPU_FEATURE_PREAMBLE + "caspal %[wdata], %H[wdata], %[wdata], %H[wdata], [%[gw_loc]]\n" + : [wdata] "+r"(gw.get_work) + : [gw_loc] "r"(ws->base + SSOW_LF_GWS_OP_GET_WORK0) + : "memory"); +#endif #endif #else plt_write64(gw.u64[0], ws->base + SSOW_LF_GWS_OP_GET_WORK0); -- 2.25.1