From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com, wenjun1.wu@intel.com
Cc: dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>
Subject: [PATCH v3 1/3] net/ice: hide port and TC layer in Tx sched tree
Date: Fri, 5 Jan 2024 16:12:35 -0500 [thread overview]
Message-ID: <20240105211237.394105-2-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20240105211237.394105-1-qi.z.zhang@intel.com>
In currently 5 layer tree implementation, the port and tc layer
is not configurable, so its not necessary to expose them to application.
The patch hides the top 2 layers and represented the root of the tree at
VSI layer. From application's point of view, its a 3 layer scheduler tree:
Port -> Queue Group -> Queue.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Wenjun Wu <wenjun1.wu@intel.com>
---
drivers/net/ice/ice_ethdev.h | 7 ----
drivers/net/ice/ice_tm.c | 79 ++++--------------------------------
2 files changed, 7 insertions(+), 79 deletions(-)
diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h
index fa4981ed14..ae22c29ffc 100644
--- a/drivers/net/ice/ice_ethdev.h
+++ b/drivers/net/ice/ice_ethdev.h
@@ -470,7 +470,6 @@ struct ice_tm_shaper_profile {
struct ice_tm_node {
TAILQ_ENTRY(ice_tm_node) node;
uint32_t id;
- uint32_t tc;
uint32_t priority;
uint32_t weight;
uint32_t reference_count;
@@ -484,8 +483,6 @@ struct ice_tm_node {
/* node type of Traffic Manager */
enum ice_tm_node_type {
ICE_TM_NODE_TYPE_PORT,
- ICE_TM_NODE_TYPE_TC,
- ICE_TM_NODE_TYPE_VSI,
ICE_TM_NODE_TYPE_QGROUP,
ICE_TM_NODE_TYPE_QUEUE,
ICE_TM_NODE_TYPE_MAX,
@@ -495,12 +492,8 @@ enum ice_tm_node_type {
struct ice_tm_conf {
struct ice_shaper_profile_list shaper_profile_list;
struct ice_tm_node *root; /* root node - port */
- struct ice_tm_node_list tc_list; /* node list for all the TCs */
- struct ice_tm_node_list vsi_list; /* node list for all the VSIs */
struct ice_tm_node_list qgroup_list; /* node list for all the queue groups */
struct ice_tm_node_list queue_list; /* node list for all the queues */
- uint32_t nb_tc_node;
- uint32_t nb_vsi_node;
uint32_t nb_qgroup_node;
uint32_t nb_queue_node;
bool committed;
diff --git a/drivers/net/ice/ice_tm.c b/drivers/net/ice/ice_tm.c
index b570798f07..7ae68c683b 100644
--- a/drivers/net/ice/ice_tm.c
+++ b/drivers/net/ice/ice_tm.c
@@ -43,12 +43,8 @@ ice_tm_conf_init(struct rte_eth_dev *dev)
/* initialize node configuration */
TAILQ_INIT(&pf->tm_conf.shaper_profile_list);
pf->tm_conf.root = NULL;
- TAILQ_INIT(&pf->tm_conf.tc_list);
- TAILQ_INIT(&pf->tm_conf.vsi_list);
TAILQ_INIT(&pf->tm_conf.qgroup_list);
TAILQ_INIT(&pf->tm_conf.queue_list);
- pf->tm_conf.nb_tc_node = 0;
- pf->tm_conf.nb_vsi_node = 0;
pf->tm_conf.nb_qgroup_node = 0;
pf->tm_conf.nb_queue_node = 0;
pf->tm_conf.committed = false;
@@ -72,16 +68,6 @@ ice_tm_conf_uninit(struct rte_eth_dev *dev)
rte_free(tm_node);
}
pf->tm_conf.nb_qgroup_node = 0;
- while ((tm_node = TAILQ_FIRST(&pf->tm_conf.vsi_list))) {
- TAILQ_REMOVE(&pf->tm_conf.vsi_list, tm_node, node);
- rte_free(tm_node);
- }
- pf->tm_conf.nb_vsi_node = 0;
- while ((tm_node = TAILQ_FIRST(&pf->tm_conf.tc_list))) {
- TAILQ_REMOVE(&pf->tm_conf.tc_list, tm_node, node);
- rte_free(tm_node);
- }
- pf->tm_conf.nb_tc_node = 0;
if (pf->tm_conf.root) {
rte_free(pf->tm_conf.root);
pf->tm_conf.root = NULL;
@@ -93,8 +79,6 @@ ice_tm_node_search(struct rte_eth_dev *dev,
uint32_t node_id, enum ice_tm_node_type *node_type)
{
struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
- struct ice_tm_node_list *tc_list = &pf->tm_conf.tc_list;
- struct ice_tm_node_list *vsi_list = &pf->tm_conf.vsi_list;
struct ice_tm_node_list *qgroup_list = &pf->tm_conf.qgroup_list;
struct ice_tm_node_list *queue_list = &pf->tm_conf.queue_list;
struct ice_tm_node *tm_node;
@@ -104,20 +88,6 @@ ice_tm_node_search(struct rte_eth_dev *dev,
return pf->tm_conf.root;
}
- TAILQ_FOREACH(tm_node, tc_list, node) {
- if (tm_node->id == node_id) {
- *node_type = ICE_TM_NODE_TYPE_TC;
- return tm_node;
- }
- }
-
- TAILQ_FOREACH(tm_node, vsi_list, node) {
- if (tm_node->id == node_id) {
- *node_type = ICE_TM_NODE_TYPE_VSI;
- return tm_node;
- }
- }
-
TAILQ_FOREACH(tm_node, qgroup_list, node) {
if (tm_node->id == node_id) {
*node_type = ICE_TM_NODE_TYPE_QGROUP;
@@ -371,6 +341,8 @@ ice_shaper_profile_del(struct rte_eth_dev *dev,
return 0;
}
+#define MAX_QUEUE_PER_GROUP 8
+
static int
ice_tm_node_add(struct rte_eth_dev *dev, uint32_t node_id,
uint32_t parent_node_id, uint32_t priority,
@@ -384,8 +356,6 @@ ice_tm_node_add(struct rte_eth_dev *dev, uint32_t node_id,
struct ice_tm_shaper_profile *shaper_profile = NULL;
struct ice_tm_node *tm_node;
struct ice_tm_node *parent_node;
- uint16_t tc_nb = 1;
- uint16_t vsi_nb = 1;
int ret;
if (!params || !error)
@@ -440,6 +410,7 @@ ice_tm_node_add(struct rte_eth_dev *dev, uint32_t node_id,
tm_node->id = node_id;
tm_node->parent = NULL;
tm_node->reference_count = 0;
+ tm_node->shaper_profile = shaper_profile;
tm_node->children = (struct ice_tm_node **)
rte_calloc(NULL, 256, (sizeof(struct ice_tm_node *)), 0);
rte_memcpy(&tm_node->params, params,
@@ -448,7 +419,6 @@ ice_tm_node_add(struct rte_eth_dev *dev, uint32_t node_id,
return 0;
}
- /* TC or queue node */
/* check the parent node */
parent_node = ice_tm_node_search(dev, parent_node_id,
&parent_node_type);
@@ -458,8 +428,6 @@ ice_tm_node_add(struct rte_eth_dev *dev, uint32_t node_id,
return -EINVAL;
}
if (parent_node_type != ICE_TM_NODE_TYPE_PORT &&
- parent_node_type != ICE_TM_NODE_TYPE_TC &&
- parent_node_type != ICE_TM_NODE_TYPE_VSI &&
parent_node_type != ICE_TM_NODE_TYPE_QGROUP) {
error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
error->message = "parent is not valid";
@@ -475,20 +443,6 @@ ice_tm_node_add(struct rte_eth_dev *dev, uint32_t node_id,
/* check the node number */
if (parent_node_type == ICE_TM_NODE_TYPE_PORT) {
- /* check the TC number */
- if (pf->tm_conf.nb_tc_node >= tc_nb) {
- error->type = RTE_TM_ERROR_TYPE_NODE_ID;
- error->message = "too many TCs";
- return -EINVAL;
- }
- } else if (parent_node_type == ICE_TM_NODE_TYPE_TC) {
- /* check the VSI number */
- if (pf->tm_conf.nb_vsi_node >= vsi_nb) {
- error->type = RTE_TM_ERROR_TYPE_NODE_ID;
- error->message = "too many VSIs";
- return -EINVAL;
- }
- } else if (parent_node_type == ICE_TM_NODE_TYPE_VSI) {
/* check the queue group number */
if (parent_node->reference_count >= pf->dev_data->nb_tx_queues) {
error->type = RTE_TM_ERROR_TYPE_NODE_ID;
@@ -497,7 +451,7 @@ ice_tm_node_add(struct rte_eth_dev *dev, uint32_t node_id,
}
} else {
/* check the queue number */
- if (parent_node->reference_count >= pf->dev_data->nb_tx_queues) {
+ if (parent_node->reference_count >= MAX_QUEUE_PER_GROUP) {
error->type = RTE_TM_ERROR_TYPE_NODE_ID;
error->message = "too many queues";
return -EINVAL;
@@ -509,7 +463,6 @@ ice_tm_node_add(struct rte_eth_dev *dev, uint32_t node_id,
}
}
- /* add the TC or VSI or queue group or queue node */
tm_node = rte_zmalloc("ice_tm_node",
sizeof(struct ice_tm_node),
0);
@@ -538,24 +491,12 @@ ice_tm_node_add(struct rte_eth_dev *dev, uint32_t node_id,
rte_memcpy(&tm_node->params, params,
sizeof(struct rte_tm_node_params));
if (parent_node_type == ICE_TM_NODE_TYPE_PORT) {
- TAILQ_INSERT_TAIL(&pf->tm_conf.tc_list,
- tm_node, node);
- tm_node->tc = pf->tm_conf.nb_tc_node;
- pf->tm_conf.nb_tc_node++;
- } else if (parent_node_type == ICE_TM_NODE_TYPE_TC) {
- TAILQ_INSERT_TAIL(&pf->tm_conf.vsi_list,
- tm_node, node);
- tm_node->tc = parent_node->tc;
- pf->tm_conf.nb_vsi_node++;
- } else if (parent_node_type == ICE_TM_NODE_TYPE_VSI) {
TAILQ_INSERT_TAIL(&pf->tm_conf.qgroup_list,
tm_node, node);
- tm_node->tc = parent_node->parent->tc;
pf->tm_conf.nb_qgroup_node++;
} else {
TAILQ_INSERT_TAIL(&pf->tm_conf.queue_list,
tm_node, node);
- tm_node->tc = parent_node->parent->parent->tc;
pf->tm_conf.nb_queue_node++;
}
tm_node->parent->reference_count++;
@@ -603,15 +544,9 @@ ice_tm_node_delete(struct rte_eth_dev *dev, uint32_t node_id,
return 0;
}
- /* TC or VSI or queue group or queue node */
+ /* queue group or queue node */
tm_node->parent->reference_count--;
- if (node_type == ICE_TM_NODE_TYPE_TC) {
- TAILQ_REMOVE(&pf->tm_conf.tc_list, tm_node, node);
- pf->tm_conf.nb_tc_node--;
- } else if (node_type == ICE_TM_NODE_TYPE_VSI) {
- TAILQ_REMOVE(&pf->tm_conf.vsi_list, tm_node, node);
- pf->tm_conf.nb_vsi_node--;
- } else if (node_type == ICE_TM_NODE_TYPE_QGROUP) {
+ if (node_type == ICE_TM_NODE_TYPE_QGROUP) {
TAILQ_REMOVE(&pf->tm_conf.qgroup_list, tm_node, node);
pf->tm_conf.nb_qgroup_node--;
} else {
@@ -872,7 +807,7 @@ int ice_do_hierarchy_commit(struct rte_eth_dev *dev,
/* config vsi node */
vsi_node = ice_get_vsi_node(hw);
- tm_node = TAILQ_FIRST(&pf->tm_conf.vsi_list);
+ tm_node = pf->tm_conf.root;
ret_val = ice_set_node_rate(hw, tm_node, vsi_node);
if (ret_val) {
--
2.31.1
next prev parent reply other threads:[~2024-01-05 12:45 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-05 13:59 [PATCH 0/3] net/ice: simplified to 3 layer Tx scheduler Qi Zhang
2024-01-05 13:59 ` [PATCH 1/3] net/ice: hide port and TC layer in Tx sched tree Qi Zhang
2024-01-05 13:59 ` [PATCH 2/3] net/ice: refactor tm config data struture Qi Zhang
2024-01-05 13:59 ` [PATCH 3/3] doc: update ice document for qos Qi Zhang
2024-01-05 14:11 ` [PATCH v2 0/3] net/ice: simplified to 3 layer Tx scheduler Qi Zhang
2024-01-05 8:10 ` Wu, Wenjun1
2024-01-05 14:11 ` [PATCH v2 1/3] net/ice: hide port and TC layer in Tx sched tree Qi Zhang
2024-01-05 14:11 ` [PATCH v2 2/3] net/ice: refactor tm config data structure Qi Zhang
2024-01-05 8:37 ` Zhang, Qi Z
2024-01-09 2:50 ` Wu, Wenjun1
2024-01-05 14:11 ` [PATCH v2 3/3] doc: update ice document for qos Qi Zhang
2024-01-05 21:12 ` [PATCH v3 0/3] net/ice: simplified to 3 layer Tx scheduler Qi Zhang
2024-01-05 21:12 ` Qi Zhang [this message]
2024-01-05 21:12 ` [PATCH v3 2/3] net/ice: refactor tm config data structure Qi Zhang
2024-01-05 21:12 ` [PATCH v3 3/3] doc: update ice document for qos Qi Zhang
2024-01-08 20:21 ` [PATCH v4 0/3] simplified to 3 layer Tx scheduler Qi Zhang
2024-01-08 20:21 ` [PATCH v4 1/3] net/ice: hide port and TC layer in Tx sched tree Qi Zhang
2024-01-08 20:21 ` [PATCH v4 2/3] net/ice: refactor tm config data structure Qi Zhang
2024-01-09 4:51 ` Wu, Wenjun1
2024-01-08 20:21 ` [PATCH v4 3/3] doc: update ice document for qos Qi Zhang
2024-01-09 5:30 ` [PATCH v4 0/3] simplified to 3 layer Tx scheduler Zhang, Qi Z
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