From: Michael Baum <michaelba@nvidia.com>
To: <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>,
Dariusz Sosnowski <dsosnowski@nvidia.com>,
Raslan Darawsheh <rasland@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Ori Kam <orika@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>,
<hamdani@nvidia.com>, <stable@dpdk.org>
Subject: [PATCH] net/mlx5/hws: fix ESP matching validation
Date: Mon, 15 Jan 2024 14:09:39 +0200 [thread overview]
Message-ID: <20240115120938.3994588-1-michaelba@nvidia.com> (raw)
The "mlx5dr_definer_conv_item_esp()" function validates first whether
"ipsec_offload" PRM flag is on, if the flag is off the function returns
error.
The "ipsec_offload" PRM flag indicates whether IPsec encrypt/decrypt is
supported, IPsec matching may be supported even when this flag is off.
This patch removes this validation.
Fixes: 81cf20a25abf ("net/mlx5/hws: support match on ESP item")
Cc: hamdani@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Hamdan Igbaria <hamdani@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 0b60479406..7bd4ea560e 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -2240,11 +2240,6 @@ mlx5dr_definer_conv_item_esp(struct mlx5dr_definer_conv_data *cd,
const struct rte_flow_item_esp *m = item->mask;
struct mlx5dr_definer_fc *fc;
- if (!cd->ctx->caps->ipsec_offload) {
- rte_errno = ENOTSUP;
- return rte_errno;
- }
-
if (!m)
return 0;
if (m->hdr.spi) {
--
2.25.1
next reply other threads:[~2024-01-15 12:10 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-15 12:09 Michael Baum [this message]
2024-01-17 17:11 ` Raslan Darawsheh
2024-01-18 9:27 ` [INTERNAL]RE: " Slava Ovsiienko
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