From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0BB0F438E9; Wed, 17 Jan 2024 11:31:33 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 129E340E09; Wed, 17 Jan 2024 11:31:21 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 0BA3C40DFD for ; Wed, 17 Jan 2024 11:31:19 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40H7jhpr028738 for ; Wed, 17 Jan 2024 02:31:19 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=u6aVUvW6PSC8Q+8d0o8t16mCOT9uvvXh7wpGraD1YxA=; b=dwc cYjZVgmI6WUM+GiXnl0krzudvgUSSQkzZ/xFLvjZlVFtuYQEzcKlp9pCU+0kfUmi vzlIno7irucxyheFo0mTroL2bb3olZd3wHmH7CJu0iNYA1QhIunvKubQxRIiZiyD l/ONIygRrCGmQ7v56XfEKKPfEYG4hLke7t2GXN/W06hKllr+RsQj8OQYH9emxlS4 5gfZTXWerRbOy8vpT4xYbtE4rY54zE+eTlFA5HMlZ71QKxuX08Pr1F270bYBQpwq CnOpHOzfSQHP9tQqG6EYKaQ5GQy4kyD2C58h4M3GX/GvgyLat+Q2uX4M1JZM2qF7 ehx8Xixt/W+meX6X2Jg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3vpask8f4t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 17 Jan 2024 02:31:19 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 02:31:17 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 02:31:17 -0800 Received: from BG-LT92004.corp.innovium.com (unknown [10.28.22.179]) by maili.marvell.com (Postfix) with ESMTP id 79C713F704F; Wed, 17 Jan 2024 02:31:15 -0800 (PST) From: Anoob Joseph To: Akhil Goyal CC: Jerin Jacob , Vidya Sagar Velumuri , Tejasree Kondoj , Subject: [PATCH v3 02/24] crypto/cnxk: use common macro Date: Wed, 17 Jan 2024 16:00:47 +0530 Message-ID: <20240117103109.922-3-anoobj@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117103109.922-1-anoobj@marvell.com> References: <20240102045417.115-1-anoobj@marvell.com> <20240117103109.922-1-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: SyQ4B5k4EOnY_FttSaoZ8EUz5kmCLSNA X-Proofpoint-GUID: SyQ4B5k4EOnY_FttSaoZ8EUz5kmCLSNA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_05,2024-01-17_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Having different macros for same purpose may cause issues if one is updated without updating the other. Use same macro by including the header. Signed-off-by: Anoob Joseph --- drivers/crypto/cnxk/cnxk_cryptodev.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h b/drivers/crypto/cnxk/cnxk_cryptodev.h index d0ad881f2f..f5374131bf 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev.h +++ b/drivers/crypto/cnxk/cnxk_cryptodev.h @@ -8,12 +8,12 @@ #include #include +#include "roc_ae.h" #include "roc_cpt.h" #define CNXK_CPT_MAX_CAPS 55 #define CNXK_SEC_CRYPTO_MAX_CAPS 16 #define CNXK_SEC_MAX_CAPS 9 -#define CNXK_AE_EC_ID_MAX 9 /** * Device private data */ @@ -23,8 +23,8 @@ struct cnxk_cpt_vf { struct rte_cryptodev_capabilities sec_crypto_caps[CNXK_SEC_CRYPTO_MAX_CAPS]; struct rte_security_capability sec_caps[CNXK_SEC_MAX_CAPS]; - uint64_t cnxk_fpm_iova[CNXK_AE_EC_ID_MAX]; - struct roc_ae_ec_group *ec_grp[CNXK_AE_EC_ID_MAX]; + uint64_t cnxk_fpm_iova[ROC_AE_EC_ID_PMAX]; + struct roc_ae_ec_group *ec_grp[ROC_AE_EC_ID_PMAX]; uint16_t max_qps_limit; }; -- 2.25.1