From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9385B43903; Fri, 19 Jan 2024 23:30:45 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5ED8E40297; Fri, 19 Jan 2024 23:30:45 +0100 (CET) Received: from mail-pj1-f42.google.com (mail-pj1-f42.google.com [209.85.216.42]) by mails.dpdk.org (Postfix) with ESMTP id A50A440144 for ; Fri, 19 Jan 2024 23:30:44 +0100 (CET) Received: by mail-pj1-f42.google.com with SMTP id 98e67ed59e1d1-28bec6ae0ffso955524a91.3 for ; Fri, 19 Jan 2024 14:30:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20230601.gappssmtp.com; s=20230601; t=1705703444; x=1706308244; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:from:to:cc:subject:date :message-id:reply-to; bh=XuaEGoC2sqzwd0SjvHRnUfhZTRUW4MDkuQ7n7pJD8/8=; b=2ukZqP3aD9B9rWWzVsqLqCJHIeq06/o7AKzNGehzwrVSzgfQVti2wsohQucceI5WJm WnK692PJyumHTkv8KtmPynQEgaIkMqhX6PqyFjge9jM/5BhFJ/IpNxGEvwPUeH3pH0MF 02KWOnfpYMZYBeNRCgdJ5130VLLXAirJtl18UhqN3mzMzT+piKCKiiB0fkQonefabCRN R0TC4Jr72heosBXXAMlPkfOsGTQ8FO+GVsFV62sUmK+G0ZkTCS6ktRLtQvg9jAeDdyYq YKB6NuMdMzb5dOo0qkkxY7kPCcCytcluLZ5PP9fbc+mbq0qYeGc5kWfYAHvgCQD4bfpx t36w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705703444; x=1706308244; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XuaEGoC2sqzwd0SjvHRnUfhZTRUW4MDkuQ7n7pJD8/8=; b=rbhYTnqCeApaRTRGxAn5g9n3x9TtLECtE6LIgG+fX4DWGn4YPsleSDPZwCxwhRPiN1 A7C2naNP0fKtdKPBFbHrRNIA9sivZeYDEp0XMNjLOXlHpLBoWgSZpNi1P74gctT5/xQZ KYunB4X2ynrWOfQSwY6hwPHPesDcfkyUOUbBIDQ7inNc0BBQ5ZsOcAmcRC8tt4WA9s/Z f0/1iN33DUX2DiDszBt9vyYSDfXsPgMaz5rvdfEzy2G8nOPy2/WE5DUVCYXC/ooa5fLH EZ7bUR1wx1m0O95GaMnmOKDLt69aq2IH7VmPnpmWiApmYNmvy7IFsqfFTr9aftjNYig0 +IDA== X-Gm-Message-State: AOJu0Yz2/qnoXroBnogKve1g8XWQpscJwGFVpIlY7xm6Nx+7T4OySU6p uXREZKP1T12HLJFDGSzUHhEHbDE+P0SPKtOq+xJyKnCevme2EQCRTFvK4IDORbc= X-Google-Smtp-Source: AGHT+IETxRR1VdEIwyNKyKRXjWs0ZQ5CUsHR12Sd0+2Hix65S0xBtZ7AcA5BfnpWhJNByz7yhwL8PA== X-Received: by 2002:a17:90b:298:b0:28f:ee9f:dc71 with SMTP id az24-20020a17090b029800b0028fee9fdc71mr457080pjb.78.1705703443888; Fri, 19 Jan 2024 14:30:43 -0800 (PST) Received: from hermes.local (204-195-123-141.wavecable.com. [204.195.123.141]) by smtp.gmail.com with ESMTPSA id q65-20020a17090a17c700b0028be0ec6e76sm5016234pja.28.2024.01.19.14.30.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jan 2024 14:30:43 -0800 (PST) Date: Fri, 19 Jan 2024 14:30:41 -0800 From: Stephen Hemminger To: Mattias =?UTF-8?B?UsO2bm5ibG9t?= Cc: Bruce Richardson , dev@dpdk.org, Jerin Jacob Subject: Re: [RFC PATCH] eventdev: ensure 16-byte alignment for events Message-ID: <20240119143041.59802717@hermes.local> In-Reply-To: References: <20231005115101.12276-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Fri, 6 Oct 2023 14:15:00 +0200 Mattias R=C3=B6nnblom wrote: > On 2023-10-05 13:51, Bruce Richardson wrote: > > The event structure in DPDK is 16-bytes in size, and events are > > regularly passed as parameters directly rather than being passed as > > pointers. =20 >=20 > When are events passed by-value, rather than by-reference? There are no=20 > such examples in the public eventdev API. >=20 > To help compiler optimize correctly, we can explicitly request > > 16-byte alignment for events, which means that we should be able > > to do aligned vector loads/stores (e.g. with SSE or Neon) when working > > with those events. > > =20 >=20 > That change is both helping and sabotaging the optimizer's work. Now=20 > every stack allocation needs to be 2-byte aligned - in DPDK code, and in= =20 > the application. >=20 > The effect this change has on an eventdev app using DSW is a ~3=20 > cycle/event performance degradation on an AMD Zen 3 system, and a ~4=20 > cycle/event performance degradation on a Skylake-generation Intel CPU. >=20 > What scenarios do you have in mind, where this change would improve the=20 > generated code? Something where there are no unaligned loads available=20 > in the ISA, or they are much slower than their aligned counterparts? >=20 > When I looked into the same issue for the DPDK IP checksumming routines,= =20 > there basically were no such. Not that I could find. >=20 > > Signed-off-by: Bruce Richardson Don't understand what the issue is. Isn't the event structure typically on stack. Adding padding there would not help.