From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C4CE4439FE; Mon, 29 Jan 2024 14:44:47 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A51B640EDB; Mon, 29 Jan 2024 14:44:47 +0100 (CET) Received: from NAM04-MW2-obe.outbound.protection.outlook.com (mail-mw2nam04on2073.outbound.protection.outlook.com [40.107.101.73]) by mails.dpdk.org (Postfix) with ESMTP id C516640EE2 for ; Mon, 29 Jan 2024 14:44:45 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=WyVK90WhtfrFTLVaWKKn2UUuSd8arER+aXnV+0NpHK/oMNy15fOjBnmlg8A2qBLqtWh9AFDgWGO0RvYh2Q9BP/Lw4Rlsxm5TAc16+vkCq3Qp5NZYNQJxXqOxWpTa9/jv++5Wa8lQpFBfUT6t8MOhkoWFE/bKTLuw4LDFYs/W/Is9I4N29a875DqjQGqdRDSRSz2KlBS5WF4P/hSzvXxaV9v139EHPwsRTsVvGLSVA0OiyuIKfSGfavSlxc6J14vtZud9yGaoR/veKhxrZHGlnrUYCtSrI/1wuIhtdLeZ2003bc3CcxA7pq0ZZMgOGftiA9ZqBl1ygfzQkz3+2PQkxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=g01xKMmrbKs6V8uQQtZbK09TegNrY4oAw5rG5mXzuOk=; b=A7X7FXKxiLrwojbleczBqSWNDlo0zJoC9S6R21v7iWAA38RbtNJLMBmnnChbNaq0OcnKhBtacp4PsYDG3U49gdLPlCIz9uiqi9w/MKIWJ/fDZ1+xRdFZK2nzU9Y3gYXMFF8JFnjngfpW7a1Ixyz9Lb10YE8m23L9twirSQyRoFFBUQJz8OXWuAPZcZ9OQl2u403yReYVTr3u4Fa26SvD6LpcQ2MFv9l7rVzf0SWGOAgr1oxM7KWlfYkvvcOGtsQn2xYxCLfgalCMIFeUxFDHHMM3QAMW95z7u504mqNtQLqClJAbbEh3wfAM07uBcP70HhMM5PIid/rZ7B1NCL2vfg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=g01xKMmrbKs6V8uQQtZbK09TegNrY4oAw5rG5mXzuOk=; b=MAfdxgy5e7VzgBX2bkX6r42h+fPBy7vAgmDg/v9uhxGVHjiJ2uDHWLxlZffqz76eOyFcUDU6Xg/vYaDAbvkQP53WZ1IsoGhwXFmeG2EnEtqL0/r2OqFnqKhAWg3Wu00QbDs69zSl2B4AoNTGxYeEqp2zh4gOemPwxpLMURHlpNZqkG3d/GZ/U6EHNmc9ckPreQXs5pDerbeCJj0QiykLWxg/eFtfet1mhxfdDG6AzLwfGxi/MYvwGfmM0PukKPfa0m9VdnI4u+TbO53IrHbV44p+IX+978+oKHVPFuCsHBsgrngjq9od70PKVnkeq2OcDGZRiQfy/EoibASk+zXetA== Received: from DS7PR03CA0319.namprd03.prod.outlook.com (2603:10b6:8:2b::27) by DS7PR12MB8370.namprd12.prod.outlook.com (2603:10b6:8:eb::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7228.32; Mon, 29 Jan 2024 13:44:42 +0000 Received: from CY4PEPF0000FCBF.namprd03.prod.outlook.com (2603:10b6:8:2b:cafe::21) by DS7PR03CA0319.outlook.office365.com (2603:10b6:8:2b::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7228.33 via Frontend Transport; Mon, 29 Jan 2024 13:44:42 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by CY4PEPF0000FCBF.mail.protection.outlook.com (10.167.242.101) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7181.14 via Frontend Transport; Mon, 29 Jan 2024 13:44:42 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Mon, 29 Jan 2024 05:44:28 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Mon, 29 Jan 2024 05:44:27 -0800 Received: from nvidia.com (10.127.8.13) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41 via Frontend Transport; Mon, 29 Jan 2024 05:44:25 -0800 From: Michael Baum To: CC: Matan Azrad , Dariusz Sosnowski , Raslan Darawsheh , Viacheslav Ovsiienko , Ori Kam , Suanming Mou , Hamdan Igbaria Subject: [PATCH v3 1/2] net/mlx5/hws: add support for compare matcher Date: Mon, 29 Jan 2024 15:44:09 +0200 Message-ID: <20240129134410.885145-2-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240129134410.885145-1-michaelba@nvidia.com> References: <20240128102234.776861-1-michaelba@nvidia.com> <20240129134410.885145-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCBF:EE_|DS7PR12MB8370:EE_ X-MS-Office365-Filtering-Correlation-Id: fbe2cb5b-55a1-4356-095a-08dc20d07280 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: F9q0+N/ZA2qe/wCY+XDN885n+CevahVeAn455rQzW+6v7vq2xhsahrhrZ6tFs0G/WFGI8mwSv2piwXDz8pVHcYVvfxV3GyUN9FD1AaePe7LPN5XmZgAUj+8V0xKC0VbTC3P+OzKhiSEBvo5T5u1DIKS9y8y7dXqknSfi5Pt+IXApwg8UsiAvnc0bBHkMugK3P8Oa3KpgrjNHCaYwcsE9a/exETK8Col9bRJ+uU628B//6narY+tyegIc9pR0i92KBdbk3ly1rp6k/PEwkmW6VsYtyfA8ao0CmsNDeHl10ULIii8WRu6Z0tsE2XjIi0qOWpBhk1tuqwu1wPFvnyIsbxLuMtm8O5bkWSHaDzSMNHGzNQmIMiJFixne8dBYx3cMJn554jx346R8bswJuYT3BZ6ExBapSkv4GsMXBxaf1KLrOx7qdsX6DaBe4aG7HNAAfNKXMEdh3yvsVpdgwKr5Ka0uwFcWHlFIrSbcqYF36ZrrqdTJ47GtuhuT89vHyD3bBKcKbVnX0zIYL3kaUwNuARQVrBvQ1xdbd+TB5ngxVcNcZoDT151LBT0dH+ISZLZpt1NR/ZLpPF55nXsDgCo0h3lmD38Mqc7nDS8pyklppQPc2u7DOUZkK6+z1qo1VnACMwxPZq4Twz++e5oPNVZxJe4YAR6Hkbz5sRbaOsrLROtYqsAh/8nIxPh4KM1StQyMJWpkhpxe15NcsiwIa8wsBV11dZYFh983m3F1wkyPN2pukbCXE119/K2ZcT4pKqVoLU21o1AtkXX1rklV8SlL5g== X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230031)(4636009)(136003)(396003)(376002)(346002)(39860400002)(230922051799003)(64100799003)(82310400011)(1800799012)(451199024)(186009)(40470700004)(46966006)(36840700001)(55016003)(40480700001)(40460700003)(83380400001)(86362001)(356005)(36756003)(7696005)(82740400003)(7636003)(36860700001)(47076005)(1076003)(26005)(6286002)(336012)(107886003)(2616005)(426003)(6666004)(6916009)(2906002)(30864003)(478600001)(70586007)(316002)(70206006)(54906003)(41300700001)(8936002)(4326008)(5660300002)(8676002)(309714004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jan 2024 13:44:42.5110 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fbe2cb5b-55a1-4356-095a-08dc20d07280 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8370 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Hamdan Igbaria Add support for compare matcher, this matcher will allow direct comparison between two packet fields, or a packet field and a value, with fully masked DW. For now this matcher hash table is limited to size 1x1, thus it supports only 1 rule STE. Signed-off-by: Hamdan Igbaria Signed-off-by: Michael Baum --- drivers/common/mlx5/mlx5_prm.h | 16 ++ drivers/net/mlx5/hws/mlx5dr_cmd.c | 9 +- drivers/net/mlx5/hws/mlx5dr_cmd.h | 1 + drivers/net/mlx5/hws/mlx5dr_debug.c | 4 +- drivers/net/mlx5/hws/mlx5dr_debug.h | 1 + drivers/net/mlx5/hws/mlx5dr_definer.c | 243 +++++++++++++++++++++++++- drivers/net/mlx5/hws/mlx5dr_definer.h | 33 ++++ drivers/net/mlx5/hws/mlx5dr_matcher.c | 48 +++++ drivers/net/mlx5/hws/mlx5dr_matcher.h | 12 +- 9 files changed, 358 insertions(+), 9 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index f64f25dbb7..c8477658d7 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -3455,6 +3455,7 @@ enum mlx5_ifc_rtc_ste_format { MLX5_IFC_RTC_STE_FORMAT_8DW = 0x4, MLX5_IFC_RTC_STE_FORMAT_11DW = 0x5, MLX5_IFC_RTC_STE_FORMAT_RANGE = 0x7, + MLX5_IFC_RTC_STE_FORMAT_4DW_RANGE = 0x8, }; enum mlx5_ifc_rtc_reparse_mode { @@ -3493,6 +3494,21 @@ struct mlx5_ifc_rtc_bits { u8 reserved_at_1a0[0x260]; }; +struct mlx5_ifc_ste_match_4dw_range_ctrl_dw_bits { + u8 match[0x1]; + u8 reserved_at_1[0x2]; + u8 base1[0x1]; + u8 inverse1[0x1]; + u8 reserved_at_5[0x1]; + u8 operator1[0x2]; + u8 reserved_at_8[0x3]; + u8 base0[0x1]; + u8 inverse0[0x1]; + u8 reserved_at_a[0x1]; + u8 operator0[0x2]; + u8 compare_delta[0x10]; +}; + struct mlx5_ifc_alias_context_bits { u8 vhca_id_to_be_accessed[0x10]; u8 reserved_at_10[0xd]; diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c index 876a47147d..702d6fadac 100644 --- a/drivers/net/mlx5/hws/mlx5dr_cmd.c +++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c @@ -370,9 +370,12 @@ mlx5dr_cmd_rtc_create(struct ibv_context *ctx, attr, obj_type, MLX5_GENERAL_OBJ_TYPE_RTC); attr = MLX5_ADDR_OF(create_rtc_in, in, rtc); - MLX5_SET(rtc, attr, ste_format_0, rtc_attr->is_frst_jumbo ? - MLX5_IFC_RTC_STE_FORMAT_11DW : - MLX5_IFC_RTC_STE_FORMAT_8DW); + if (rtc_attr->is_compare) { + MLX5_SET(rtc, attr, ste_format_0, MLX5_IFC_RTC_STE_FORMAT_4DW_RANGE); + } else { + MLX5_SET(rtc, attr, ste_format_0, rtc_attr->is_frst_jumbo ? + MLX5_IFC_RTC_STE_FORMAT_11DW : MLX5_IFC_RTC_STE_FORMAT_8DW); + } if (rtc_attr->is_scnd_range) { MLX5_SET(rtc, attr, ste_format_1, MLX5_IFC_RTC_STE_FORMAT_RANGE); diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h index 18c2b07fc8..073ffd9633 100644 --- a/drivers/net/mlx5/hws/mlx5dr_cmd.h +++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h @@ -82,6 +82,7 @@ struct mlx5dr_cmd_rtc_create_attr { uint8_t reparse_mode; bool is_frst_jumbo; bool is_scnd_range; + bool is_compare; }; struct mlx5dr_cmd_alias_obj_create_attr { diff --git a/drivers/net/mlx5/hws/mlx5dr_debug.c b/drivers/net/mlx5/hws/mlx5dr_debug.c index 11557bcab8..a9094cd35b 100644 --- a/drivers/net/mlx5/hws/mlx5dr_debug.c +++ b/drivers/net/mlx5/hws/mlx5dr_debug.c @@ -99,6 +99,7 @@ static int mlx5dr_debug_dump_matcher_match_template(FILE *f, struct mlx5dr_matcher *matcher) { bool is_root = matcher->tbl->level == MLX5DR_ROOT_LEVEL; + bool is_compare = mlx5dr_matcher_is_compare(matcher); enum mlx5dr_debug_res_type type; int i, ret; @@ -117,7 +118,8 @@ mlx5dr_debug_dump_matcher_match_template(FILE *f, struct mlx5dr_matcher *matcher return rte_errno; } - type = MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_MATCH_DEFINER; + type = is_compare ? MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_COMPARE_MATCH_DEFINER : + MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_MATCH_DEFINER; ret = mlx5dr_debug_dump_matcher_template_definer(f, mt, mt->definer, type); if (ret) return ret; diff --git a/drivers/net/mlx5/hws/mlx5dr_debug.h b/drivers/net/mlx5/hws/mlx5dr_debug.h index 5cffdb10b5..a89a6a0b1d 100644 --- a/drivers/net/mlx5/hws/mlx5dr_debug.h +++ b/drivers/net/mlx5/hws/mlx5dr_debug.h @@ -24,6 +24,7 @@ enum mlx5dr_debug_res_type { MLX5DR_DEBUG_RES_TYPE_MATCHER_ACTION_TEMPLATE = 4204, MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_HASH_DEFINER = 4205, MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_RANGE_DEFINER = 4206, + MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_COMPARE_MATCH_DEFINER = 4207, }; static inline uint64_t diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c index 79d98bbf78..2d86175ca2 100644 --- a/drivers/net/mlx5/hws/mlx5dr_definer.c +++ b/drivers/net/mlx5/hws/mlx5dr_definer.c @@ -383,6 +383,86 @@ mlx5dr_definer_ptype_frag_set(struct mlx5dr_definer_fc *fc, DR_SET(tag, !!packet_type, fc->byte_off, fc->bit_off, fc->bit_mask); } +static void +mlx5dr_definer_compare_base_value_set(const void *item_spec, + uint8_t *tag) +{ + uint32_t *ctrl = &(((uint32_t *)tag)[MLX5DR_DEFINER_COMPARE_STE_ARGUMENT_1]); + uint32_t *base = &(((uint32_t *)tag)[MLX5DR_DEFINER_COMPARE_STE_BASE_0]); + const struct rte_flow_item_compare *v = item_spec; + const struct rte_flow_field_data *a = &v->a; + const struct rte_flow_field_data *b = &v->b; + const uint32_t *value; + + value = (const uint32_t *)&b->value[0]; + + if (a->field == RTE_FLOW_FIELD_RANDOM) + *base = htobe32(*value << 16); + else + *base = htobe32(*value); + + MLX5_SET(ste_match_4dw_range_ctrl_dw, ctrl, base0, 1); +} + +static void +mlx5dr_definer_compare_op_translate(enum rte_flow_item_compare_op op, + uint8_t *tag) +{ + uint32_t *ctrl = &(((uint32_t *)tag)[MLX5DR_DEFINER_COMPARE_STE_ARGUMENT_1]); + uint8_t operator = 0; + uint8_t inverse = 0; + + switch (op) { + case RTE_FLOW_ITEM_COMPARE_EQ: + operator = 2; + break; + case RTE_FLOW_ITEM_COMPARE_NE: + operator = 2; + inverse = 1; + break; + case RTE_FLOW_ITEM_COMPARE_LT: + inverse = 1; + break; + case RTE_FLOW_ITEM_COMPARE_LE: + operator = 1; + break; + case RTE_FLOW_ITEM_COMPARE_GT: + operator = 1; + inverse = 1; + break; + case RTE_FLOW_ITEM_COMPARE_GE: + break; + default: + DR_LOG(ERR, "Invalid operation type %d", op); + assert(false); + } + + MLX5_SET(ste_match_4dw_range_ctrl_dw, ctrl, inverse0, inverse); + MLX5_SET(ste_match_4dw_range_ctrl_dw, ctrl, operator0, operator); +} + +static void +mlx5dr_definer_compare_arg_set(const void *item_spec, + uint8_t *tag) +{ + const struct rte_flow_item_compare *v = item_spec; + enum rte_flow_item_compare_op op = v->operation; + + mlx5dr_definer_compare_op_translate(op, tag); +} + +static void +mlx5dr_definer_compare_set(struct mlx5dr_definer_fc *fc, + const void *item_spec, + uint8_t *tag) +{ + if (fc->compare_idx == MLX5DR_DEFINER_COMPARE_ARGUMENT_0) { + mlx5dr_definer_compare_arg_set(item_spec, tag); + if (fc->compare_set_base) + mlx5dr_definer_compare_base_value_set(item_spec, tag); + } +} + static void mlx5dr_definer_integrity_set(struct mlx5dr_definer_fc *fc, const void *item_spec, @@ -2739,10 +2819,124 @@ mlx5dr_definer_conv_item_vxlan_gpe(struct mlx5dr_definer_conv_data *cd, return 0; } +static int +mlx5dr_definer_conv_item_compare_field(const struct rte_flow_field_data *f, + const struct rte_flow_field_data *other_f, + struct mlx5dr_definer_conv_data *cd, + int item_idx, + enum mlx5dr_definer_compare_dw_selectors dw_offset) +{ + struct mlx5dr_definer_fc *fc = NULL; + int reg; + + if (f->offset) { + DR_LOG(ERR, "field offset %u is not supported, only offset zero supported", + f->offset); + goto err_notsup; + } + + switch (f->field) { + case RTE_FLOW_FIELD_META: + reg = flow_hw_get_reg_id_from_ctx(cd->ctx, + RTE_FLOW_ITEM_TYPE_META, -1); + if (reg <= 0) { + DR_LOG(ERR, "Invalid register for compare metadata field"); + rte_errno = EINVAL; + return rte_errno; + } + + fc = mlx5dr_definer_get_register_fc(cd, reg); + if (!fc) + return rte_errno; + + fc->item_idx = item_idx; + fc->tag_set = &mlx5dr_definer_compare_set; + fc->tag_mask_set = &mlx5dr_definer_ones_set; + fc->compare_idx = dw_offset; + break; + case RTE_FLOW_FIELD_TAG: + reg = flow_hw_get_reg_id_from_ctx(cd->ctx, + RTE_FLOW_ITEM_TYPE_TAG, + f->tag_index); + if (reg <= 0) { + DR_LOG(ERR, "Invalid register for compare tag field"); + rte_errno = EINVAL; + return rte_errno; + } + + fc = mlx5dr_definer_get_register_fc(cd, reg); + if (!fc) + return rte_errno; + + fc->item_idx = item_idx; + fc->tag_set = &mlx5dr_definer_compare_set; + fc->tag_mask_set = &mlx5dr_definer_ones_set; + fc->compare_idx = dw_offset; + break; + case RTE_FLOW_FIELD_VALUE: + if (dw_offset == MLX5DR_DEFINER_COMPARE_ARGUMENT_0) { + DR_LOG(ERR, "Argument field does not support immediate value"); + goto err_notsup; + } + break; + case RTE_FLOW_FIELD_RANDOM: + fc = &cd->fc[MLX5DR_DEFINER_FNAME_RANDOM_NUM]; + fc->item_idx = item_idx; + fc->tag_set = &mlx5dr_definer_compare_set; + fc->tag_mask_set = &mlx5dr_definer_ones_set; + fc->compare_idx = dw_offset; + DR_CALC_SET_HDR(fc, random_number, random_number); + break; + default: + DR_LOG(ERR, "%u field is not supported", f->field); + goto err_notsup; + } + + if (fc && other_f && other_f->field == RTE_FLOW_FIELD_VALUE) + fc->compare_set_base = true; + + return 0; + +err_notsup: + rte_errno = ENOTSUP; + return rte_errno; +} + +static int +mlx5dr_definer_conv_item_compare(struct mlx5dr_definer_conv_data *cd, + struct rte_flow_item *item, + int item_idx) +{ + const struct rte_flow_item_compare *m = item->mask; + const struct rte_flow_field_data *a = &m->a; + const struct rte_flow_field_data *b = &m->b; + int ret; + + if (m->width != 0xffffffff) { + DR_LOG(ERR, "compare item width of 0x%x is not supported, only full DW supported", + m->width); + rte_errno = ENOTSUP; + return rte_errno; + } + + ret = mlx5dr_definer_conv_item_compare_field(a, b, cd, item_idx, + MLX5DR_DEFINER_COMPARE_ARGUMENT_0); + if (ret) + return ret; + + ret = mlx5dr_definer_conv_item_compare_field(b, NULL, cd, item_idx, + MLX5DR_DEFINER_COMPARE_BASE_0); + if (ret) + return ret; + + return 0; +} + static int mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx, struct mlx5dr_match_template *mt, - uint8_t *hl) + uint8_t *hl, + struct mlx5dr_matcher *matcher) { struct mlx5dr_definer_fc fc[MLX5DR_DEFINER_FNAME_MAX] = {{0}}; struct mlx5dr_definer_conv_data cd = {0}; @@ -2762,6 +2956,11 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx, if (ret) return ret; + if (mlx5dr_matcher_is_compare(matcher)) { + DR_LOG(ERR, "Compare matcher not supported for more than one item"); + goto not_supp; + } + switch ((int)items->type) { case RTE_FLOW_ITEM_TYPE_ETH: ret = mlx5dr_definer_conv_item_eth(&cd, items, i); @@ -2907,10 +3106,18 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx, ret = mlx5dr_definer_conv_item_vxlan_gpe(&cd, items, i); item_flags |= MLX5_FLOW_LAYER_VXLAN_GPE; break; + case RTE_FLOW_ITEM_TYPE_COMPARE: + if (i) { + DR_LOG(ERR, "Compare matcher not supported for more than one item"); + goto not_supp; + } + ret = mlx5dr_definer_conv_item_compare(&cd, items, i); + item_flags |= MLX5_FLOW_ITEM_COMPARE; + matcher->flags |= MLX5DR_MATCHER_FLAGS_COMPARE; + break; default: DR_LOG(ERR, "Unsupported item type %d", items->type); - rte_errno = ENOTSUP; - return rte_errno; + goto not_supp; } cd.last_item = items->type; @@ -2931,6 +3138,10 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx, } return 0; + +not_supp: + rte_errno = ENOTSUP; + return rte_errno; } static int @@ -3318,6 +3529,7 @@ mlx5dr_definer_calc_layout(struct mlx5dr_matcher *matcher, { struct mlx5dr_context *ctx = matcher->tbl->ctx; struct mlx5dr_match_template *mt = matcher->mt; + struct mlx5dr_definer_fc *fc; uint8_t *match_hl; int i, ret; @@ -3335,13 +3547,35 @@ mlx5dr_definer_calc_layout(struct mlx5dr_matcher *matcher, * and allocate the match and range field copy array (fc & fcr). */ for (i = 0; i < matcher->num_of_mt; i++) { - ret = mlx5dr_definer_conv_items_to_hl(ctx, &mt[i], match_hl); + ret = mlx5dr_definer_conv_items_to_hl(ctx, &mt[i], match_hl, matcher); if (ret) { DR_LOG(ERR, "Failed to convert items to header layout"); goto free_fc; } } + if (mlx5dr_matcher_is_compare(matcher)) { + ret = mlx5dr_matcher_validate_compare_attr(matcher); + if (ret) + goto free_fc; + + /* Due some HW limitation need to fill unused + * DW's 0-5 and byte selectors with 0xff. + */ + for (i = 0; i < DW_SELECTORS_MATCH; i++) + match_definer->dw_selector[i] = 0xff; + + for (i = 0; i < BYTE_SELECTORS; i++) + match_definer->byte_selector[i] = 0xff; + + for (i = 0; i < mt[0].fc_sz; i++) { + fc = &mt[0].fc[i]; + match_definer->dw_selector[fc->compare_idx] = fc->byte_off / DW_SIZE; + } + + goto out; + } + /* Find the match definer layout for header layout match union */ ret = mlx5dr_definer_find_best_match_fit(ctx, match_definer, match_hl); if (ret) { @@ -3356,6 +3590,7 @@ mlx5dr_definer_calc_layout(struct mlx5dr_matcher *matcher, goto free_fc; } +out: simple_free(match_hl); return 0; diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.h b/drivers/net/mlx5/hws/mlx5dr_definer.h index ced9d9da13..9f2b5e7dc9 100644 --- a/drivers/net/mlx5/hws/mlx5dr_definer.h +++ b/drivers/net/mlx5/hws/mlx5dr_definer.h @@ -17,6 +17,37 @@ #define DW_SELECTORS_RANGE 2 #define BYTE_SELECTORS_RANGE 8 +enum mlx5dr_definer_compare_ste_dw_offset { + /* In compare STE the matching DW's starts after the 3 actions */ + MLX5DR_DEFINER_COMPARE_STE_ARGUMENT_1 = 3, + MLX5DR_DEFINER_COMPARE_STE_ARGUMENT_0, + MLX5DR_DEFINER_COMPARE_STE_BASE_1, + MLX5DR_DEFINER_COMPARE_STE_BASE_0, + MLX5DR_DEFINER_COMPARE_STE_TAG_DW_3, + MLX5DR_DEFINER_COMPARE_STE_TAG_DW_2, + MLX5DR_DEFINER_COMPARE_STE_TAG_DW_1, + MLX5DR_DEFINER_COMPARE_STE_TAG_DW_0, +}; + +enum mlx5dr_definer_dw_selectors { + MLX5DR_DEFINER_SELECTOR_DW0, + MLX5DR_DEFINER_SELECTOR_DW1, + MLX5DR_DEFINER_SELECTOR_DW2, + MLX5DR_DEFINER_SELECTOR_DW3, + MLX5DR_DEFINER_SELECTOR_DW4, + MLX5DR_DEFINER_SELECTOR_DW5, + MLX5DR_DEFINER_SELECTOR_DW6, + MLX5DR_DEFINER_SELECTOR_DW7, + MLX5DR_DEFINER_SELECTOR_DW8, +}; + +enum mlx5dr_definer_compare_dw_selectors { + MLX5DR_DEFINER_COMPARE_ARGUMENT_0 = MLX5DR_DEFINER_SELECTOR_DW4, + MLX5DR_DEFINER_COMPARE_ARGUMENT_1 = MLX5DR_DEFINER_SELECTOR_DW5, + MLX5DR_DEFINER_COMPARE_BASE_0 = MLX5DR_DEFINER_SELECTOR_DW2, + MLX5DR_DEFINER_COMPARE_BASE_1 = MLX5DR_DEFINER_SELECTOR_DW3, +}; + enum mlx5dr_definer_fname { MLX5DR_DEFINER_FNAME_ETH_SMAC_48_16_O, MLX5DR_DEFINER_FNAME_ETH_SMAC_48_16_I, @@ -188,6 +219,8 @@ struct mlx5dr_definer_fc { uint8_t item_idx; uint8_t is_range; uint16_t extra_data; + uint8_t compare_idx; + bool compare_set_base; uint32_t byte_off; int bit_off; uint32_t bit_mask; diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.c b/drivers/net/mlx5/hws/mlx5dr_matcher.c index 4ea161eae6..cede24237f 100644 --- a/drivers/net/mlx5/hws/mlx5dr_matcher.c +++ b/drivers/net/mlx5/hws/mlx5dr_matcher.c @@ -485,6 +485,7 @@ static int mlx5dr_matcher_create_rtc(struct mlx5dr_matcher *matcher, rtc_attr.log_depth = attr->table.sz_col_log; rtc_attr.is_frst_jumbo = mlx5dr_matcher_mt_is_jumbo(mt); rtc_attr.is_scnd_range = mlx5dr_matcher_mt_is_range(mt); + rtc_attr.is_compare = mlx5dr_matcher_is_compare(matcher); rtc_attr.miss_ft_id = matcher->end_ft->id; if (attr->insert_mode == MLX5DR_MATCHER_INSERT_BY_HASH) { @@ -497,6 +498,10 @@ static int mlx5dr_matcher_create_rtc(struct mlx5dr_matcher *matcher, rtc_attr.num_hash_definer = 1; rtc_attr.match_definer_0 = mlx5dr_definer_get_id(matcher->hash_definer); + } else if (mlx5dr_matcher_is_compare(matcher)) { + rtc_attr.match_definer_0 = ctx->caps->trivial_match_definer; + rtc_attr.fw_gen_wqe = true; + rtc_attr.num_hash_definer = 1; } else { /* The first mt is used since all share the same definer */ rtc_attr.match_definer_0 = mlx5dr_definer_get_id(mt->definer); @@ -1452,3 +1457,46 @@ int mlx5dr_match_template_destroy(struct mlx5dr_match_template *mt) simple_free(mt); return 0; } + +int mlx5dr_matcher_validate_compare_attr(struct mlx5dr_matcher *matcher) +{ + struct mlx5dr_cmd_query_caps *caps = matcher->tbl->ctx->caps; + struct mlx5dr_matcher_attr *attr = &matcher->attr; + + if (mlx5dr_table_is_root(matcher->tbl)) { + DR_LOG(ERR, "Compare matcher is not supported for root tables"); + goto err; + } + + if (attr->mode != MLX5DR_MATCHER_RESOURCE_MODE_HTABLE) { + DR_LOG(ERR, "Compare matcher is only supported with pre-defined table size"); + goto err; + } + + if (attr->insert_mode != MLX5DR_MATCHER_INSERT_BY_HASH || + attr->distribute_mode != MLX5DR_MATCHER_DISTRIBUTE_BY_HASH) { + DR_LOG(ERR, "Gen WQE for compare matcher must be inserted and distribute by hash"); + goto err; + } + + if (matcher->num_of_mt != 1 || matcher->num_of_at != 1) { + DR_LOG(ERR, "Compare matcher match templates and action templates must be 1 for each"); + goto err; + } + + if (attr->table.sz_col_log || attr->table.sz_row_log) { + DR_LOG(ERR, "Compare matcher supports only 1x1 table size"); + goto err; + } + + if (!IS_BIT_SET(caps->supp_ste_format_gen_wqe, MLX5_IFC_RTC_STE_FORMAT_4DW_RANGE)) { + DR_LOG(ERR, "Gen WQE Compare match format not supported"); + goto err; + } + + return 0; + +err: + rte_errno = ENOTSUP; + return rte_errno; +} diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.h b/drivers/net/mlx5/hws/mlx5dr_matcher.h index 363a61fd41..ca6c212536 100644 --- a/drivers/net/mlx5/hws/mlx5dr_matcher.h +++ b/drivers/net/mlx5/hws/mlx5dr_matcher.h @@ -26,6 +26,7 @@ enum mlx5dr_matcher_flags { MLX5DR_MATCHER_FLAGS_RANGE_DEFINER = 1 << 0, MLX5DR_MATCHER_FLAGS_HASH_DEFINER = 1 << 1, MLX5DR_MATCHER_FLAGS_COLLISION = 1 << 2, + MLX5DR_MATCHER_FLAGS_COMPARE = 1 << 4, }; struct mlx5dr_match_template { @@ -89,12 +90,19 @@ mlx5dr_matcher_mt_is_range(struct mlx5dr_match_template *mt) return (!!mt->range_definer); } +static inline bool +mlx5dr_matcher_is_compare(struct mlx5dr_matcher *matcher) +{ + return !!(matcher->flags & MLX5DR_MATCHER_FLAGS_COMPARE); +} + static inline bool mlx5dr_matcher_req_fw_wqe(struct mlx5dr_matcher *matcher) { /* Currently HWS doesn't support hash different from match or range */ return unlikely(matcher->flags & (MLX5DR_MATCHER_FLAGS_HASH_DEFINER | - MLX5DR_MATCHER_FLAGS_RANGE_DEFINER)); + MLX5DR_MATCHER_FLAGS_RANGE_DEFINER | + MLX5DR_MATCHER_FLAGS_COMPARE)); } int mlx5dr_matcher_conv_items_to_prm(uint64_t *match_buf, @@ -120,4 +128,6 @@ int mlx5dr_matcher_free_rtc_pointing(struct mlx5dr_context *ctx, enum mlx5dr_table_type type, struct mlx5dr_devx_obj *devx_obj); +int mlx5dr_matcher_validate_compare_attr(struct mlx5dr_matcher *matcher); + #endif /* MLX5DR_MATCHER_H_ */ -- 2.25.1