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Wed, 7 Feb 2024 07:55:52 -0800 From: Michael Baum To: CC: Matan Azrad , Dariusz Sosnowski , Raslan Darawsheh , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH v2 6/7] net/mlx5: support modify IPv6 traffic class field Date: Wed, 7 Feb 2024 17:55:32 +0200 Message-ID: <20240207155533.1582031-7-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240207155533.1582031-1-michaelba@nvidia.com> References: <20240206143950.1499532-1-michaelba@nvidia.com> <20240207155533.1582031-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E9:EE_|CY5PR12MB6551:EE_ X-MS-Office365-Filtering-Correlation-Id: 8bbb1457-f14d-44e6-03b4-08dc27f54985 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: SjK4fg7rjUFAIDcXM9vegQ9o8wvEyXngy7lUpVsvSKKYHalx12ZVF1WB2RLOTnqt4vTQ7qP/txRU32y5905SkV0US/N+BQuX7Xq7+hJmeayVyE+8/3Tp4yFlGvBA4n4t+5sTzaCg9vF+72E3eYe/kHyaZgrDWti+3IWAiREyFg8JsEYT+HckSayMKsKlHpxp3DcmxEpYFQGGqX+Hk5icAZi2iWvjCKESShXcP9eBP8PIGoY+EmDSyXeWhl+yPw85Hir0P7r1/TyVKtJ+TooQ4lgxO1DViyTuvgVJbPo8Csf+hAth0/sZYP2HtVAaq6109TbZMJ2EqvN+AvNna5MgaTAxhOTg4gJSzWqP++HeITWXLem9nXmEgeG+9luyIFy4Q/5O4Q/OvsdRIxhehh6UVSdKJ9Qwa4tjSOazesQM+JHd744Ko/EvsrOxYrIBxqzb+6X/6fPP7Vy+FxNmEwYJWbMM7gdcT9LgdhnqUU+n4KKcZCgWX2HDstvNkNNMVpE5EkKTU0bbHMDoMb6aV6ndYz2eCqabKTUB3UFTLBvhK0KEvg+8BptJyExXJ8OG13ClNtQylkpj2RmYzBYzVJyXSuEJprn2NrfK6taJdOETZhTEqGfip7NjpTPd7eNlHl9DG7O1eu5ouADTanSIQSPwyYhbMVgkNE2SELBhBYsx1feiqKklO/P7O2QlaqKePvVMg/J/qAv/tWiRoCDxxjnMp3ioDIe7arnXNSE/MHF64xRVEbNYKXzqQ4k+YqF5719G X-Forefront-Antispam-Report: CIP:216.228.117.161; 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Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6551 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add HW steering support for IPv6 traffic class field modification. Copy from inner IPv6 traffic class field is also supported using "level=2". Signed-off-by: Michael Baum --- doc/guides/rel_notes/release_24_03.rst | 1 + drivers/net/mlx5/mlx5_flow_dv.c | 11 +++++++++++ drivers/net/mlx5/mlx5_flow_hw.c | 3 ++- 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index a504aebe15..50ba66daac 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -113,6 +113,7 @@ New Features * Added HW steering support for modify field ``RTE_FLOW_FIELD_ESP_SPI`` flow action. * Added HW steering support for modify field ``RTE_FLOW_FIELD_ESP_SEQ_NUM`` flow action. * Added HW steering support for modify field ``RTE_FLOW_FIELD_ESP_PROTO`` flow action. + * Added HW steering support for modify field ``RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS`` flow action. Removed Items diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 46f9f59e67..7d92c1cc24 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1394,6 +1394,7 @@ mlx5_flow_item_field_width(struct rte_eth_dev *dev, return 32; case RTE_FLOW_FIELD_IPV6_DSCP: return 6; + case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS: case RTE_FLOW_FIELD_IPV6_HOPLIMIT: case RTE_FLOW_FIELD_IPV6_PROTO: return 8; @@ -1795,6 +1796,16 @@ mlx5_flow_field_id_to_modify_info else info[idx].offset = off_be; break; + case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS: + MLX5_ASSERT(data->offset + width <= 8); + off_be = 8 - (data->offset + width); + modi_id = CALC_MODI_ID(IPV6_TRAFFIC_CLASS, data->level); + info[idx] = (struct field_modify_info){1, 0, modi_id}; + if (mask) + mask[idx] = flow_modify_info_mask_8(width, off_be); + else + info[idx].offset = off_be; + break; case RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN: MLX5_ASSERT(data->offset + width <= 16); off_be = 16 - (data->offset + width); diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 7a1821f457..a41b46e18f 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -2874,7 +2874,7 @@ flow_hw_modify_field_construct(struct mlx5_hw_q_job *job, * bits left. Shift the data left for IPV6 DSCP */ if (field->id == MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS && - !(mask & MLX5_IPV6_HDR_ECN_MASK)) + mhdr_action->dst.field == RTE_FLOW_FIELD_IPV6_DSCP) data <<= MLX5_IPV6_HDR_DSCP_SHIFT; data = (data & mask) >> off_b; job->mhdr_cmd[i++].data1 = rte_cpu_to_be_32(data); @@ -5063,6 +5063,7 @@ flow_hw_validate_modify_field_level(const struct rte_flow_field_data *data, case RTE_FLOW_FIELD_IPV4_TTL: case RTE_FLOW_FIELD_IPV4_SRC: case RTE_FLOW_FIELD_IPV4_DST: + case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS: case RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN: case RTE_FLOW_FIELD_IPV6_HOPLIMIT: case RTE_FLOW_FIELD_IPV6_SRC: -- 2.25.1