From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C206143BED; Mon, 26 Feb 2024 14:36:33 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 00FBC42E71; Mon, 26 Feb 2024 14:36:10 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id C55D342E71 for ; Mon, 26 Feb 2024 14:35:59 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41Q9smqw014377 for ; Mon, 26 Feb 2024 05:35:59 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=uzWW1mzIpE++Qeitkoc9LZhQawy+f9TsdY1R3h49BWs=; b=eLP +ura3KsXhMsV+E85zOJt0a/gzII0b/RjV5QoJxxgpUYao//a7EBKKFZfxDsw4ynA YYLVUnYG/ptry70BN8QpfMwP5KGl1hGw0DcyqnCDBi4vnBAz6zc4vKdlaCpz75Zc yZNrlu1Cs6hrWje5HvxSSMlVc6BwZpw5vI1SBlJA4qTKUF3UDmQRwsa9dH4cSlp3 6akSTYNH7csd7mw53RaZ0vbfC9frQFRNY44qPZhYo2T7OvWy+fWnpfkfWQ9tB6tH aEgLC2yKEoGx1xYCVwdQCf9hoo6O4lXXAHpwxZz/7K6BVTy1dBNY8klZTguHhSF3 9TBgZOX0xEg7J3eqzqA== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3wgre8rjau-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 26 Feb 2024 05:35:58 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.1258.12; Mon, 26 Feb 2024 05:35:58 -0800 Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Mon, 26 Feb 2024 05:35:57 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Mon, 26 Feb 2024 05:35:57 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 49F833F7071; Mon, 26 Feb 2024 05:35:55 -0800 (PST) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH v5 07/14] common/cnxk: fix Tx MTU configuration Date: Mon, 26 Feb 2024 19:05:29 +0530 Message-ID: <20240226133536.2456406-7-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240226133536.2456406-1-ndabilpuram@marvell.com> References: <20240208085956.1741174-1-ndabilpuram@marvell.com> <20240226133536.2456406-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: AuUa71o2VKQBTFySzcaYLMgKTaSlGXmq X-Proofpoint-GUID: AuUa71o2VKQBTFySzcaYLMgKTaSlGXmq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-26_09,2024-02-26_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Skip setting Tx MTU separately as now the Tx credit configuration is based on max MTU possible for that link. Also init MTU with max value for that port. Fixes: 8589ec212e80 ("net/cnxk: support MTU set") Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_nix.c | 2 +- drivers/common/cnxk/roc_nix.h | 2 -- drivers/net/cnxk/cnxk_ethdev_ops.c | 12 +----------- 3 files changed, 2 insertions(+), 14 deletions(-) diff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c index 97c0ae3e25..90ccb260fb 100644 --- a/drivers/common/cnxk/roc_nix.c +++ b/drivers/common/cnxk/roc_nix.c @@ -484,7 +484,7 @@ roc_nix_dev_init(struct roc_nix *roc_nix) sdp_lbk_id_update(pci_dev, nix); nix->pci_dev = pci_dev; nix->reta_sz = reta_sz; - nix->mtu = ROC_NIX_DEFAULT_HW_FRS; + nix->mtu = roc_nix_max_pkt_len(roc_nix); nix->dmac_flt_idx = -1; /* Register error and ras interrupts */ diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 9d57ca0be7..3799b551f2 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -267,8 +267,6 @@ struct roc_nix_eeprom_info { #define ROC_NIX_RSS_KEY_LEN 48 /* 352 Bits */ #define ROC_NIX_RSS_MCAM_IDX_DEFAULT (-1) -#define ROC_NIX_DEFAULT_HW_FRS 1514 - #define ROC_NIX_VWQE_MAX_SIZE_LOG2 11 #define ROC_NIX_VWQE_MIN_SIZE_LOG2 2 diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c index e816884d47..4962f3bced 100644 --- a/drivers/net/cnxk/cnxk_ethdev_ops.c +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c @@ -610,19 +610,9 @@ cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) frame_size -= RTE_ETHER_CRC_LEN; - /* Update mtu on Tx */ - rc = roc_nix_mac_mtu_set(nix, frame_size); - if (rc) { - plt_err("Failed to set MTU, rc=%d", rc); - goto exit; - } - - /* Sync same frame size on Rx */ + /* Set frame size on Rx */ rc = roc_nix_mac_max_rx_len_set(nix, frame_size); if (rc) { - /* Rollback to older mtu */ - roc_nix_mac_mtu_set(nix, - old_frame_size - RTE_ETHER_CRC_LEN); plt_err("Failed to max Rx frame length, rc=%d", rc); goto exit; } -- 2.25.1