[PATCH] net/mlx5: fix the HWS registers initialization

[Bing Zhao <bingz@nvidia.com>]

The method to initialize tag registers by using capability bits is
not supported on some old NICs. In the meanwhile, the HWS for flow
rule insertion is not supported either. There is no need to
initialize HWS only resource on the old NICs.

Fixes: 48041ccbaa8d ("net/mlx5: initialize HWS flow registers in shared context")
Cc: getelson@nvidia.com
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Suanming Mou <suanmingm@nvidia.com>
---
 drivers/net/mlx5/mlx5.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 881c42a97a..9903efbe53 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1690,7 +1690,8 @@ mlx5_init_shared_dev_registers(struct mlx5_dev_ctx_shared *sh)
 	} else {
 		DRV_LOG(DEBUG, "ASO register: NONE");
 	}
-	mlx5_init_hws_flow_tags_registers(sh);
+	if (sh->config.dv_flow_en == 2)
+		mlx5_init_hws_flow_tags_registers(sh);
 }
 
 static struct mlx5_physical_device *
-- 
2.39.3