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From: Amit Prakash Shukla <amitprakashs@marvell.com>
To: Cheng Jiang <honest.jiang@foxmail.com>,
	Chengwen Feng <fengchengwen@huawei.com>
Cc: <dev@dpdk.org>, <jerinj@marvell.com>, <anoobj@marvell.com>,
	Kevin Laatz <kevin.laatz@intel.com>,
	Bruce Richardson <bruce.richardson@intel.com>,
	"Pavan Nikhilesh" <pbhagavatula@marvell.com>,
	Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>,
	Amit Prakash Shukla <amitprakashs@marvell.com>
Subject: [PATCH v10 2/4] app/dma-perf: add PCI device support
Date: Wed, 28 Feb 2024 00:05:53 +0530	[thread overview]
Message-ID: <20240227183555.3932711-3-amitprakashs@marvell.com> (raw)
In-Reply-To: <20240227183555.3932711-1-amitprakashs@marvell.com>

Add support to test performance for "device to memory" and
"memory to device" data transfer.

Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
---
v10:
- PCI config parsing using kvargs.

 app/test-dma-perf/benchmark.c | 117 ++++++++++++++++++++++++++++++----
 app/test-dma-perf/config.ini  |  33 ++++++++++
 app/test-dma-perf/main.c      |  77 ++++++++++++++++++++++
 app/test-dma-perf/main.h      |   7 ++
 4 files changed, 222 insertions(+), 12 deletions(-)

diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index 9b1f58c78c..4370d71134 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -127,17 +127,54 @@ cache_flush_buf(__rte_unused struct rte_mbuf **array,
 #endif
 }
 
+static int
+vchan_data_populate(uint32_t dev_id, struct rte_dma_vchan_conf *qconf,
+		    struct test_configure *cfg)
+{
+	struct rte_dma_info info;
+
+	qconf->direction = cfg->transfer_dir;
+
+	rte_dma_info_get(dev_id, &info);
+	if (!(RTE_BIT64(qconf->direction) & info.dev_capa))
+		return -1;
+
+	qconf->nb_desc = cfg->ring_size.cur;
+
+	switch (qconf->direction) {
+	case RTE_DMA_DIR_MEM_TO_DEV:
+		qconf->dst_port.pcie.vfen = 1;
+		qconf->dst_port.port_type = RTE_DMA_PORT_PCIE;
+		qconf->dst_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid;
+		qconf->dst_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid;
+		qconf->dst_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid;
+		break;
+	case RTE_DMA_DIR_DEV_TO_MEM:
+		qconf->src_port.pcie.vfen = 1;
+		qconf->src_port.port_type = RTE_DMA_PORT_PCIE;
+		qconf->src_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid;
+		qconf->src_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid;
+		qconf->src_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid;
+		break;
+	case RTE_DMA_DIR_MEM_TO_MEM:
+	case RTE_DMA_DIR_DEV_TO_DEV:
+		break;
+	}
+
+	return 0;
+}
+
 /* Configuration of device. */
 static void
-configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size)
+configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg)
 {
 	uint16_t vchan = 0;
 	struct rte_dma_info info;
 	struct rte_dma_conf dev_config = { .nb_vchans = 1 };
-	struct rte_dma_vchan_conf qconf = {
-		.direction = RTE_DMA_DIR_MEM_TO_MEM,
-		.nb_desc = ring_size
-	};
+	struct rte_dma_vchan_conf qconf = { 0 };
+
+	if (vchan_data_populate(dev_id, &qconf, cfg) != 0)
+		rte_exit(EXIT_FAILURE, "Error with vchan data populate.\n");
 
 	if (rte_dma_configure(dev_id, &dev_config) != 0)
 		rte_exit(EXIT_FAILURE, "Error with dma configure.\n");
@@ -159,7 +196,6 @@ configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size)
 static int
 config_dmadevs(struct test_configure *cfg)
 {
-	uint32_t ring_size = cfg->ring_size.cur;
 	struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map;
 	uint32_t nb_workers = ldm->cnt;
 	uint32_t i;
@@ -176,7 +212,7 @@ config_dmadevs(struct test_configure *cfg)
 		}
 
 		ldm->dma_ids[i] = dev_id;
-		configure_dmadev_queue(dev_id, ring_size);
+		configure_dmadev_queue(dev_id, cfg);
 		++nb_dmadevs;
 	}
 
@@ -302,13 +338,23 @@ do_cpu_mem_copy(void *p)
 	return 0;
 }
 
+static void
+dummy_free_ext_buf(void *addr, void *opaque)
+{
+	RTE_SET_USED(addr);
+	RTE_SET_USED(opaque);
+}
+
 static int
 setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs,
 			struct rte_mbuf ***dsts)
 {
-	unsigned int buf_size = cfg->buf_size.cur;
+	static struct rte_mbuf_ext_shared_info *ext_buf_info;
+	unsigned int cur_buf_size = cfg->buf_size.cur;
+	unsigned int buf_size = cur_buf_size + RTE_PKTMBUF_HEADROOM;
 	unsigned int nr_sockets;
 	uint32_t nr_buf = cfg->nr_buf;
+	uint32_t i;
 
 	nr_sockets = rte_socket_count();
 	if (cfg->src_numa_node >= nr_sockets ||
@@ -321,7 +367,7 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs,
 			nr_buf,
 			0,
 			0,
-			buf_size + RTE_PKTMBUF_HEADROOM,
+			buf_size,
 			cfg->src_numa_node);
 	if (src_pool == NULL) {
 		PRINT_ERR("Error with source mempool creation.\n");
@@ -332,7 +378,7 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs,
 			nr_buf,
 			0,
 			0,
-			buf_size + RTE_PKTMBUF_HEADROOM,
+			buf_size,
 			cfg->dst_numa_node);
 	if (dst_pool == NULL) {
 		PRINT_ERR("Error with destination mempool creation.\n");
@@ -361,16 +407,49 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs,
 		return -1;
 	}
 
+	if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM ||
+	    cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) {
+		ext_buf_info = rte_malloc(NULL, sizeof(struct rte_mbuf_ext_shared_info), 0);
+		if (ext_buf_info == NULL) {
+			printf("Error: ext_buf_info malloc failed.\n");
+			return -1;
+		}
+	}
+
+	if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) {
+		ext_buf_info->free_cb = dummy_free_ext_buf;
+		ext_buf_info->fcb_opaque = NULL;
+		for (i = 0; i < nr_buf; i++) {
+			/* Using mbuf structure to hold remote iova address. */
+			rte_pktmbuf_attach_extbuf((*srcs)[i], (void *)(cfg->vchan_dev.raddr +
+						 (i * buf_size)), (rte_iova_t)(cfg->vchan_dev.raddr +
+						 (i * buf_size)), 0, ext_buf_info);
+			rte_mbuf_ext_refcnt_update(ext_buf_info, 1);
+		}
+	}
+
+	if (cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) {
+		ext_buf_info->free_cb = dummy_free_ext_buf;
+		ext_buf_info->fcb_opaque = NULL;
+		for (i = 0; i < nr_buf; i++) {
+			/* Using mbuf structure to hold remote iova address. */
+			rte_pktmbuf_attach_extbuf((*dsts)[i], (void *)(cfg->vchan_dev.raddr +
+						 (i * buf_size)), (rte_iova_t)(cfg->vchan_dev.raddr +
+						 (i * buf_size)), 0, ext_buf_info);
+			rte_mbuf_ext_refcnt_update(ext_buf_info, 1);
+		}
+	}
+
 	return 0;
 }
 
 void
 mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
 {
-	uint16_t i;
+	uint32_t i;
 	uint32_t offset;
 	unsigned int lcore_id = 0;
-	struct rte_mbuf **srcs = NULL, **dsts = NULL;
+	struct rte_mbuf **srcs = NULL, **dsts = NULL, **m = NULL;
 	struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map;
 	unsigned int buf_size = cfg->buf_size.cur;
 	uint16_t kick_batch = cfg->kick_batch.cur;
@@ -476,6 +555,20 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
 			avg_cycles_total / nb_workers, bandwidth_total, mops_total);
 
 out:
+
+	if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM)
+		m = srcs;
+	else if (cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV)
+		m = dsts;
+
+	if (m) {
+		for (i = 0; i < nr_buf; i++)
+			rte_pktmbuf_detach_extbuf(m[i]);
+
+		if (m[0]->shinfo && rte_mbuf_ext_refcnt_read(m[0]->shinfo) == 0)
+			rte_free(m[0]->shinfo);
+	}
+
 	/* free mbufs used in the test */
 	if (srcs != NULL)
 		rte_pktmbuf_free_bulk(srcs, nr_buf);
diff --git a/app/test-dma-perf/config.ini b/app/test-dma-perf/config.ini
index 4d59234b2a..9c8221025e 100644
--- a/app/test-dma-perf/config.ini
+++ b/app/test-dma-perf/config.ini
@@ -38,6 +38,23 @@
 
 ; "skip" To skip a test-case set skip to 1.
 
+; Parameters to be configured for data transfers from "mem to dev" and "dev to mem":
+; ==================================================================================
+; "direction" denotes the direction of data transfer. It can take 3 values:
+;    mem2mem - mem to mem transfer
+;    mem2dev - mem to dev transfer
+;    dev2mem - dev to mem transfer
+; If not specified the default value is mem2mem transfer.
+
+; "vchan_dev comma separated bus related config parameter for mem2dev and dev2mem dma transfer. Ex:"
+; vchan_dev=raddr=0x400000,coreid=1,pfid=2,vfid=3
+;    "raddr" remote iova address for mem2dev and dev2mem transfer.
+;    "coreid" denotes PCIe core index.
+;    "pfid" denotes PF-id to be used for data transfer
+;    "vfid" denotes VF-id of PF-id to be used for data transfer.
+
+; =========== End of "mem2dev" and "dev2mem" config parameters. ==============
+
 [case1]
 type=DMA_MEM_COPY
 mem_size=10
@@ -52,6 +69,22 @@ lcore_dma=lcore10@0000:00:04.2, lcore11@0000:00:04.3
 eal_args=--in-memory --file-prefix=test
 
 [case2]
+skip=1
+type=DMA_MEM_COPY
+direction=dev2mem
+vchan_dev=raddr=0x200000000,coreid=1,pfid=2,vfid=3
+mem_size=10
+buf_size=64,4096,2,MUL
+dma_ring_size=1024
+kick_batch=32
+src_numa_node=0
+dst_numa_node=0
+cache_flush=0
+test_seconds=2
+lcore_dma=lcore10@0000:00:04.2, lcore11@0000:00:04.3
+eal_args=--in-memory --file-prefix=test
+
+[case3]
 type=CPU_MEM_COPY
 mem_size=10
 buf_size=64,8192,2,MUL
diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c
index e9e40e72e7..051f76a6f9 100644
--- a/app/test-dma-perf/main.c
+++ b/app/test-dma-perf/main.c
@@ -16,6 +16,8 @@
 #include <rte_cfgfile.h>
 #include <rte_string_fns.h>
 #include <rte_lcore.h>
+#include <rte_dmadev.h>
+#include <rte_kvargs.h>
 
 #include "main.h"
 
@@ -325,6 +327,28 @@ parse_entry(const char *value, struct test_configure_entry *entry)
 	return args_nr;
 }
 
+static int populate_pcie_config(const char *key, const char *value, void *test)
+{
+	struct test_configure *test_case = (struct test_configure *)test;
+	char *endptr;
+	int ret = 0;
+
+	if (strcmp(key, "raddr") == 0)
+		test_case->vchan_dev.raddr = strtoull(value, &endptr, 16);
+	else if (strcmp(key, "coreid") == 0)
+		test_case->vchan_dev.port.pcie.coreid = (uint8_t)atoi(value);
+	else if (strcmp(key, "vfid") == 0)
+		test_case->vchan_dev.port.pcie.vfid = (uint16_t)atoi(value);
+	else if (strcmp(key, "pfid") == 0)
+		test_case->vchan_dev.port.pcie.pfid = (uint16_t)atoi(value);
+	else {
+		printf("Invalid config param: %s\n", key);
+		ret = -1;
+	}
+
+	return ret;
+}
+
 static uint16_t
 load_configs(const char *path)
 {
@@ -333,9 +357,12 @@ load_configs(const char *path)
 	struct test_configure *test_case;
 	char section_name[CFG_NAME_LEN];
 	const char *case_type;
+	const char *transfer_dir;
 	const char *lcore_dma;
 	const char *mem_size_str, *buf_size_str, *ring_size_str, *kick_batch_str;
 	const char *skip;
+	struct rte_kvargs *kvlist;
+	const char *vchan_dev;
 	int args_nr, nb_vp;
 	bool is_dma;
 
@@ -373,6 +400,22 @@ load_configs(const char *path)
 		if (strcmp(case_type, DMA_MEM_COPY) == 0) {
 			test_case->test_type = TEST_TYPE_DMA_MEM_COPY;
 			test_case->test_type_str = DMA_MEM_COPY;
+
+			transfer_dir = rte_cfgfile_get_entry(cfgfile, section_name, "direction");
+			if (transfer_dir == NULL) {
+				printf("Transfer direction not configured."
+					" Defaulting it to MEM to MEM transfer.\n");
+				test_case->transfer_dir = RTE_DMA_DIR_MEM_TO_MEM;
+			} else {
+				if (strcmp(transfer_dir, "mem2dev") == 0)
+					test_case->transfer_dir = RTE_DMA_DIR_MEM_TO_DEV;
+				else if (strcmp(transfer_dir, "dev2mem") == 0)
+					test_case->transfer_dir = RTE_DMA_DIR_DEV_TO_MEM;
+				else {
+					printf("Defaulting the test to MEM to MEM transfer\n");
+					test_case->transfer_dir = RTE_DMA_DIR_MEM_TO_MEM;
+				}
+			}
 			is_dma = true;
 		} else if (strcmp(case_type, CPU_MEM_COPY) == 0) {
 			test_case->test_type = TEST_TYPE_CPU_MEM_COPY;
@@ -384,6 +427,40 @@ load_configs(const char *path)
 			continue;
 		}
 
+		if (test_case->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV ||
+			test_case->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) {
+			vchan_dev = rte_cfgfile_get_entry(cfgfile, section_name, "vchan_dev");
+			if (vchan_dev == NULL) {
+				printf("Transfer direction mem2dev and dev2mem"
+				       " vhcan_dev shall be configured.\n");
+				test_case->is_valid = false;
+				continue;
+			}
+
+			kvlist = rte_kvargs_parse(vchan_dev, NULL);
+			if (kvlist == NULL) {
+				printf("rte_kvargs_parse() error");
+				test_case->is_valid = false;
+				continue;
+			}
+
+			if (rte_kvargs_process(kvlist, NULL, populate_pcie_config,
+					       (void *)test_case) < 0) {
+				printf("rte_kvargs_process() error\n");
+				rte_kvargs_free(kvlist);
+				test_case->is_valid = false;
+				continue;
+			}
+
+			if (!test_case->vchan_dev.raddr) {
+				printf("For mem2dev and dev2mem configure raddr\n");
+				rte_kvargs_free(kvlist);
+				test_case->is_valid = false;
+				continue;
+			}
+			rte_kvargs_free(kvlist);
+		}
+
 		test_case->src_numa_node = (int)atoi(rte_cfgfile_get_entry(cfgfile,
 								section_name, "src_numa_node"));
 		test_case->dst_numa_node = (int)atoi(rte_cfgfile_get_entry(cfgfile,
diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h
index 32670151af..745c24b7fe 100644
--- a/app/test-dma-perf/main.h
+++ b/app/test-dma-perf/main.h
@@ -38,10 +38,16 @@ struct lcore_dma_map_t {
 	uint16_t cnt;
 };
 
+struct test_vchan_dev_config {
+	struct rte_dma_port_param port;
+	uintptr_t raddr;
+};
+
 struct test_configure {
 	bool is_valid;
 	bool is_skip;
 	uint8_t test_type;
+	uint8_t transfer_dir;
 	const char *test_type_str;
 	uint16_t src_numa_node;
 	uint16_t dst_numa_node;
@@ -57,6 +63,7 @@ struct test_configure {
 	uint16_t test_secs;
 	const char *eal_args;
 	uint8_t scenario_id;
+	struct test_vchan_dev_config vchan_dev;
 };
 
 void mem_copy_benchmark(struct test_configure *cfg, bool is_dma);
-- 
2.34.1


  parent reply	other threads:[~2024-02-27 19:08 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-10 10:57 [PATCH v2] app/dma-perf: add SG copy support Gowrishankar Muthukrishnan
2023-08-10 13:01 ` [PATCH v3 0/2] " Gowrishankar Muthukrishnan
2023-08-10 13:01   ` [PATCH v3 1/2] app/dma-perf: validate copied memory Gowrishankar Muthukrishnan
2023-08-23 11:46     ` [EXT] " Pavan Nikhilesh Bhagavatula
2023-08-10 13:01   ` [PATCH v3 2/2] app/dma-perf: add SG copy support Gowrishankar Muthukrishnan
2023-09-21  3:02   ` [PATCH v3 0/2] " Jiang, Cheng1
2023-09-24  9:32   ` [PATCH v4 " Gowrishankar Muthukrishnan
2023-09-24  9:32     ` [PATCH v4 1/2] app/dma-perf: validate copied memory Gowrishankar Muthukrishnan
2023-09-24  9:32     ` [PATCH v4 2/2] app/dma-perf: add SG copy support Gowrishankar Muthukrishnan
2023-09-28 21:12       ` Pavan Nikhilesh Bhagavatula
2023-10-26 18:31     ` [PATCH v5 0/4] app/dma-perf: PCI Dev and " Gowrishankar Muthukrishnan
2023-10-26 18:31       ` [PATCH v5 1/4] app/dma-perf: add skip support Gowrishankar Muthukrishnan
2023-11-10  9:03         ` Anoob Joseph
2023-10-26 18:31       ` [PATCH v5 2/4] app/dma-perf: add PCI device support Gowrishankar Muthukrishnan
2023-11-10  9:04         ` Anoob Joseph
2023-10-26 18:31       ` [PATCH v5 3/4] app/dma-perf: validate copied memory Gowrishankar Muthukrishnan
2023-11-10  9:05         ` Anoob Joseph
2023-10-26 18:31       ` [PATCH v5 4/4] app/dma-perf: add SG copy support Gowrishankar Muthukrishnan
2023-11-10  9:07         ` Anoob Joseph
2023-11-13  4:41       ` [PATCH v6 0/4] PCI Dev and " Gowrishankar Muthukrishnan
2023-11-13  4:41         ` [PATCH v6 1/4] app/dma-perf: add skip support Gowrishankar Muthukrishnan
2023-11-13  4:41         ` [PATCH v6 2/4] app/dma-perf: add PCI device support Gowrishankar Muthukrishnan
2023-11-13  4:41         ` [PATCH v6 3/4] app/dma-perf: validate copied memory Gowrishankar Muthukrishnan
2023-11-13  4:41         ` [PATCH v6 4/4] app/dma-perf: add SG copy support Gowrishankar Muthukrishnan
2023-11-17 12:15         ` [PATCH v7 0/4] PCI Dev and " Gowrishankar Muthukrishnan
2023-11-17 12:15           ` [PATCH v7 1/4] app/dma-perf: add skip support Gowrishankar Muthukrishnan
2023-11-20  2:54             ` fengchengwen
2023-11-22 12:01               ` [EXT] " Amit Prakash Shukla
2023-11-17 12:15           ` [PATCH v7 2/4] app/dma-perf: add PCI device support Gowrishankar Muthukrishnan
2023-11-17 12:15           ` [PATCH v7 3/4] app/dma-perf: validate copied memory Gowrishankar Muthukrishnan
2023-11-17 12:15           ` [PATCH v7 4/4] app/dma-perf: add SG copy support Gowrishankar Muthukrishnan
2023-11-22 11:06           ` [PATCH v8 0/4] PCI Dev and " Gowrishankar Muthukrishnan
2023-11-22 11:06             ` [PATCH v8 1/4] app/dma-perf: add skip support Gowrishankar Muthukrishnan
2023-11-22 11:06             ` [PATCH v8 2/4] app/dma-perf: add PCI device support Gowrishankar Muthukrishnan
2023-11-23  1:12               ` fengchengwen
2024-02-21  3:26               ` fengchengwen
2024-02-27  9:27                 ` [EXT] " Amit Prakash Shukla
2023-11-22 11:06             ` [PATCH v8 3/4] app/dma-perf: validate copied memory Gowrishankar Muthukrishnan
2023-11-23  1:14               ` fengchengwen
2023-11-22 11:06             ` [PATCH v8 4/4] app/dma-perf: add SG copy support Gowrishankar Muthukrishnan
2024-01-25 12:44               ` fengchengwen
2024-02-21  3:52               ` fengchengwen
2024-02-27 16:09                 ` [EXT] " Gowrishankar Muthukrishnan
2023-12-07 10:11             ` [PATCH v8 0/4] PCI Dev and " Gowrishankar Muthukrishnan
2024-02-05 10:37               ` Gowrishankar Muthukrishnan
2024-02-27 16:00             ` [PATCH v9 " Amit Prakash Shukla
2024-02-27 16:00               ` [PATCH v9 1/4] app/dma-perf: add skip support Amit Prakash Shukla
2024-02-27 16:00               ` [PATCH v9 2/4] app/dma-perf: add PCI device support Amit Prakash Shukla
2024-02-27 16:00               ` [PATCH v9 3/4] app/dma-perf: validate copied memory Amit Prakash Shukla
2024-02-27 16:00               ` [PATCH v9 4/4] app/dma-perf: add SG copy support Amit Prakash Shukla
2024-02-27 18:35               ` [PATCH v10 0/4] PCI Dev and " Amit Prakash Shukla
2024-02-27 18:35                 ` [PATCH v10 1/4] app/dma-perf: add skip support Amit Prakash Shukla
2024-02-27 18:35                 ` Amit Prakash Shukla [this message]
2024-02-27 18:35                 ` [PATCH v10 3/4] app/dma-perf: validate copied memory Amit Prakash Shukla
2024-02-28  8:10                   ` fengchengwen
2024-02-28  9:09                     ` [EXT] " Gowrishankar Muthukrishnan
2024-02-29 13:48                 ` [v11 0/4] PCI Dev and SG copy support Gowrishankar Muthukrishnan
2024-02-29 13:48                   ` [v11 1/4] app/dma-perf: add skip support Gowrishankar Muthukrishnan
2024-02-29 13:48                   ` [v11 2/4] app/dma-perf: add PCI device support Gowrishankar Muthukrishnan
2024-02-29 13:48                   ` [v11 3/4] app/dma-perf: validate copied memory Gowrishankar Muthukrishnan
2024-02-29 13:48                   ` [v11 4/4] app/dma-perf: add SG copy support Gowrishankar Muthukrishnan
2024-03-06 19:50                   ` [v11 0/4] PCI Dev and " Thomas Monjalon
2024-03-07 13:48                     ` fengchengwen
2024-03-07 13:55                       ` [EXTERNAL] " Gowrishankar Muthukrishnan
2024-03-12  9:15                         ` Thomas Monjalon
2024-03-12 12:05                           ` fengchengwen
2024-03-12 12:24                             ` Gowrishankar Muthukrishnan
2024-03-13  7:26                               ` fengchengwen
2024-03-13  8:22                                 ` Gowrishankar Muthukrishnan
2024-03-15  7:30                                   ` Gowrishankar Muthukrishnan
2024-03-15 13:09                                   ` Thomas Monjalon
2024-03-18  7:32                                     ` Gowrishankar Muthukrishnan
2024-03-07 13:48                     ` Gowrishankar Muthukrishnan
2024-02-27 18:56               ` [PATCH v10 4/4] app/dma-perf: add " Amit Prakash Shukla
2024-02-28  9:31                 ` fengchengwen
2024-02-29 13:16                   ` [EXT] " Gowrishankar Muthukrishnan
2024-03-01  2:07                     ` fengchengwen
2024-03-01  8:06                       ` [EXTERNAL] " Gowrishankar Muthukrishnan
2024-03-01  9:45                         ` fengchengwen

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