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From: Bing Zhao <bingz@nvidia.com>
To: <orika@nvidia.com>, <aman.deep.singh@intel.com>,
	<dsosnowski@nvidia.com>,  <viacheslavo@nvidia.com>,
	<suanmingm@nvidia.com>, <matan@nvidia.com>, <thomas@monjalon.net>,
	<ferruh.yigit@amd.com>, <dev@dpdk.org>, <rasland@nvidia.com>
Cc: <yuying.zhang@intel.com>, <andrew.rybchenko@oktetlabs.ru>
Subject: [PATCH v4 5/5] net/mlx5: validate the actions combination with NAT64
Date: Wed, 28 Feb 2024 17:09:13 +0200	[thread overview]
Message-ID: <20240228150913.32603-6-bingz@nvidia.com> (raw)
In-Reply-To: <20240228150913.32603-1-bingz@nvidia.com>

NAT64 is treated as a modify header action. The action order and
limitation should be the same as that of modify header in each
domain.

Since the last 2 TAG registers will be used implicitly in the
address backup mode, the values in these registers are no longer
valid after the NAT64 action. The application should not try to
match these TAGs after the rule that contains NAT64 action.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow.h    |  1 +
 drivers/net/mlx5/mlx5_flow_hw.c | 51 +++++++++++++++++++++++++++++++++
 2 files changed, 52 insertions(+)

diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 897a283716..ea428a8c21 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -392,6 +392,7 @@ enum mlx5_feature_name {
 #define MLX5_FLOW_ACTION_PORT_REPRESENTOR (1ull << 47)
 #define MLX5_FLOW_ACTION_IPV6_ROUTING_REMOVE (1ull << 48)
 #define MLX5_FLOW_ACTION_IPV6_ROUTING_PUSH (1ull << 49)
+#define MLX5_FLOW_ACTION_NAT64 (1ull << 50)
 
 #define MLX5_FLOW_DROP_INCLUSIVE_ACTIONS \
 	(MLX5_FLOW_ACTION_COUNT | MLX5_FLOW_ACTION_SAMPLE | MLX5_FLOW_ACTION_AGE)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index f32bdff98f..7730bcab6f 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -5866,6 +5866,50 @@ flow_hw_validate_action_default_miss(struct rte_eth_dev *dev,
 	return 0;
 }
 
+static int
+flow_hw_validate_action_nat64(struct rte_eth_dev *dev,
+			      const struct rte_flow_actions_template_attr *attr,
+			      const struct rte_flow_action *action,
+			      const struct rte_flow_action *mask,
+			      uint64_t action_flags,
+			      struct rte_flow_error *error)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+	const struct rte_flow_action_nat64 *nat64_c;
+	enum rte_flow_nat64_type cov_type;
+
+	RTE_SET_USED(action_flags);
+	if (mask->conf && ((const struct rte_flow_action_nat64 *)mask->conf)->type) {
+		nat64_c = (const struct rte_flow_action_nat64 *)action->conf;
+		cov_type = nat64_c->type;
+		if ((attr->ingress && !priv->action_nat64[MLX5DR_TABLE_TYPE_NIC_RX][cov_type]) ||
+		    (attr->egress && !priv->action_nat64[MLX5DR_TABLE_TYPE_NIC_TX][cov_type]) ||
+		    (attr->transfer && !priv->action_nat64[MLX5DR_TABLE_TYPE_FDB][cov_type]))
+			goto err_out;
+	} else {
+		/*
+		 * Usually, the actions will be used on both directions. For non-masked actions,
+		 * both directions' actions will be checked.
+		 */
+		if (attr->ingress)
+			if (!priv->action_nat64[MLX5DR_TABLE_TYPE_NIC_RX][RTE_FLOW_NAT64_6TO4] ||
+			    !priv->action_nat64[MLX5DR_TABLE_TYPE_NIC_RX][RTE_FLOW_NAT64_4TO6])
+				goto err_out;
+		if (attr->egress)
+			if (!priv->action_nat64[MLX5DR_TABLE_TYPE_NIC_TX][RTE_FLOW_NAT64_6TO4] ||
+			    !priv->action_nat64[MLX5DR_TABLE_TYPE_NIC_TX][RTE_FLOW_NAT64_4TO6])
+				goto err_out;
+		if (attr->transfer)
+			if (!priv->action_nat64[MLX5DR_TABLE_TYPE_FDB][RTE_FLOW_NAT64_6TO4] ||
+			    !priv->action_nat64[MLX5DR_TABLE_TYPE_FDB][RTE_FLOW_NAT64_4TO6])
+				goto err_out;
+	}
+	return 0;
+err_out:
+	return rte_flow_error_set(error, EOPNOTSUPP, RTE_FLOW_ERROR_TYPE_ACTION,
+				  NULL, "NAT64 action is not supported.");
+}
+
 static int
 mlx5_flow_hw_actions_validate(struct rte_eth_dev *dev,
 			      const struct rte_flow_actions_template_attr *attr,
@@ -6066,6 +6110,13 @@ mlx5_flow_hw_actions_validate(struct rte_eth_dev *dev,
 				MLX5_HW_VLAN_PUSH_VID_IDX;
 			action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
 			break;
+		case RTE_FLOW_ACTION_TYPE_NAT64:
+			ret = flow_hw_validate_action_nat64(dev, attr, action, mask,
+							    action_flags, error);
+			if (ret != 0)
+				return ret;
+			action_flags |= MLX5_FLOW_ACTION_NAT64;
+			break;
 		case RTE_FLOW_ACTION_TYPE_END:
 			actions_end = true;
 			break;
-- 
2.39.3


  parent reply	other threads:[~2024-02-28 15:11 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-27  9:07 [PATCH 0/8] support NAT64 action Bing Zhao
2023-12-27  9:07 ` [PATCH 1/8] ethdev: introduce " Bing Zhao
2023-12-27  9:07 ` [PATCH 2/8] app/testpmd: add support for NAT64 in the command line Bing Zhao
2023-12-27  9:07 ` [PATCH 3/8] net/mlx5: fetch the available registers for NAT64 Bing Zhao
2023-12-27  9:07 ` [PATCH 4/8] common/mlx5: add new modify field defininations Bing Zhao
2023-12-27  9:07 ` [PATCH 5/8] net/mlx5/hws: support NAT64 action Bing Zhao
2023-12-27  9:07 ` [PATCH 6/8] net/mlx5: create NAT64 actions during configuration Bing Zhao
2023-12-27  9:07 ` [PATCH 7/8] net/mlx5: add NAT64 action support in rule creation Bing Zhao
2023-12-27  9:07 ` [PATCH 8/8] net/mlx5: validate the actions combination with NAT64 Bing Zhao
2024-01-31  9:38 ` [PATCH v2 0/2] support NAT64 action Bing Zhao
2024-01-31  9:38   ` [PATCH v2 1/2] ethdev: introduce " Bing Zhao
2024-02-01  8:38     ` Ori Kam
2024-01-31  9:38   ` [PATCH v2 2/2] app/testpmd: add support for NAT64 in the command line Bing Zhao
2024-02-01  8:38     ` Ori Kam
2024-02-01 16:00   ` [PATCH v2 0/2] support NAT64 action Ferruh Yigit
2024-02-01 16:05     ` Ferruh Yigit
2024-02-20 14:10 ` [PATCH v2 0/5] NAT64 support in mlx5 PMD Bing Zhao
2024-02-20 14:10   ` [PATCH v2 1/5] net/mlx5/hws: support NAT64 action Bing Zhao
2024-02-20 14:10   ` [PATCH v2 2/5] net/mlx5: fetch the available registers for NAT64 Bing Zhao
2024-02-20 14:10   ` [PATCH v2 3/5] net/mlx5: create NAT64 actions during configuration Bing Zhao
2024-02-20 14:10   ` [PATCH v2 4/5] net/mlx5: add NAT64 action support in rule creation Bing Zhao
2024-02-20 14:10   ` [PATCH v2 5/5] net/mlx5: validate the actions combination with NAT64 Bing Zhao
2024-02-20 14:37 ` [PATCH v3 0/5] NAT64 support in mlx5 PMD Bing Zhao
2024-02-20 14:37   ` [PATCH v3 1/5] net/mlx5/hws: support NAT64 action Bing Zhao
2024-02-20 14:37   ` [PATCH v3 2/5] net/mlx5: fetch the available registers for NAT64 Bing Zhao
2024-02-20 14:37   ` [PATCH v3 3/5] net/mlx5: create NAT64 actions during configuration Bing Zhao
2024-02-20 14:37   ` [PATCH v3 4/5] net/mlx5: add NAT64 action support in rule creation Bing Zhao
2024-02-20 14:37   ` [PATCH v3 5/5] net/mlx5: validate the actions combination with NAT64 Bing Zhao
2024-02-21 13:14   ` [PATCH v3 0/5] NAT64 support in mlx5 PMD Ori Kam
2024-02-28 15:09 ` [PATCH v4 " Bing Zhao
2024-02-28 15:09   ` [PATCH v4 1/5] net/mlx5/hws: support NAT64 action Bing Zhao
2024-02-28 15:09   ` [PATCH v4 2/5] net/mlx5: fetch the available registers for NAT64 Bing Zhao
2024-02-28 15:09   ` [PATCH v4 3/5] net/mlx5: create NAT64 actions during configuration Bing Zhao
2024-02-28 15:09   ` [PATCH v4 4/5] net/mlx5: add NAT64 action support in rule creation Bing Zhao
2024-02-28 15:09   ` Bing Zhao [this message]
2024-02-29 10:39   ` [PATCH v4 0/5] NAT64 support in mlx5 PMD Raslan Darawsheh

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