From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 05D5D43C5B; Wed, 6 Mar 2024 13:27:44 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1A5B042E95; Wed, 6 Mar 2024 13:25:40 +0100 (CET) Received: from smtp-fw-6002.amazon.com (smtp-fw-6002.amazon.com [52.95.49.90]) by mails.dpdk.org (Postfix) with ESMTP id 1C2CF42DD7 for ; Wed, 6 Mar 2024 13:25:38 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727938; x=1741263938; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=NWkeGrTJ2WQWasfUcGcM1ZXkgf/MY7eFj0fBtuxbwbk=; b=jClAN+zLQ8P7AOd86mHgft5qwHT8VAyP60kMxc1Ncv1SeOZD+dUubmlZ CbIggrSMCbAs1iqpBNFCEMWwI8Je8ijl1nZBOSNA6rCFDXUKD8WbnsQHv oqJkIsLAtLKkoGO7ivy1pHcbNN10JulLSEtcJfAEZm3RZr+XHh6nUUD8T M=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="391346676" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-6002.iad6.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:37 +0000 Received: from EX19MTAEUA001.ant.amazon.com [10.0.43.254:52402] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.0.36:2525] with esmtp (Farcaster) id 9ed2b5fa-a962-466a-991b-8aacd6fe4687; Wed, 6 Mar 2024 12:25:36 +0000 (UTC) X-Farcaster-Flow-ID: 9ed2b5fa-a962-466a-991b-8aacd6fe4687 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUA001.ant.amazon.com (10.252.50.192) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:33 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:33 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:32 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 21/33] net/ena/hal: modify memory barrier comment Date: Wed, 6 Mar 2024 14:24:33 +0200 Message-ID: <20240306122445.4350-22-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes The dma_rmb() memory barrier guarantees that the device set the phase bit before continuing to read the rest of the descriptor. Because the phase bit and the rest of the descriptor are in the same cache line this ensures coherency of the data from the descriptor. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index f9613f7807..053e095585 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -2412,8 +2412,8 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data) /* Go over all the events */ while ((READ_ONCE8(aenq_common->flags) & ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) == phase) { - /* Make sure the phase bit (ownership) is as expected before - * reading the rest of the descriptor. + /* Make sure the device finished writing the rest of the descriptor + * before reading it. */ dma_rmb(); -- 2.17.1