From mboxrd@z Thu Jan 1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124])
by inbox.dpdk.org (Postfix) with ESMTP id 4776F43DEE;
Wed, 3 Apr 2024 18:09:44 +0200 (CEST)
Received: from mails.dpdk.org (localhost [127.0.0.1])
by mails.dpdk.org (Postfix) with ESMTP id 26320402E8;
Wed, 3 Apr 2024 18:09:39 +0200 (CEST)
Received: from mail-oo1-f97.google.com (mail-oo1-f97.google.com
[209.85.161.97]) by mails.dpdk.org (Postfix) with ESMTP id 8A28E4025C
for <dev@dpdk.org>; Wed, 3 Apr 2024 15:59:55 +0200 (CEST)
Received: by mail-oo1-f97.google.com with SMTP id
006d021491bc7-5a4f7a648dbso4003494eaf.3
for <dev@dpdk.org>; Wed, 03 Apr 2024 06:59:55 -0700 (PDT)
X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=1e100.net; s=20230601; t=1712152795; x=1712757595;
h=content-transfer-encoding:references:in-reply-to:message-id:date
:subject:cc:to:from:dkim-signature:x-gm-message-state:from:to:cc
:subject:date:message-id:reply-to;
bh=7ZBh5weVpChsH75Wef9UINqrt1A9b85T/5MeNtS11UA=;
b=WnsN0CkwAN308FMmIrJX9albay/IbWMwJxxOVDgxX6iHLEn0inNezzaD5J/cL81+Pi
id23YPc/D4tzsy0AQdAkHpa1/KfHR5/HyhtCJZG/Uvg03a8DGowXKNN97cTgn8Im+9JC
4STPy+BQ7ZHpDo1ON+BH4eDoE7Go4P3YcOT0W7ILO1yjKevzK5jwDrB04gjgAxv+6spM
KiwL4vT+Yxoq8XewMotf+c1QIbQ254VPHb07l1f74Yvikfe6Evq4lUVbKisY+1MzACR+
TBhywF0+xeRaAI/mVDP8zwwbvak6u6fkvc82e1v//8UalqP8IUwCWIqxlNLxBbTBU1jK
/AMw==
X-Gm-Message-State: AOJu0YxdpUIvbSC7huDefx0Dnarz2WVHOhkz+pbjtQIShWoQGJwpPIoi
2zy3R/kpTOL9gWGdKJ22V4GC7KFW6sobp9rTT4n/5CaPg1+l2kOPZiS7MBYqhLg3LqFo7eUVLIR
3uMguzwyGx6n24fmOdPcanIGzjSBXmg==
X-Google-Smtp-Source: AGHT+IEEsdfZmlNjarIYopxwGTp9QfrP9etrzY8hjjVNFxRgCRAwMnuXMCcWZVvO+PAUSs7R16uGYVAEHrN1
X-Received: by 2002:a05:6820:2715:b0:5a5:21df:7eef with SMTP id
db21-20020a056820271500b005a521df7eefmr14968141oob.2.1712152794816;
Wed, 03 Apr 2024 06:59:54 -0700 (PDT)
Received: from smtp.aristanetworks.com ([74.123.28.25])
by smtp-relay.gmail.com with ESMTPS id
er10-20020a05622a5e8a00b004311ec03154sm1334233qtb.9.2024.04.03.06.59.54
(version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128);
Wed, 03 Apr 2024 06:59:54 -0700 (PDT)
X-Relaying-Domain: arista.com
Received: from mpazdan-autoneg-dpdk-0.sjc.aristanetworks.com
(mpazdan-autoneg-dpdk-0-us184.sjc.aristanetworks.com [10.243.132.215])
by smtp.aristanetworks.com (Postfix) with ESMTP id 9CDC1402054;
Wed, 3 Apr 2024 06:59:53 -0700 (PDT)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arista.com;
s=Arista-A; t=1712152793;
bh=7ZBh5weVpChsH75Wef9UINqrt1A9b85T/5MeNtS11UA=;
h=From:To:Cc:Subject:Date:In-Reply-To:References:From;
b=Fj7t0B1M73uAj43FioVzhQINLcmK8gWkRqCBZAjRSB1IRsatpsKeM4Df5iVxZT1WP
o3Doz91KGci04+2UqyYy8okwoa31Q4RXp6tbPB0hj25tm5fXFB2L+i4i244ZPAa8ZR
39mOIgMyxCEfNVMLgnqW0X5GvvdTYo6ksYpfCEm7x5g9rj9UMG+9aVfs57Ju+kqxdY
Xf83wHqhdJp4NUG6c2fYgpgoPd5SDq4Z7q7FMnSGYY461QhafHLtkWoM8KoepEVZds
z/+a183DeX0/Pn3kdZ488OqSgmcC4VoKCM7ZiTXQVV+CjuVxiqZq/3mmgZKgqmHUi/
1hC/SN0qY2BwA==
X-SMTP-Authentication: Allow-List-permitted
X-SMTP-Authentication: Allow-List-permitted
From: Marek Pazdan <mpazdan@arista.com>
To: Thomas Monjalon <thomas@monjalon.net>, Ferruh Yigit <ferruh.yigit@amd.com>,
Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Cc: dev@dpdk.org,
Marek Pazdan <mpazdan@arista.com>
Subject: [PATCH] lib: add get/set link settings interface
Date: Wed, 3 Apr 2024 06:59:53 -0700
Message-ID: <20240403135953.7209-1-mpazdan@arista.com>
In-Reply-To: <20240326235909.25276-1-mpazdan@arista.com>
References: <20240326235909.25276-1-mpazdan@arista.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
X-Mailman-Approved-At: Wed, 03 Apr 2024 18:09:36 +0200
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
<mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
<mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
There are link settings parameters available from PMD drivers level
which are currently not exposed to the user via consistent interface.
When interface is available for system level those information can
be acquired with 'ethtool DEVNAME' (ioctl: ETHTOOL_SLINKSETTINGS/
ETHTOOL_GLINKSETTINGS). There are use cases where
physical interface is passthrough to dpdk driver and is not available
from system level. Information provided by ioctl carries information
useful for link auto negotiation settings among others.
Signed-off-by: Marek Pazdan <mpazdan@arista.com>
---
.mailmap | 1 +
lib/ethdev/ethdev_driver.h | 33 ++++++
lib/ethdev/rte_ethdev.c | 26 +++++
lib/ethdev/rte_ethdev.h | 215 +++++++++++++++++++++++++++++++++++--
lib/ethdev/version.map | 3 +
5 files changed, 270 insertions(+), 8 deletions(-)
diff --git a/.mailmap b/.mailmap
index 3843868716..145ce726ba 100644
--- a/.mailmap
+++ b/.mailmap
@@ -885,6 +885,7 @@ Marcin Wojtas <mw@semihalf.com>
Marcin Zapolski <marcinx.a.zapolski@intel.com>
Marco Varlese <mvarlese@suse.de>
Marc Sune <marcdevel@gmail.com> <marc.sune@bisdn.de>
+Marek Pazdan <mpazdan@arista.com>
Maria Lingemark <maria.lingemark@ericsson.com>
Mario Carrillo <mario.alfredo.c.arevalo@intel.com>
Mário Kuka <kuka@cesnet.cz>
diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
index 0dbf2dd6a2..ee8f786b99 100644
--- a/lib/ethdev/ethdev_driver.h
+++ b/lib/ethdev/ethdev_driver.h
@@ -1119,6 +1119,34 @@ typedef const uint32_t *(*eth_buffer_split_supported_hdr_ptypes_get_t)(struct rt
*/
typedef int (*eth_dev_priv_dump_t)(struct rte_eth_dev *dev, FILE *file);
+/** @internal Retrieve physical link settings of a port.
+ *
+ * @param dev
+ * Port (ethdev) handle
+ *
+ * @param[out] settings
+ * Physical port link settings.
+ *
+ * @return
+ * Negative errno value on error, zero otherwise
+ */
+typedef int (*eth_get_link_settings_t)(struct rte_eth_dev *dev,
+ struct rte_link_settings *settings);
+
+/** @internal Configure physical link settings of a port.
+ *
+ * @param dev
+ * Port (ethdev) handle
+ *
+ * @param settings
+ * Physical port link settings.
+ *
+ * @return
+ * Negative errno value on error, zero otherwise
+ */
+typedef int (*eth_set_link_settings_t)(struct rte_eth_dev *dev,
+ const struct rte_link_settings *settings);
+
/**
* @internal Set Rx queue available descriptors threshold.
* @see rte_eth_rx_avail_thresh_set()
@@ -1474,6 +1502,11 @@ struct eth_dev_ops {
eth_count_aggr_ports_t count_aggr_ports;
/** Map a Tx queue with an aggregated port of the DPDK port */
eth_map_aggr_tx_affinity_t map_aggr_tx_affinity;
+
+ /** Retrieve physical link settings */
+ eth_get_link_settings_t get_link_settings;
+ /** Configure physical link settings */
+ eth_set_link_settings_t set_link_settings;
};
/**
diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
index f1c658f49e..d2c52921ef 100644
--- a/lib/ethdev/rte_ethdev.c
+++ b/lib/ethdev/rte_ethdev.c
@@ -6844,6 +6844,32 @@ rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)
return eth_err(port_id, (*dev->dev_ops->eth_dev_priv_dump)(dev, file));
}
+int rte_eth_dev_get_link_settings(uint16_t port_id,
+ struct rte_link_settings *settings)
+{
+ struct rte_eth_dev *dev;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+ dev = &rte_eth_devices[port_id];
+
+ if (*dev->dev_ops->get_link_settings == NULL)
+ return -ENOTSUP;
+ return eth_err(port_id, (*dev->dev_ops->get_link_settings)(dev, settings));
+}
+
+int rte_eth_dev_set_link_settings(uint16_t port_id,
+ const struct rte_link_settings *settings)
+{
+ struct rte_eth_dev *dev;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+ dev = &rte_eth_devices[port_id];
+
+ if (*dev->dev_ops->set_link_settings == NULL)
+ return -ENOTSUP;
+ return eth_err(port_id, (*dev->dev_ops->set_link_settings)(dev, settings));
+}
+
int
rte_eth_rx_descriptor_dump(uint16_t port_id, uint16_t queue_id,
uint16_t offset, uint16_t num, FILE *file)
diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
index 147257d6a2..66aad925d0 100644
--- a/lib/ethdev/rte_ethdev.h
+++ b/lib/ethdev/rte_ethdev.h
@@ -335,7 +335,7 @@ struct rte_eth_stats {
__extension__
struct __rte_aligned(8) rte_eth_link { /**< aligned for atomic64 read/write */
uint32_t link_speed; /**< RTE_ETH_SPEED_NUM_ */
- uint16_t link_duplex : 1; /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
+ uint16_t link_duplex : 2; /**< RTE_ETH_LINK_[HALF/FULL/UNKNOWN]_DUPLEX */
uint16_t link_autoneg : 1; /**< RTE_ETH_LINK_[AUTONEG/FIXED] */
uint16_t link_status : 1; /**< RTE_ETH_LINK_[DOWN/UP] */
};
@@ -343,13 +343,27 @@ struct __rte_aligned(8) rte_eth_link { /**< aligned for atomic64 read/write */
/**@{@name Link negotiation
* Constants used in link management.
*/
-#define RTE_ETH_LINK_HALF_DUPLEX 0 /**< Half-duplex connection (see link_duplex). */
-#define RTE_ETH_LINK_FULL_DUPLEX 1 /**< Full-duplex connection (see link_duplex). */
-#define RTE_ETH_LINK_DOWN 0 /**< Link is down (see link_status). */
-#define RTE_ETH_LINK_UP 1 /**< Link is up (see link_status). */
-#define RTE_ETH_LINK_FIXED 0 /**< No autonegotiation (see link_autoneg). */
-#define RTE_ETH_LINK_AUTONEG 1 /**< Autonegotiated (see link_autoneg). */
-#define RTE_ETH_LINK_MAX_STR_LEN 40 /**< Max length of default link string. */
+#define RTE_ETH_LINK_HALF_DUPLEX 0 /**< Half-duplex connection (see link_duplex). */
+#define RTE_ETH_LINK_FULL_DUPLEX 1 /**< Full-duplex connection (see link_duplex). */
+#define RTE_ETH_LINK_UNKNOWN_DUPLEX 2 /**</ Unknown-duplex (see link_duplex). */
+#define RTE_ETH_LINK_DOWN 0 /**< Link is down (see link_status). */
+#define RTE_ETH_LINK_UP 1 /**< Link is up (see link_status). */
+#define RTE_ETH_LINK_FIXED 0 /**< No autonegotiation (see link_autoneg). */
+#define RTE_ETH_LINK_AUTONEG 1 /**< Autonegotiated (see link_autoneg). */
+#define RTE_ETH_LINK_MAX_STR_LEN 40 /**< Max length of default link string. */
+/**@}*/
+
+/**@{@name Link negotiation
+ * Constants used in link management to specify connector port.
+ */
+#define RTE_PORT_TP 0x00
+#define RTE_PORT_AUI 0x01
+#define RTE_PORT_MII 0x02
+#define RTE_PORT_FIBRE 0x03
+#define RTE_PORT_BNC 0x04
+#define RTE_PORT_DA 0x05
+#define RTE_PORT_NONE 0xef
+#define RTE_PORT_OTHER 0xff
/**@}*/
/**
@@ -1433,6 +1447,147 @@ struct rte_eth_pfc_queue_conf {
} tx_pause; /* Valid when (mode == FC_TX_PAUSE || mode == FC_FULL) */
};
+/* Enable or disable autonegotiation. */
+#define RTE_AUTONEG_DISABLE 0x00
+#define RTE_AUTONEG_ENABLE 0x01
+
+/* MDI or MDI-X status/control - if MDI/MDI_X/AUTO is set then
+ * the driver is required to renegotiate link
+ */
+#define RTE_TP_MDI_INVALID 0x00 /* status: unknown; control: unsupported */
+#define RTE_TP_MDI 0x01 /* status: MDI; control: force MDI */
+#define RTE_TP_MDI_X 0x02 /* status: MDI-X; control: force MDI-X */
+#define RTE_TP_MDI_AUTO 0x03 /* control: auto-select */
+
+/* Link mode bit indices */
+enum rte_link_mode_bit_indices {
+ RTE_LINK_MODE_10baseT_Half_BIT = 0,
+ RTE_LINK_MODE_10baseT_Full_BIT = 1,
+ RTE_LINK_MODE_100baseT_Half_BIT = 2,
+ RTE_LINK_MODE_100baseT_Full_BIT = 3,
+ RTE_LINK_MODE_1000baseT_Half_BIT = 4,
+ RTE_LINK_MODE_1000baseT_Full_BIT = 5,
+ RTE_LINK_MODE_Autoneg_BIT = 6,
+ RTE_LINK_MODE_TP_BIT = 7,
+ RTE_LINK_MODE_AUI_BIT = 8,
+ RTE_LINK_MODE_MII_BIT = 9,
+ RTE_LINK_MODE_FIBRE_BIT = 10,
+ RTE_LINK_MODE_BNC_BIT = 11,
+ RTE_LINK_MODE_10000baseT_Full_BIT = 12,
+ RTE_LINK_MODE_Pause_BIT = 13,
+ RTE_LINK_MODE_Asym_Pause_BIT = 14,
+ RTE_LINK_MODE_2500baseX_Full_BIT = 15,
+ RTE_LINK_MODE_Backplane_BIT = 16,
+ RTE_LINK_MODE_1000baseKX_Full_BIT = 17,
+ RTE_LINK_MODE_10000baseKX4_Full_BIT = 18,
+ RTE_LINK_MODE_10000baseKR_Full_BIT = 19,
+ RTE_LINK_MODE_10000baseR_FEC_BIT = 20,
+ RTE_LINK_MODE_20000baseMLD2_Full_BIT = 21,
+ RTE_LINK_MODE_20000baseKR2_Full_BIT = 22,
+ RTE_LINK_MODE_40000baseKR4_Full_BIT = 23,
+ RTE_LINK_MODE_40000baseCR4_Full_BIT = 24,
+ RTE_LINK_MODE_40000baseSR4_Full_BIT = 25,
+ RTE_LINK_MODE_40000baseLR4_Full_BIT = 26,
+ RTE_LINK_MODE_56000baseKR4_Full_BIT = 27,
+ RTE_LINK_MODE_56000baseCR4_Full_BIT = 28,
+ RTE_LINK_MODE_56000baseSR4_Full_BIT = 29,
+ RTE_LINK_MODE_56000baseLR4_Full_BIT = 30,
+ RTE_LINK_MODE_25000baseCR_Full_BIT = 31,
+ RTE_LINK_MODE_25000baseKR_Full_BIT = 32,
+ RTE_LINK_MODE_25000baseSR_Full_BIT = 33,
+ RTE_LINK_MODE_50000baseCR2_Full_BIT = 34,
+ RTE_LINK_MODE_50000baseKR2_Full_BIT = 35,
+ RTE_LINK_MODE_100000baseKR4_Full_BIT = 36,
+ RTE_LINK_MODE_100000baseSR4_Full_BIT = 37,
+ RTE_LINK_MODE_100000baseCR4_Full_BIT = 38,
+ RTE_LINK_MODE_100000baseLR4_ER4_Full_BIT = 39,
+ RTE_LINK_MODE_50000baseSR2_Full_BIT = 40,
+ RTE_LINK_MODE_1000baseX_Full_BIT = 41,
+ RTE_LINK_MODE_10000baseCR_Full_BIT = 42,
+ RTE_LINK_MODE_10000baseSR_Full_BIT = 43,
+ RTE_LINK_MODE_10000baseLR_Full_BIT = 44,
+ RTE_LINK_MODE_10000baseLRM_Full_BIT = 45,
+ RTE_LINK_MODE_10000baseER_Full_BIT = 46,
+ RTE_LINK_MODE_2500baseT_Full_BIT = 47,
+ RTE_LINK_MODE_5000baseT_Full_BIT = 48,
+
+ RTE_LINK_MODE_FEC_NONE_BIT = 49,
+ RTE_LINK_MODE_FEC_RS_BIT = 50,
+ RTE_LINK_MODE_FEC_BASER_BIT = 51,
+ RTE_LINK_MODE_50000baseKR_Full_BIT = 52,
+ RTE_LINK_MODE_50000baseSR_Full_BIT = 53,
+ RTE_LINK_MODE_50000baseCR_Full_BIT = 54,
+ RTE_LINK_MODE_50000baseLR_ER_FR_Full_BIT = 55,
+ RTE_LINK_MODE_50000baseDR_Full_BIT = 56,
+ RTE_LINK_MODE_100000baseKR2_Full_BIT = 57,
+ RTE_LINK_MODE_100000baseSR2_Full_BIT = 58,
+ RTE_LINK_MODE_100000baseCR2_Full_BIT = 59,
+ RTE_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT = 60,
+ RTE_LINK_MODE_100000baseDR2_Full_BIT = 61,
+ RTE_LINK_MODE_200000baseKR4_Full_BIT = 62,
+ RTE_LINK_MODE_200000baseSR4_Full_BIT = 63,
+ RTE_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64,
+ RTE_LINK_MODE_200000baseDR4_Full_BIT = 65,
+ RTE_LINK_MODE_200000baseCR4_Full_BIT = 66,
+ RTE_LINK_MODE_100baseT1_Full_BIT = 67,
+ RTE_LINK_MODE_1000baseT1_Full_BIT = 68,
+ RTE_LINK_MODE_400000baseKR8_Full_BIT = 69,
+ RTE_LINK_MODE_400000baseSR8_Full_BIT = 70,
+ RTE_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71,
+ RTE_LINK_MODE_400000baseDR8_Full_BIT = 72,
+ RTE_LINK_MODE_400000baseCR8_Full_BIT = 73,
+ RTE_LINK_MODE_FEC_LLRS_BIT = 74,
+ RTE_LINK_MODE_100000baseKR_Full_BIT = 75,
+ RTE_LINK_MODE_100000baseSR_Full_BIT = 76,
+ RTE_LINK_MODE_100000baseLR_ER_FR_Full_BIT = 77,
+ RTE_LINK_MODE_100000baseCR_Full_BIT = 78,
+ RTE_LINK_MODE_100000baseDR_Full_BIT = 79,
+ RTE_LINK_MODE_200000baseKR2_Full_BIT = 80,
+ RTE_LINK_MODE_200000baseSR2_Full_BIT = 81,
+ RTE_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT = 82,
+ RTE_LINK_MODE_200000baseDR2_Full_BIT = 83,
+ RTE_LINK_MODE_200000baseCR2_Full_BIT = 84,
+ RTE_LINK_MODE_400000baseKR4_Full_BIT = 85,
+ RTE_LINK_MODE_400000baseSR4_Full_BIT = 86,
+ RTE_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT = 87,
+ RTE_LINK_MODE_400000baseDR4_Full_BIT = 88,
+ RTE_LINK_MODE_400000baseCR4_Full_BIT = 89,
+ RTE_LINK_MODE_100baseFX_Half_BIT = 90,
+ RTE_LINK_MODE_100baseFX_Full_BIT = 91,
+ /* must be last entry */
+ __RTE_LINK_MODE_MASK_NBITS
+};
+
+/* number of 32-bit words to store the user's link mode bitmaps */
+#define RTE_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
+#define __RTE_LINK_MODE_MASK_NU32 \
+ RTE_DIV_ROUND_UP(__RTE_LINK_MODE_MASK_NBITS, 32)
+
+/**
+ * Link control and status
+ * @speed: Link speed (Mbps)
+ * @duplex: Duplex mode; one of %DUPLEX_*
+ * @port: Physical connector type; one of %PORT_*
+ * @autoneg: Enable/disable autonegotiation and auto-detection;
+ * either %AUTONEG_DISABLE or %AUTONEG_ENABLE
+ */
+struct rte_link_base_settings {
+ struct rte_eth_link link;
+ uint8_t port;
+ uint8_t phy_address;
+ uint8_t eth_tp_mdix;
+ uint8_t eth_tp_mdix_ctrl;
+};
+
+struct rte_link_settings {
+ struct rte_link_base_settings base;
+ struct {
+ uint32_t supported[__RTE_LINK_MODE_MASK_NU32];
+ uint32_t advertising[__RTE_LINK_MODE_MASK_NU32];
+ uint32_t lp_advertising[__RTE_LINK_MODE_MASK_NU32];
+ } link_modes;
+};
+
/**
* Tunnel type for device-specific classifier configuration.
* @see rte_eth_udp_tunnel
@@ -5936,6 +6091,50 @@ int rte_eth_cman_config_init(uint16_t port_id, struct rte_eth_cman_config *confi
__rte_experimental
int rte_eth_cman_config_set(uint16_t port_id, const struct rte_eth_cman_config *config);
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice
+ *
+ * Retrieve link settings
+ *
+ * @param port_id
+ * The port identifier of the Ethernet device.
+ * @param settings
+ * A pointer to a structure of type *rte_link_settings* to retrieve
+ * link settings parameters for the given port.
+ *
+ * @return
+ * - (0) if successful.
+ * - (-ENOTSUP) if support for cman_config_get does not exist.
+ * - (-ENODEV) if *port_id* invalid.
+ * - (-EINVAL) if bad parameter.
+ */
+__rte_experimental
+int rte_eth_dev_get_link_settings(uint16_t port_id,
+ struct rte_link_settings *settings);
+
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice
+ *
+ * Configure link settings
+ *
+ * @param port_id
+ * The port identifier of the Ethernet device.
+ * @param settings
+ * A pointer to a structure of type *rte_link_settings* to configure
+ * link settings parameters for the given port.
+ *
+ * @return
+ * - (0) if successful.
+ * - (-ENOTSUP) if support for cman_config_get does not exist.
+ * - (-ENODEV) if *port_id* invalid.
+ * - (-EINVAL) if bad parameter.
+ */
+__rte_experimental
+int rte_eth_dev_set_link_settings(uint16_t port_id,
+ const struct rte_link_settings *settings);
+
/**
* @warning
* @b EXPERIMENTAL: this API may change, or be removed, without prior notice
diff --git a/lib/ethdev/version.map b/lib/ethdev/version.map
index 79f6f5293b..5e138a3d10 100644
--- a/lib/ethdev/version.map
+++ b/lib/ethdev/version.map
@@ -325,6 +325,9 @@ EXPERIMENTAL {
rte_flow_template_table_resizable;
rte_flow_template_table_resize;
rte_flow_template_table_resize_complete;
+ rte_eth_dev_get_link_settings;
+ rte_eth_dev_set_link_settings;
+
};
INTERNAL {
--
2.41.0