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Wed, 17 Apr 2024 00:23:11 -0700 From: Michael Baum To: CC: Dariusz Sosnowski , Thomas Monjalon , Ferruh Yigit , Ori Kam , Subject: [RFC 1/2] ethdev: fix GENEVE option item conversion Date: Wed, 17 Apr 2024 10:23:03 +0300 Message-ID: <20240417072304.3260172-2-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240417072304.3260172-1-michaelba@nvidia.com> References: <20240417072304.3260172-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099E0:EE_|DM6PR12MB4252:EE_ X-MS-Office365-Filtering-Correlation-Id: 72ad6fa4-8ac9-4600-4f89-08dc5eaf46dd X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Vp/amxAJQDEBFdvCsykgdZWHxcWd4JuM53j3fGYQMxp/T/7h2lmZa1njf5uq5Ky8J4w4AGjEkLD/+LTM3/5LL+xY6iQKAfibSZpmHON6mav3t67Ddi35LwlviOx5sjd8zf3S5OamSGhuoEPjhNKylwo/i7FPzTNZYqWqaTvMn4ikN/tUYBr8ln3sqfqFBdVHFiWkFlePtXf/RPnKP1DYF5N0WWflwrCFWdqdZOxp0jMeWVcUtBWSVpI7/8jSBwdiySdMbkPJkfkZV/P44LNqz8jbUiTpeQG8Nj8HUu+kO0iuzdD2coBohocApD97cpYR5kqEu5zzIeKzbqjDOniZk03p29PjiwEP3kZkIZQJAlfrk2T/k30OlMMvYbMORpOeBwk54ttd7xn1qNsTxOQ/f2fnE6UBN6NBdgSo5J1YddB6M1EAGbarChHTO053LNVv9lH68hbEx81u7Jt9NTNUSsIItGylIgsUI7/bPYy/6rjca7HSZrcJx8EMkO/kLk0mnmV6zWa8nt4556xC2BrhYs90cOamKragV0qwPCQPS3BsF9U/iQTetBxEUYVPYVlFyoCTtAAYp4Wv4pqWOIgoJ4xPX1F64xdZm1qxm+ID+CRc2CiyL1WCf6taotRGd5MY4GSekDHp0l0Hk2COLMyfjDnNd8aUSAn+Ugvw7vVKELJg9us9tjpq8yDgfnNHVOccPbcAuD1tHDKoahyPqiN/Y6iKr39J4g3B1hQnfiwTjh3ReeJSJUzUn7khIehIRZxg X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(36860700004)(82310400014)(376005)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Apr 2024 07:23:27.9558 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 72ad6fa4-8ac9-4600-4f89-08dc5eaf46dd X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099E0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4252 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The "rte_flow_conv()" function, enables, among other things, to copy item list. For GENEVE option item, the function copies it without considering deep copy. It copies the "data" pointer without copying the pointed values. This patch adds deep copy for after regular copy. Fixes: 2b4c72b4d10d ("ethdev: introduce GENEVE header TLV option item") Cc: shirik@nvidia.com Signed-off-by: Michael Baum --- lib/ethdev/rte_flow.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/lib/ethdev/rte_flow.c b/lib/ethdev/rte_flow.c index 7ab1100ea0..2803507462 100644 --- a/lib/ethdev/rte_flow.c +++ b/lib/ethdev/rte_flow.c @@ -622,6 +622,7 @@ rte_flow_conv_item_spec(void *buf, const size_t size, switch (item->type) { union { const struct rte_flow_item_raw *raw; + const struct rte_flow_item_geneve_opt *geneve_opt; } spec; union { const struct rte_flow_item_raw *raw; @@ -631,10 +632,13 @@ rte_flow_conv_item_spec(void *buf, const size_t size, } mask; union { const struct rte_flow_item_raw *raw; + const struct rte_flow_item_geneve_opt *geneve_opt; } src; union { struct rte_flow_item_raw *raw; + struct rte_flow_item_geneve_opt *geneve_opt; } dst; + void *deep_src; size_t tmp; case RTE_FLOW_ITEM_TYPE_RAW: @@ -663,13 +667,30 @@ rte_flow_conv_item_spec(void *buf, const size_t size, tmp = last.raw->length & mask.raw->length; if (tmp) { off = RTE_ALIGN_CEIL(off, sizeof(*dst.raw->pattern)); - if (size >= off + tmp) - dst.raw->pattern = rte_memcpy - ((void *)((uintptr_t)dst.raw + off), - src.raw->pattern, tmp); + if (size >= off + tmp) { + deep_src = (void *)((uintptr_t)dst.raw + off); + dst.raw->pattern = rte_memcpy(deep_src, + src.raw->pattern, + tmp); + } off += tmp; } break; + case RTE_FLOW_ITEM_TYPE_GENEVE_OPT: + off = rte_flow_conv_copy(buf, data, size, + rte_flow_desc_item, item->type); + spec.geneve_opt = item->spec; + src.geneve_opt = data; + dst.geneve_opt = buf; + tmp = spec.geneve_opt->option_len << 2; + if (size > 0 && src.geneve_opt->data) { + deep_src = (void *)((uintptr_t)(dst.geneve_opt + 1)); + dst.geneve_opt->data = rte_memcpy(deep_src, + src.geneve_opt->data, + tmp); + } + off += tmp; + break; default: off = rte_flow_conv_copy(buf, data, size, rte_flow_desc_item, item->type); -- 2.25.1