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Date: Wed, 22 May 2024 08:37:41 -0700
From: Stephen Hemminger <stephen@networkplumber.org>
To: Morten =?UTF-8?B?QnLDuHJ1cA==?= <mb@smartsharesystems.com>
Cc: <dev@dpdk.org>, "Tyler Retzlaff" <roretzla@linux.microsoft.com>
Subject: Re: [PATCH v9 1/8] eal: generic 64 bit counter
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In-Reply-To: <98CBD80474FA8B44BF855DF32C47DC35E9F488@smartserver.smartshare.dk>
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On Wed, 22 May 2024 10:31:39 +0200
Morten Br=C3=B8rup <mb@smartsharesystems.com> wrote:
> > +/* On 32 bit platform, need to use atomic to avoid load/store tearing =
*/
> > +typedef RTE_ATOMIC(uint64_t) rte_counter64_t; =20
>=20
> As shown by Godbolt experiments discussed in a previous thread [2], non-t=
earing 64 bit counters can be implemented without using atomic instructions=
on all 32 bit architectures supported by DPDK. So we should use the counte=
r/offset design pattern for RTE_ARCH_32 too.
>=20
> [2]: https://inbox.dpdk.org/dev/98CBD80474FA8B44BF855DF32C47DC35E9F433@sm=
artserver.smartshare.dk/
This code built with -O3 and -m32 on godbolt shows split problem.
#include <stdint.h>
typedef uint64_t rte_counter64_t;
void
rte_counter64_add(rte_counter64_t *counter, uint32_t val)
{
*counter +=3D val;
}
=E2=80=A6 *counter =3D val;
}
rte_counter64_add:
push ebx
mov eax, DWORD PTR [esp+8]
xor ebx, ebx
mov ecx, DWORD PTR [esp+12]
add DWORD PTR [eax], ecx
adc DWORD PTR [eax+4], ebx
pop ebx
ret
rte_counter64_read:
mov eax, DWORD PTR [esp+4]
mov edx, DWORD PTR [eax+4]
mov eax, DWORD PTR [eax]
ret
rte_counter64_set:
movq xmm0, QWORD PTR [esp+8]
mov eax, DWORD PTR [esp+4]
movq QWORD PTR [eax], xmm0
ret