From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 051B0440F2; Tue, 28 May 2024 10:10:27 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DE70B40685; Tue, 28 May 2024 10:10:26 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by mails.dpdk.org (Postfix) with ESMTP id 2CDD840685 for ; Tue, 28 May 2024 10:10:25 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716883825; x=1748419825; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gXD/nRFsOFv7gOHEXv2PZWECFp/uYPv2q2Ib2duB/dI=; b=ePGVbZa418lMujpOh+YjA820rxhrfAWFf9L+nECSEZ2roAWGrcyZO/8o xTbemWzUoKVhPMOyxnYkSVZijGDgjt0w/MyWt1qr3w+hJCZVJccABQQlB Z6OmujY4enM1ij1AA8p79eUnyxAuIdgBd4B4Q+YL5T24XzIZwXPnwzvRb 570mQRtkIYomsQc04UTXV16GZ9fPQ5JxxrBJ+tioxizIfsD7NGrjyn9hi jr+CwV5RzmZHSZ2X5Im8hoE3c0mfZsMKW417gCKVOR0rLRa4yCe5ASdnP tdC4O8LGudXh2MegTJoAItHk8JR58yIUZh0otIVloMwx3vYPfvB5nrwYg A==; X-CSE-ConnectionGUID: BIwW1VirSSGXhrzGyDwXLA== X-CSE-MsgGUID: ieKQtUe1TPa/+5hEvJMmCw== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="16161909" X-IronPort-AV: E=Sophos;i="6.08,194,1712646000"; d="scan'208";a="16161909" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 01:10:24 -0700 X-CSE-ConnectionGUID: 0y0ryBFJQ2qESh87j8RnyA== X-CSE-MsgGUID: SPbX0Y7fROaxuYpF8o4WJw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,194,1712646000"; d="scan'208";a="66197647" Received: from unknown (HELO npf-hyd-clx-03..) ([10.145.170.182]) by fmviesa001.fm.intel.com with ESMTP; 28 May 2024 01:10:23 -0700 From: Soumyadeep Hore To: yuying.zhang@intel.com, jingjing.wu@intel.com Cc: dev@dpdk.org Subject: [PATCH 01/25] common/idpf: added NVME CPF specific code with defines Date: Tue, 28 May 2024 07:28:31 +0000 Message-ID: <20240528072839.867100-2-soumyadeep.hore@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240528072839.867100-1-soumyadeep.hore@intel.com> References: <20240528072839.867100-1-soumyadeep.hore@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The aim of the changes is to remove NVME dependency on memory allocations, and to use a prepared buffer instead. The changes do not affect other components. Signed-off-by: Soumyadeep Hore --- drivers/common/idpf/base/idpf_controlq.c | 27 +++++++++++++++++--- drivers/common/idpf/base/idpf_controlq_api.h | 9 +++++-- 2 files changed, 31 insertions(+), 5 deletions(-) diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c index a82ca628de..0ba7281a45 100644 --- a/drivers/common/idpf/base/idpf_controlq.c +++ b/drivers/common/idpf/base/idpf_controlq.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2001-2023 Intel Corporation + * Copyright(c) 2001-2024 Intel Corporation */ #include "idpf_controlq.h" @@ -145,8 +145,12 @@ int idpf_ctlq_add(struct idpf_hw *hw, qinfo->buf_size > IDPF_CTLQ_MAX_BUF_LEN) return -EINVAL; +#ifndef NVME_CPF cq = (struct idpf_ctlq_info *) idpf_calloc(hw, 1, sizeof(struct idpf_ctlq_info)); +#else + cq = *cq_out; +#endif if (!cq) return -ENOMEM; @@ -172,10 +176,15 @@ int idpf_ctlq_add(struct idpf_hw *hw, } if (status) +#ifdef NVME_CPF + return status; +#else goto init_free_q; +#endif if (is_rxq) { idpf_ctlq_init_rxq_bufs(cq); +#ifndef NVME_CPF } else { /* Allocate the array of msg pointers for TX queues */ cq->bi.tx_msg = (struct idpf_ctlq_msg **) @@ -185,6 +194,7 @@ int idpf_ctlq_add(struct idpf_hw *hw, status = -ENOMEM; goto init_dealloc_q_mem; } +#endif } idpf_ctlq_setup_regs(cq, qinfo); @@ -195,6 +205,7 @@ int idpf_ctlq_add(struct idpf_hw *hw, LIST_INSERT_HEAD(&hw->cq_list_head, cq, cq_list); +#ifndef NVME_CPF *cq_out = cq; return status; @@ -205,6 +216,7 @@ int idpf_ctlq_add(struct idpf_hw *hw, idpf_free(hw, cq); cq = NULL; +#endif return status; } @@ -232,8 +244,13 @@ void idpf_ctlq_remove(struct idpf_hw *hw, * destroyed. This must be called prior to using the individual add/remove * APIs. */ +#ifdef NVME_CPF +int idpf_ctlq_init(struct idpf_hw *hw, u8 num_q, + struct idpf_ctlq_create_info *q_info, struct idpf_ctlq_info **ctlq) +#else int idpf_ctlq_init(struct idpf_hw *hw, u8 num_q, struct idpf_ctlq_create_info *q_info) +#endif { struct idpf_ctlq_info *cq = NULL, *tmp = NULL; int ret_code = 0; @@ -244,6 +261,10 @@ int idpf_ctlq_init(struct idpf_hw *hw, u8 num_q, for (i = 0; i < num_q; i++) { struct idpf_ctlq_create_info *qinfo = q_info + i; +#ifdef NVME_CPF + cq = *(ctlq + i); + +#endif ret_code = idpf_ctlq_add(hw, qinfo, &cq); if (ret_code) goto init_destroy_qs; @@ -398,7 +419,7 @@ int idpf_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq, * ctlq_msgs and free or reuse the DMA buffers. */ static int __idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count, - struct idpf_ctlq_msg *msg_status[], bool force) + struct idpf_ctlq_msg *msg_status[], bool force) { struct idpf_ctlq_desc *desc; u16 i = 0, num_to_clean; @@ -469,7 +490,7 @@ static int __idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count, * ctlq_msgs and free or reuse the DMA buffers. */ int idpf_ctlq_clean_sq_force(struct idpf_ctlq_info *cq, u16 *clean_count, - struct idpf_ctlq_msg *msg_status[]) + struct idpf_ctlq_msg *msg_status[]) { return __idpf_ctlq_clean_sq(cq, clean_count, msg_status, true); } diff --git a/drivers/common/idpf/base/idpf_controlq_api.h b/drivers/common/idpf/base/idpf_controlq_api.h index 38f5d2df3c..bce5187981 100644 --- a/drivers/common/idpf/base/idpf_controlq_api.h +++ b/drivers/common/idpf/base/idpf_controlq_api.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2001-2023 Intel Corporation + * Copyright(c) 2001-2024 Intel Corporation */ #ifndef _IDPF_CONTROLQ_API_H_ @@ -158,8 +158,13 @@ enum idpf_mbx_opc { /* Will init all required q including default mb. "q_info" is an array of * create_info structs equal to the number of control queues to be created. */ +#ifdef NVME_CPF +int idpf_ctlq_init(struct idpf_hw *hw, u8 num_q, + struct idpf_ctlq_create_info *q_info, struct idpf_ctlq_info **ctlq); +#else int idpf_ctlq_init(struct idpf_hw *hw, u8 num_q, struct idpf_ctlq_create_info *q_info); +#endif /* Allocate and initialize a single control queue, which will be added to the * control queue list; returns a handle to the created control queue @@ -186,7 +191,7 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg, /* Reclaims all descriptors on HW write back */ int idpf_ctlq_clean_sq_force(struct idpf_ctlq_info *cq, u16 *clean_count, - struct idpf_ctlq_msg *msg_status[]); + struct idpf_ctlq_msg *msg_status[]); /* Reclaims send descriptors on HW write back */ int idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count, -- 2.43.0