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From: Serhii Iliushyk <sil-plv@napatech.com>
To: dev@dpdk.org
Cc: mko-plv@napatech.com, ckm@napatech.com,
	andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com
Subject: [PATCH v1 07/17] net/ntnic: add API for PMD driver modules
Date: Thu, 30 May 2024 16:49:04 +0200	[thread overview]
Message-ID: <20240530144929.4127931-7-sil-plv@napatech.com> (raw)
In-Reply-To: <20240530144929.4127931-1-sil-plv@napatech.com>

Add API for ntnic PMD driver modules,
thus allow modules to be enabled/disabled.

Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com>
---
 drivers/net/ntnic/dpdk_mod_reg.c  |  64 ++++
 drivers/net/ntnic/dpdk_mod_reg.h  | 167 ++++++++++
 drivers/net/ntnic/ntnic_mod_reg.c | 382 ++++++++++++++++++++++
 drivers/net/ntnic/ntnic_mod_reg.h | 512 ++++++++++++++++++++++++++++++
 4 files changed, 1125 insertions(+)
 create mode 100644 drivers/net/ntnic/dpdk_mod_reg.c
 create mode 100644 drivers/net/ntnic/dpdk_mod_reg.h
 create mode 100644 drivers/net/ntnic/ntnic_mod_reg.c
 create mode 100644 drivers/net/ntnic/ntnic_mod_reg.h

diff --git a/drivers/net/ntnic/dpdk_mod_reg.c b/drivers/net/ntnic/dpdk_mod_reg.c
new file mode 100644
index 0000000000..dec3e54dc0
--- /dev/null
+++ b/drivers/net/ntnic/dpdk_mod_reg.c
@@ -0,0 +1,64 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <rte_flow_driver.h>
+#include "dpdk_mod_reg.h"
+
+static struct sg_ops_s *sg_ops;
+
+void register_sg_ops(struct sg_ops_s *ops)
+{
+	sg_ops = ops;
+}
+
+const struct sg_ops_s *get_sg_ops(void)
+{
+	return sg_ops;
+}
+
+/*
+ *
+ */
+static struct meter_ops_s *meter_ops;
+
+void register_meter_ops(struct meter_ops_s *ops)
+{
+	meter_ops = ops;
+}
+
+const struct meter_ops_s *get_meter_ops(void)
+{
+	return meter_ops;
+}
+
+/*
+ *
+ */
+static const struct ntnic_filter_ops *ntnic_filter_ops;
+
+void register_ntnic_filter_ops(const struct ntnic_filter_ops *ops)
+{
+	ntnic_filter_ops = ops;
+}
+
+const struct ntnic_filter_ops *get_ntnic_filter_ops(void)
+{
+	return ntnic_filter_ops;
+}
+
+/*
+ *
+ */
+static struct ntnic_xstats_ops *ntnic_xstats_ops;
+
+void register_ntnic_xstats_ops(struct ntnic_xstats_ops *ops)
+{
+	ntnic_xstats_ops = ops;
+}
+
+struct ntnic_xstats_ops *get_ntnic_xstats_ops(void)
+{
+	return ntnic_xstats_ops;
+}
diff --git a/drivers/net/ntnic/dpdk_mod_reg.h b/drivers/net/ntnic/dpdk_mod_reg.h
new file mode 100644
index 0000000000..5cc866f98c
--- /dev/null
+++ b/drivers/net/ntnic/dpdk_mod_reg.h
@@ -0,0 +1,167 @@
+#ifndef __DPDK_MOD_REG_H__
+#define __DPDK_MOD_REG_H__
+
+#include <rte_ethdev.h>
+#include "ntnic_ethdev.h"
+#include "ntoss_virt_queue.h"
+#include "ntnic_stat.h"
+
+/* sg ops section */
+struct sg_ops_s {
+	/* Setup a virtQueue for a VM */
+	struct nthw_virt_queue *(*nthw_setup_rx_virt_queue)(nthw_dbs_t *p_nthw_dbs,
+		uint32_t index,
+		uint16_t start_idx,
+		uint16_t start_ptr,
+		void *avail_struct_phys_addr,
+		void *used_struct_phys_addr,
+		void *desc_struct_phys_addr,
+		uint16_t queue_size,
+		uint32_t host_id,
+		uint32_t header,
+		uint32_t vq_type,
+		int irq_vector);
+	int (*nthw_enable_rx_virt_queue)(struct nthw_virt_queue *rx_vq);
+	int (*nthw_disable_rx_virt_queue)(struct nthw_virt_queue *rx_vq);
+	int (*nthw_release_rx_virt_queue)(struct nthw_virt_queue *rxvq);
+	struct nthw_virt_queue *(*nthw_setup_tx_virt_queue)(nthw_dbs_t *p_nthw_dbs,
+		uint32_t index,
+		uint16_t start_idx,
+		uint16_t start_ptr,
+		void *avail_struct_phys_addr,
+		void *used_struct_phys_addr,
+		void *desc_struct_phys_addr,
+		uint16_t queue_size,
+		uint32_t host_id,
+		uint32_t port,
+		uint32_t virtual_port,
+		uint32_t header,
+		uint32_t vq_type,
+		int irq_vector,
+		uint32_t in_order);
+	int (*nthw_enable_tx_virt_queue)(struct nthw_virt_queue *tx_vq);
+	int (*nthw_disable_tx_virt_queue)(struct nthw_virt_queue *tx_vq);
+	int (*nthw_release_tx_virt_queue)(struct nthw_virt_queue *txvq);
+	int (*nthw_enable_and_change_port_tx_virt_queue)(struct nthw_virt_queue *tx_vq,
+		uint32_t outport);
+	struct nthw_virt_queue *(*nthw_setup_managed_rx_virt_queue)(nthw_dbs_t *p_nthw_dbs,
+		uint32_t index,
+		uint32_t queue_size,
+		uint32_t host_id,
+		uint32_t header,
+		/*
+		 * Memory that can be used
+		 * for virtQueue structs
+		 */
+		struct nthw_memory_descriptor *p_virt_struct_area,
+		/*
+		 * Memory that can be used for packet
+		 * buffers - Array must have queue_size
+		 * entries
+		 */
+		struct nthw_memory_descriptor *p_packet_buffers,
+		uint32_t vq_type,
+		int irq_vector);
+	int (*nthw_release_managed_rx_virt_queue)(struct nthw_virt_queue *rxvq);
+	struct nthw_virt_queue *(*nthw_setup_managed_tx_virt_queue)(nthw_dbs_t *p_nthw_dbs,
+		uint32_t index,
+		uint32_t queue_size,
+		uint32_t host_id,
+		uint32_t port,
+		uint32_t virtual_port,
+		uint32_t header,
+		/*
+		 * Memory that can be used
+		 * for virtQueue structs
+		 */
+		struct nthw_memory_descriptor *p_virt_struct_area,
+		/*
+		 * Memory that can be used for packet
+		 * buffers - Array must have queue_size
+		 * entries
+		 */
+		struct nthw_memory_descriptor *p_packet_buffers,
+		uint32_t vq_type,
+		int irq_vector,
+		uint32_t in_order);
+	int (*nthw_release_managed_tx_virt_queue)(struct nthw_virt_queue *txvq);
+	int (*nthw_set_tx_qos_config)(nthw_dbs_t *p_nthw_dbs, uint32_t port, uint32_t enable,
+		uint32_t ir, uint32_t bs);
+	int (*nthw_set_tx_qos_rate_global)(nthw_dbs_t *p_nthw_dbs,
+		uint32_t multiplier,
+		uint32_t divider);
+	/*
+	 * These functions handles both Split and Packed including merged buffers (jumbo)
+	 */
+	uint16_t (*nthw_get_rx_packets)(struct nthw_virt_queue *rxvq,
+		uint16_t n,
+		struct nthw_received_packets *rp,
+		uint16_t *nb_pkts);
+	void (*nthw_release_rx_packets)(struct nthw_virt_queue *rxvq, uint16_t n);
+	uint16_t (*nthw_get_tx_buffers)(struct nthw_virt_queue *txvq,
+		uint16_t n,
+		uint16_t *first_idx,
+		struct nthw_cvirtq_desc *cvq,
+		struct nthw_memory_descriptor **p_virt_addr);
+	void (*nthw_release_tx_buffers)(struct nthw_virt_queue *txvq,
+		uint16_t n,
+		uint16_t n_segs[]);
+	int (*nthw_get_rx_queue_ptr)(struct nthw_virt_queue *rxvq, uint16_t *index);
+	int (*nthw_get_tx_queue_ptr)(struct nthw_virt_queue *txvq, uint16_t *index);
+	int (*nthw_virt_queue_init)(struct fpga_info_s *p_fpga_info);
+};
+
+void register_sg_ops(struct sg_ops_s *ops);
+const struct sg_ops_s *get_sg_ops(void);
+
+/* Meter ops section */
+struct meter_ops_s {
+	int (*eth_mtr_ops_get)(struct rte_eth_dev *eth_dev, void *ops);
+};
+
+void register_meter_ops(struct meter_ops_s *ops);
+const struct meter_ops_s *get_meter_ops(void);
+
+/*
+ *
+ */
+#ifdef __NTNIC_ETHDEV_H__
+struct ntnic_filter_ops {
+	int (*poll_statistics)(struct pmd_internals *internals);
+};
+
+void register_ntnic_filter_ops(const struct ntnic_filter_ops *ops);
+const struct ntnic_filter_ops *get_ntnic_filter_ops(void);
+#endif
+
+/*
+ *
+ */
+struct ntnic_xstats_ops {
+	int (*nthw_xstats_get_names)(nt4ga_stat_t *p_nt4ga_stat,
+		struct rte_eth_xstat_name *xstats_names,
+		unsigned int size,
+		bool is_vswitch);
+	int (*nthw_xstats_get)(nt4ga_stat_t *p_nt4ga_stat,
+		struct rte_eth_xstat *stats,
+		unsigned int n,
+		bool is_vswitch,
+		uint8_t port);
+	void (*nthw_xstats_reset)(nt4ga_stat_t *p_nt4ga_stat, bool is_vswitch, uint8_t port);
+	int (*nthw_xstats_get_names_by_id)(nt4ga_stat_t *p_nt4ga_stat,
+		struct rte_eth_xstat_name *xstats_names,
+		const uint64_t *ids,
+		unsigned int size,
+		bool is_vswitch);
+	int (*nthw_xstats_get_by_id)(nt4ga_stat_t *p_nt4ga_stat,
+		const uint64_t *ids,
+		uint64_t *values,
+		unsigned int n,
+		bool is_vswitch,
+		uint8_t port);
+};
+
+void register_ntnic_xstats_ops(struct ntnic_xstats_ops *ops);
+struct ntnic_xstats_ops *get_ntnic_xstats_ops(void);
+
+#endif	/* __DPDK_MOD_REG_H__ */
diff --git a/drivers/net/ntnic/ntnic_mod_reg.c b/drivers/net/ntnic/ntnic_mod_reg.c
new file mode 100644
index 0000000000..acd8da40d5
--- /dev/null
+++ b/drivers/net/ntnic/ntnic_mod_reg.c
@@ -0,0 +1,382 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <rte_flow_driver.h>
+#include "ntnic_mod_reg.h"
+
+/*
+ *
+ */
+static struct link_ops_s *link_100g_ops;
+
+void register_100g_link_ops(struct link_ops_s *ops)
+{
+	link_100g_ops = ops;
+}
+
+const struct link_ops_s *get_100g_link_ops(void)
+{
+	return link_100g_ops;
+}
+
+/*
+ *
+ */
+static struct link_ops_s *link_agx_100g_ops;
+
+void register_agx_100g_link_ops(struct link_ops_s *ops)
+{
+	link_agx_100g_ops = ops;
+}
+
+const struct link_ops_s *get_agx_100g_link_ops(void)
+{
+	return link_agx_100g_ops;
+}
+
+/*
+ *
+ */
+static struct link_ops_s *link_25g_ops;
+
+void register_25g_link_ops(struct link_ops_s *ops)
+{
+	link_25g_ops = ops;
+}
+
+const struct link_ops_s *get_25g_link_ops(void)
+{
+	return link_25g_ops;
+}
+
+/*
+ *
+ */
+static struct link_ops_s *link_40g_ops;
+
+void register_40g_link_ops(struct link_ops_s *ops)
+{
+	link_40g_ops = ops;
+}
+
+const struct link_ops_s *get_40g_link_ops(void)
+{
+	return link_40g_ops;
+}
+
+/*
+ *
+ */
+static struct link_ops_s *link_8x10g_ops;
+
+void register_8x10g_link_ops(struct link_ops_s *ops)
+{
+	link_8x10g_ops = ops;
+}
+
+const struct link_ops_s *get_8x10g_link_ops(void)
+{
+	return link_8x10g_ops;
+}
+
+/*
+ *
+ */
+static struct avr_sensors_ops *avr_sensors_ops;
+
+void register_avr_sensors_ops(struct avr_sensors_ops *ops)
+{
+	avr_sensors_ops = ops;
+}
+
+struct avr_sensors_ops *get_avr_sensors_ops(void)
+{
+	return avr_sensors_ops;
+}
+
+/*
+ *
+ */
+static struct board_sensors_ops *board_sensors_ops;
+
+void register_board_sensors_ops(struct board_sensors_ops *ops)
+{
+	board_sensors_ops = ops;
+}
+
+struct board_sensors_ops *get_board_sensors_ops(void)
+{
+	return board_sensors_ops;
+}
+
+/*
+ *
+ */
+static struct ntavr_ops *ntavr_ops;
+
+void register_ntavr_ops(struct ntavr_ops *ops)
+{
+	ntavr_ops = ops;
+}
+
+struct ntavr_ops *get_ntavr_ops(void)
+{
+	return ntavr_ops;
+}
+
+/*
+ *
+ */
+static struct sensor_convertion_fun_ops *sensor_convertion_fun_ops;
+
+void register_sensor_convertion_fun_ops(struct sensor_convertion_fun_ops *ops)
+{
+	sensor_convertion_fun_ops = ops;
+}
+
+struct sensor_convertion_fun_ops *get_sensor_convertion_fun_ops(void)
+{
+	return sensor_convertion_fun_ops;
+}
+
+/*
+ *
+ */
+static struct sensor_ops *sensor_ops;
+
+void register_sensor_ops(struct sensor_ops *ops)
+{
+	sensor_ops = ops;
+}
+
+struct sensor_ops *get_sensor_ops(void)
+{
+	return sensor_ops;
+}
+
+/*
+ *
+ */
+static struct nim_sensors_ops *nim_sensors_ops;
+
+void register_nim_sensors_ops(struct nim_sensors_ops *ops)
+{
+	nim_sensors_ops = ops;
+}
+
+struct nim_sensors_ops *get_nim_sensors_ops(void)
+{
+	return nim_sensors_ops;
+}
+
+/*
+ *
+ */
+static const struct port_ops *port_ops;
+
+void register_port_ops(const struct port_ops *ops)
+{
+	port_ops = ops;
+}
+
+const struct port_ops *get_port_ops(void)
+{
+	return port_ops;
+}
+
+/*
+ *
+ */
+static const struct nt4ga_stat_ops *nt4ga_stat_ops;
+
+void register_nt4ga_stat_ops(const struct nt4ga_stat_ops *ops)
+{
+	nt4ga_stat_ops = ops;
+}
+
+const struct nt4ga_stat_ops *get_nt4ga_stat_ops(void)
+{
+	return nt4ga_stat_ops;
+}
+
+/*
+ *
+ */
+static const struct adapter_ops *adapter_ops;
+
+void register_adapter_ops(const struct adapter_ops *ops)
+{
+	adapter_ops = ops;
+}
+
+const struct adapter_ops *get_adapter_ops(void)
+{
+	return adapter_ops;
+}
+
+static struct clk9530_ops *clk9530_ops;
+
+void register_clk9530_ops(struct clk9530_ops *ops)
+{
+	clk9530_ops = ops;
+}
+
+struct clk9530_ops *get_clk9530_ops(void)
+{
+	return clk9530_ops;
+}
+
+static struct clk9544_ops *clk9544_ops;
+
+void register_clk9544_ops(struct clk9544_ops *ops)
+{
+	clk9544_ops = ops;
+}
+
+struct clk9544_ops *get_clk9544_ops(void)
+{
+	return clk9544_ops;
+}
+
+static struct clk9563_ops *clk9563_ops;
+
+void register_clk9563_ops(struct clk9563_ops *ops)
+{
+	clk9563_ops = ops;
+}
+
+struct clk9563_ops *get_clk9563_ops(void)
+{
+	return clk9563_ops;
+}
+
+static struct clk9572_ops *clk9572_ops;
+
+void register_clk9572_ops(struct clk9572_ops *ops)
+{
+	clk9572_ops = ops;
+}
+
+struct clk9572_ops *get_clk9572_ops(void)
+{
+	return clk9572_ops;
+}
+
+static struct rst_nt200a0x_ops *rst_nt200a0x_ops;
+
+void register_rst_nt200a0x_ops(struct rst_nt200a0x_ops *ops)
+{
+	rst_nt200a0x_ops = ops;
+}
+
+struct rst_nt200a0x_ops *get_rst_nt200a0x_ops(void)
+{
+	return rst_nt200a0x_ops;
+}
+
+static struct rst9530_ops *rst9530_ops;
+
+void register_rst9530_ops(struct rst9530_ops *ops)
+{
+	rst9530_ops = ops;
+}
+
+struct rst9530_ops *get_rst9530_ops(void)
+{
+	return rst9530_ops;
+}
+
+static struct rst9544_ops *rst9544_ops;
+
+void register_rst9544_ops(struct rst9544_ops *ops)
+{
+	rst9544_ops = ops;
+}
+
+struct rst9544_ops *get_rst9544_ops(void)
+{
+	return rst9544_ops;
+}
+
+static struct rst9563_ops *rst9563_ops;
+
+void register_rst9563_ops(struct rst9563_ops *ops)
+{
+	rst9563_ops = ops;
+}
+
+struct rst9563_ops *get_rst9563_ops(void)
+{
+	return rst9563_ops;
+}
+
+static struct rst9572_ops *rst9572_ops;
+
+void register_rst9572_ops(struct rst9572_ops *ops)
+{
+	rst9572_ops = ops;
+}
+
+struct rst9572_ops *get_rst9572_ops(void)
+{
+	return rst9572_ops;
+}
+
+static struct rst_nt400dxx_ops *rst_nt400dxx_ops;
+
+void register_rst_nt400dxx_ops(struct rst_nt400dxx_ops *ops)
+{
+	rst_nt400dxx_ops = ops;
+}
+
+struct rst_nt400dxx_ops *get_rst_nt400dxx_ops(void)
+{
+	return rst_nt400dxx_ops;
+}
+
+/*
+ *
+ */
+static const struct profile_inline_ops *profile_inline_ops;
+
+void register_profile_inline_ops(const struct profile_inline_ops *ops)
+{
+	profile_inline_ops = ops;
+}
+
+const struct profile_inline_ops *get_profile_inline_ops(void)
+{
+	return profile_inline_ops;
+}
+
+/*
+ *
+ */
+static const struct flow_filter_ops *flow_filter_ops;
+
+void register_flow_filter_ops(const struct flow_filter_ops *ops)
+{
+	flow_filter_ops = ops;
+}
+
+const struct flow_filter_ops *get_flow_filter_ops(void)
+{
+	return flow_filter_ops;
+}
+
+/*
+ *
+ */
+static const struct rte_flow_ops *dev_flow_ops;
+
+void register_dev_flow_ops(const struct rte_flow_ops *ops)
+{
+	dev_flow_ops = ops;
+}
+
+const struct rte_flow_ops *get_dev_flow_ops(void)
+{
+	return dev_flow_ops;
+}
diff --git a/drivers/net/ntnic/ntnic_mod_reg.h b/drivers/net/ntnic/ntnic_mod_reg.h
new file mode 100644
index 0000000000..718f3245c0
--- /dev/null
+++ b/drivers/net/ntnic/ntnic_mod_reg.h
@@ -0,0 +1,512 @@
+#ifndef __NTNIC_MOD_REG_H__
+#define __NTNIC_MOD_REG_H__
+
+#include <stdint.h>
+#include "flow_api.h"
+#include "stream_binary_flow_api.h"
+#include "nthw_fpga_model.h"
+#include "nthw_platform_drv.h"
+#include "ntnic_stat.h"
+#include "nthw_drv.h"
+#include "nt4ga_adapter.h"
+
+/*
+ *
+ */
+struct link_ops_s {
+	int (*link_init)(struct adapter_info_s *p_adapter_info, nthw_fpga_t *p_fpga);
+};
+
+void register_100g_link_ops(struct link_ops_s *ops);
+const struct link_ops_s *get_100g_link_ops(void);
+
+void register_agx_100g_link_ops(struct link_ops_s *ops);
+const struct link_ops_s *get_agx_100g_link_ops(void);
+
+void register_25g_link_ops(struct link_ops_s *ops);
+const struct link_ops_s *get_25g_link_ops(void);
+
+void register_40g_link_ops(struct link_ops_s *ops);
+const struct link_ops_s *get_40g_link_ops(void);
+
+void register_8x10g_link_ops(struct link_ops_s *ops);
+const struct link_ops_s *get_8x10g_link_ops(void);
+
+/*
+ *
+ */
+struct avr_sensors_ops {
+	struct nt_sensor_group *(*avr_sensor_init)(nthw_spi_v3_t *s_spi, uint8_t m_adapter_no,
+		const char *p_name,
+		enum nt_sensor_source_e ssrc, enum nt_sensor_type_e type, unsigned int index,
+		enum sensor_mon_device avr_dev, uint8_t avr_dev_reg, enum sensor_mon_endian end,
+		enum sensor_mon_sign si, int (*conv_func)(uint32_t), uint16_t mask);
+};
+
+void register_avr_sensors_ops(struct avr_sensors_ops *ops);
+struct avr_sensors_ops *get_avr_sensors_ops(void);
+
+/*
+ *
+ */
+struct board_sensors_ops {
+	struct nt_sensor_group *(*fpga_temperature_sensor_init)(uint8_t adapter_no,
+		unsigned int sensor_idx,
+		nthw_fpga_t *p_fpga);
+};
+
+void register_board_sensors_ops(struct board_sensors_ops *ops);
+struct board_sensors_ops *get_board_sensors_ops(void);
+
+/*
+ *
+ */
+struct ntavr_ops {
+	int (*nt_avr_sensor_mon_ctrl)(nthw_spi_v3_t *s_spi, enum sensor_mon_control ctrl);
+	int (*nt_avr_sensor_mon_setup)(struct sensor_mon_setup16 *p_setup, nthw_spi_v3_t *s_spi);
+	uint32_t (*sensor_read)(nthw_spis_t *t_spi, uint8_t fpga_idx, uint32_t *p_sensor_result);
+};
+
+void register_ntavr_ops(struct ntavr_ops *ops);
+struct ntavr_ops *get_ntavr_ops(void);
+
+/*
+ *
+ */
+struct sensor_convertion_fun_ops {
+	int (*null_signed)(uint32_t p_sensor_result);
+	int (*exar7724_tj)(uint32_t p_sensor_result);
+	int (*ds1775_t)(uint32_t p_sensor_result);
+	int (*mp2886a_tj)(uint32_t p_sensor_result);
+	int (*fan)(uint32_t p_sensor_result);
+	int (*null_sign)(uint32_t sensor_result);
+	int (*tmp464p_t)(uint32_t p_sensor_result);
+	int (*fan_nt400)(uint32_t sensor_result);
+	int (*mp8645p_tj)(uint32_t sensor_result);
+	int (*mp2978_t)(uint32_t sensor_result);
+	int (*max6642_t)(uint32_t p_sensor_result);
+	int (*ltm4676_tj)(uint32_t p_sensor_result);
+	int (*exar7724_vin)(uint32_t p_sensor_result);
+	int (*exar7724_vch)(uint32_t p_sensor_result);
+	int (*null_unsigned)(uint32_t p_sensor_result);
+};
+
+void register_sensor_convertion_fun_ops(struct sensor_convertion_fun_ops *ops);
+struct sensor_convertion_fun_ops *get_sensor_convertion_fun_ops(void);
+
+/*
+ *
+ */
+struct sensor_ops {
+	void (*update_sensor_value)(struct nt_adapter_sensor *sensor, int32_t value);
+	void (*sensor_deinit)(struct nt_sensor_group *sg);
+	struct nt_adapter_sensor *(*allocate_sensor_by_description)(uint8_t adapter_or_port_index,
+		enum nt_sensor_source_e ssrc,
+		struct nt_adapter_sensor_description *descr);
+	void (*dump_sensor)(struct nt_adapter_sensor *sensor);
+	struct nt_adapter_sensor *(*allocate_sensor)(uint8_t adapter_or_port_index,
+		const char *p_name,
+		enum nt_sensor_source_e ssrc,
+		enum nt_sensor_type_e type,
+		unsigned int index,
+		enum nt_sensor_event_alarm_e event_alarm,
+		enum sensor_mon_sign si);
+	void (*init_sensor_group)(struct nt_sensor_group *sg);
+	int32_t (*get_value)(struct nt_sensor_group *sg);
+	int32_t (*get_lowest)(struct nt_sensor_group *sg);
+	int32_t (*get_highest)(struct nt_sensor_group *sg);
+	char *(*get_name)(struct nt_sensor_group *sg);
+};
+
+void register_sensor_ops(struct sensor_ops *ops);
+struct sensor_ops *get_sensor_ops(void);
+
+/*
+ *
+ */
+struct nim_sensors_ops {
+	struct nt_adapter_sensor_description *(*get_sfp_sensors_level0)(void);
+	struct nt_adapter_sensor_description *(*get_sfp_sensors_level1)(void);
+	struct nt_adapter_sensor_description *(*get_qsfp_sensor_level0)(void);
+	struct nt_adapter_sensor_description *(*get_qsfp_sensor_level1)(void);
+	struct nt_adapter_sensor *(*allocate_sensor_by_description)(uint8_t adapter_or_port_index,
+		enum nt_sensor_source_e src,
+		struct nt_adapter_sensor_description *descr);
+	void (*update_sensor_value)(struct nt_adapter_sensor *sensor, int32_t value);
+};
+
+void register_nim_sensors_ops(struct nim_sensors_ops *ops);
+struct nim_sensors_ops *get_nim_sensors_ops(void);
+
+/*
+ *
+ */
+struct port_ops {
+	bool (*get_nim_present)(struct adapter_info_s *p, int port);
+
+	/*
+	 * port:s link mode
+	 */
+	void (*set_adm_state)(struct adapter_info_s *p, int port, bool adm_state);
+	bool (*get_adm_state)(struct adapter_info_s *p, int port);
+
+	/*
+	 * port:s link status
+	 */
+	void (*set_link_status)(struct adapter_info_s *p, int port, bool status);
+	bool (*get_link_status)(struct adapter_info_s *p, int port);
+
+	/*
+	 * port: link autoneg
+	 */
+	void (*set_link_autoneg)(struct adapter_info_s *p, int port, bool autoneg);
+	bool (*get_link_autoneg)(struct adapter_info_s *p, int port);
+
+	/*
+	 * port: link speed
+	 */
+	void (*set_link_speed)(struct adapter_info_s *p, int port, nt_link_speed_t speed);
+	nt_link_speed_t (*get_link_speed)(struct adapter_info_s *p, int port);
+
+	/*
+	 * port: link duplex
+	 */
+	void (*set_link_duplex)(struct adapter_info_s *p, int port, nt_link_duplex_t duplex);
+	nt_link_duplex_t (*get_link_duplex)(struct adapter_info_s *p, int port);
+
+	/*
+	 * port: loopback mode
+	 */
+	void (*set_loopback_mode)(struct adapter_info_s *p, int port, uint32_t mode);
+	uint32_t (*get_loopback_mode)(struct adapter_info_s *p, int port);
+
+	uint32_t (*get_link_speed_capabilities)(struct adapter_info_s *p, int port);
+
+	/*
+	 * port: nim capabilities
+	 */
+	nim_i2c_ctx_t (*get_nim_capabilities)(struct adapter_info_s *p, int port);
+
+	/*
+	 * port: tx power
+	 */
+	int (*tx_power)(struct adapter_info_s *p, int port, bool disable);
+};
+
+void register_port_ops(const struct port_ops *ops);
+const struct port_ops *get_port_ops(void);
+
+/*
+ *
+ */
+struct nt4ga_stat_ops {
+	int (*nt4ga_stat_init)(struct adapter_info_s *p_adapter_info);
+	int (*nt4ga_stat_setup)(struct adapter_info_s *p_adapter_info);
+	int (*nt4ga_stat_stop)(struct adapter_info_s *p_adapter_info);
+	int (*nt4ga_stat_dump)(struct adapter_info_s *p_adapter_info, FILE *pfh);
+	int (*nt4ga_stat_collect)(struct adapter_info_s *p_adapter_info,
+		nt4ga_stat_t *p_nt4ga_stat);
+};
+
+void register_nt4ga_stat_ops(const struct nt4ga_stat_ops *ops);
+const struct nt4ga_stat_ops *get_nt4ga_stat_ops(void);
+
+/*
+ *
+ */
+struct adapter_ops {
+	int (*init)(struct adapter_info_s *p_adapter_info);
+	int (*deinit)(struct adapter_info_s *p_adapter_info);
+
+	int (*show_info)(struct adapter_info_s *p_adapter_info, FILE *pfh);
+};
+
+void register_adapter_ops(const struct adapter_ops *ops);
+const struct adapter_ops *get_adapter_ops(void);
+
+struct clk9530_ops {
+	const int *(*get_n_data_9530_si5340_nt200a02_u23_v6)(void);
+	const clk_profile_data_fmt2_t *(*get_p_data_9530_si5340_nt200a02_u23_v6)(void);
+};
+
+void register_clk9530_ops(struct clk9530_ops *ops);
+struct clk9530_ops *get_clk9530_ops(void);
+
+struct clk9544_ops {
+	const int *(*get_n_data_9544_si5340_nt200a02_u23_v6)(void);
+	const clk_profile_data_fmt2_t *(*get_p_data_9544_si5340_nt200a02_u23_v6)(void);
+};
+
+void register_clk9544_ops(struct clk9544_ops *ops);
+struct clk9544_ops *get_clk9544_ops(void);
+
+struct clk9563_ops {
+	const int *(*get_n_data_9563_si5340_nt200a02_u23_v5)(void);
+	const clk_profile_data_fmt2_t *(*get_p_data_9563_si5340_nt200a02_u23_v5)(void);
+};
+
+void register_clk9563_ops(struct clk9563_ops *ops);
+struct clk9563_ops *get_clk9563_ops(void);
+
+struct clk9572_ops {
+	const int *(*get_n_data_9572_si5340_nt200a02_u23_v12)(void);
+	const clk_profile_data_fmt2_t *(*get_p_data_9572_si5340_nt200a02_u23_v12)(void);
+};
+
+void register_clk9572_ops(struct clk9572_ops *ops);
+struct clk9572_ops *get_clk9572_ops(void);
+
+struct rst_nt200a0x_ops {
+	int (*nthw_fpga_rst_nt200a0x_init)(struct fpga_info_s *p_fpga_info,
+		struct nthw_fpga_rst_nt200a0x *p_rst);
+	int (*nthw_fpga_rst_nt200a0x_reset)(nthw_fpga_t *p_fpga,
+		const struct nthw_fpga_rst_nt200a0x *p);
+};
+
+void register_rst_nt200a0x_ops(struct rst_nt200a0x_ops *ops);
+struct rst_nt200a0x_ops *get_rst_nt200a0x_ops(void);
+
+struct rst9530_ops {
+	int (*nthw_fpga_rst9530_init)(struct fpga_info_s *p_fpga_info,
+		struct nthw_fpga_rst_nt200a0x *const p);
+};
+
+void register_rst9530_ops(struct rst9530_ops *ops);
+struct rst9530_ops *get_rst9530_ops(void);
+
+struct rst9544_ops {
+	int (*nthw_fpga_rst9544_init)(struct fpga_info_s *p_fpga_info,
+		struct nthw_fpga_rst_nt200a0x *const p);
+};
+
+void register_rst9544_ops(struct rst9544_ops *ops);
+struct rst9544_ops *get_rst9544_ops(void);
+
+struct rst9563_ops {
+	int (*nthw_fpga_rst9563_init)(struct fpga_info_s *p_fpga_info,
+		struct nthw_fpga_rst_nt200a0x *const p);
+};
+
+void register_rst9563_ops(struct rst9563_ops *ops);
+struct rst9563_ops *get_rst9563_ops(void);
+
+struct rst9572_ops {
+	int (*nthw_fpga_rst9572_init)(struct fpga_info_s *p_fpga_info,
+		struct nthw_fpga_rst_nt200a0x *const p);
+};
+
+void register_rst9572_ops(struct rst9572_ops *ops);
+struct rst9572_ops *get_rst9572_ops(void);
+
+struct rst_nt400dxx_ops {
+	int (*nthw_fpga_rst_nt400dxx_init)(struct fpga_info_s *p_fpga_info);
+	int (*nthw_fpga_rst_nt400dxx_reset)(struct fpga_info_s *p_fpga_info);
+};
+
+void register_rst_nt400dxx_ops(struct rst_nt400dxx_ops *ops);
+struct rst_nt400dxx_ops *get_rst_nt400dxx_ops(void);
+
+/*
+ *
+ */
+struct profile_inline_ops {
+	/*
+	 * NT Flow FLM Meter API
+	 */
+	int (*flow_mtr_supported)(struct flow_eth_dev *dev);
+
+	uint64_t (*flow_mtr_meter_policy_n_max)(void);
+
+	int (*flow_mtr_set_profile)(struct flow_eth_dev *dev, uint32_t profile_id,
+		uint64_t bucket_rate_a, uint64_t bucket_size_a,
+		uint64_t bucket_rate_b, uint64_t bucket_size_b);
+
+	int (*flow_mtr_set_policy)(struct flow_eth_dev *dev, uint32_t policy_id, int drop);
+
+	int (*flow_mtr_create_meter)(struct flow_eth_dev *dev, uint8_t caller_id, uint32_t mtr_id,
+		uint32_t profile_id, uint32_t policy_id, uint64_t stats_mask);
+
+	int (*flow_mtr_probe_meter)(struct flow_eth_dev *dev, uint8_t caller_id, uint32_t mtr_id);
+
+	int (*flow_mtr_destroy_meter)(struct flow_eth_dev *dev, uint8_t caller_id,
+		uint32_t mtr_id);
+
+	int (*flm_mtr_adjust_stats)(struct flow_eth_dev *dev, uint8_t caller_id, uint32_t mtr_id,
+		uint32_t adjust_value);
+
+	uint32_t (*flow_mtr_meters_supported)(struct flow_eth_dev *dev, uint8_t caller_id);
+
+	void (*flm_setup_queues)(void);
+	void (*flm_free_queues)(void);
+	uint32_t (*flm_lrn_update)(struct flow_eth_dev *dev, uint32_t *inf_cnt);
+
+	uint32_t (*flm_mtr_update_stats)(struct flow_eth_dev *dev, uint32_t *inf_cnt);
+	void (*flm_mtr_read_stats)(struct flow_eth_dev *dev,
+		uint8_t caller_id,
+		uint32_t id,
+		uint64_t *stats_mask,
+		uint64_t *green_pkt,
+		uint64_t *green_bytes,
+		int clear);
+
+	uint32_t (*flm_update)(struct flow_eth_dev *dev);
+
+	/*
+	 * Config API
+	 */
+	int (*flow_set_mtu_inline)(struct flow_eth_dev *dev, uint32_t port, uint16_t mtu);
+};
+
+void register_profile_inline_ops(const struct profile_inline_ops *ops);
+const struct profile_inline_ops *get_profile_inline_ops(void);
+
+/*
+ *
+ */
+struct flow_filter_ops {
+	int (*flow_filter_init)(nthw_fpga_t *p_fpga, struct flow_nic_dev **p_flow_device,
+		int adapter_no);
+	int (*flow_filter_done)(struct flow_nic_dev *dev);
+
+	/*
+	 * Device Management API
+	 */
+	int (*flow_reset_nic_dev)(uint8_t adapter_no);
+
+	struct flow_eth_dev *(*flow_get_eth_dev)(uint8_t adapter_no,
+		uint8_t hw_port_no,
+		uint32_t port_id,
+		int alloc_rx_queues,
+		struct flow_queue_id_s queue_ids[],
+		int *rss_target_id,
+		enum flow_eth_dev_profile flow_profile,
+		uint32_t exception_path);
+
+	int (*flow_eth_dev_add_queue)(struct flow_eth_dev *eth_dev,
+		struct flow_queue_id_s *queue_id);
+
+	int (*flow_delete_eth_dev)(struct flow_eth_dev *eth_dev);
+
+	int (*flow_get_tunnel_definition)(struct tunnel_cfg_s *tun, uint32_t flow_stat_id,
+		uint8_t vport);
+
+	/*
+	 * NT Flow API
+	 */
+	int (*flow_validate)(struct flow_eth_dev *dev,
+		const struct flow_elem item[],
+		const struct flow_action action[],
+		struct flow_error *error);
+
+	struct flow_handle *(*flow_create)(struct flow_eth_dev *dev,
+		const struct flow_attr *attr,
+		const struct flow_elem item[],
+		const struct flow_action action[],
+		struct flow_error *error);
+
+	int (*flow_destroy)(struct flow_eth_dev *dev,
+		struct flow_handle *flow,
+		struct flow_error *error);
+
+	int (*flow_flush)(struct flow_eth_dev *dev, uint16_t caller_id, struct flow_error *error);
+
+	int (*flow_actions_update)(struct flow_eth_dev *dev,
+		struct flow_handle *flow,
+		const struct flow_action action[],
+		struct flow_error *error);
+
+	int (*flow_query)(struct flow_eth_dev *dev,
+		struct flow_handle *flow,
+		const struct flow_action *action,
+		void **data,
+		uint32_t *length,
+		struct flow_error *error);
+
+	int (*flow_dev_dump)(struct flow_eth_dev *dev,
+		struct flow_handle *flow,
+		uint16_t caller_id,
+		FILE *file,
+		struct flow_error *error);
+
+	/*
+	 * NT Flow asynchronous operations API
+	 */
+	int (*flow_info_get)(struct flow_eth_dev *dev, struct flow_port_info *port_info,
+		struct flow_queue_info *queue_info, struct flow_error *error);
+
+	int (*flow_configure)(struct flow_eth_dev *dev, uint8_t caller_id,
+		const struct flow_port_attr *port_attr, uint16_t nb_queue,
+		const struct flow_queue_attr *queue_attr[],
+		struct flow_error *error);
+
+	struct flow_pattern_template *(*flow_pattern_template_create)(struct flow_eth_dev *dev,
+		const struct flow_pattern_template_attr *template_attr,
+		const struct flow_elem pattern[], struct flow_error *error);
+
+	int (*flow_pattern_template_destroy)(struct flow_eth_dev *dev,
+		struct flow_pattern_template *pattern_template,
+		struct flow_error *error);
+
+	struct flow_actions_template *(*flow_actions_template_create)(struct flow_eth_dev *dev,
+		const struct flow_actions_template_attr *template_attr,
+		const struct flow_action actions[], const struct flow_action masks[],
+		struct flow_error *error);
+
+	int (*flow_actions_template_destroy)(struct flow_eth_dev *dev,
+		struct flow_actions_template *actions_template,
+		struct flow_error *error);
+
+	struct flow_template_table *(*flow_template_table_create)(struct flow_eth_dev *dev,
+		const struct flow_template_table_attr *table_attr,
+		struct flow_pattern_template *pattern_templates[], uint8_t nb_pattern_templates,
+		struct flow_actions_template *actions_templates[], uint8_t nb_actions_templates,
+		struct flow_error *error);
+
+	int (*flow_template_table_destroy)(struct flow_eth_dev *dev,
+		struct flow_template_table *template_table,
+		struct flow_error *error);
+
+	struct flow_handle *(*flow_async_create)(struct flow_eth_dev *dev, uint32_t queue_id,
+		const struct flow_op_attr *op_attr,
+		struct flow_template_table *template_table, const struct flow_elem pattern[],
+		uint8_t pattern_template_index, const struct flow_action actions[],
+		uint8_t actions_template_index, void *user_data, struct flow_error *error);
+
+	int (*flow_async_destroy)(struct flow_eth_dev *dev, uint32_t queue_id,
+		const struct flow_op_attr *op_attr, struct flow_handle *flow,
+		void *user_data, struct flow_error *error);
+
+	int (*flow_push)(struct flow_eth_dev *dev, uint32_t queue_id, struct flow_error *error);
+
+	int (*flow_pull)(struct flow_eth_dev *dev, uint32_t queue_id, struct flow_op_result res[],
+		uint16_t n_res, struct flow_error *error);
+
+	/*
+	 * Other
+	 */
+	struct flow_eth_dev *(*nic_and_port_to_eth_dev)(uint8_t adapter_no, uint8_t port);
+	struct flow_nic_dev *(*get_nic_dev_from_adapter_no)(uint8_t adapter_no);
+
+	int (*flow_nic_set_hasher)(struct flow_nic_dev *ndev, int hsh_idx,
+		enum flow_nic_hash_e algorithm);
+
+	int (*flow_get_num_queues)(uint8_t adapter_no, uint8_t port_no);
+	int (*flow_get_hw_id)(uint8_t adapter_no, uint8_t port_no, uint8_t queue_no);
+
+	int (*flow_get_flm_stats)(struct flow_nic_dev *ndev, uint64_t *data, uint64_t size);
+
+	int (*hw_mod_hsh_rcp_flush)(struct flow_api_backend_s *be, int start_idx, int count);
+};
+
+void register_flow_filter_ops(const struct flow_filter_ops *ops);
+const struct flow_filter_ops *get_flow_filter_ops(void);
+
+/*
+ *
+ */
+#ifdef RTE_FLOW_DRIVER_H_
+void register_dev_flow_ops(const struct rte_flow_ops *ops);
+const struct rte_flow_ops *get_dev_flow_ops(void);
+#endif
+
+#endif	/* __NTNIC_MOD_REG_H__ */
-- 
2.44.0


  parent reply	other threads:[~2024-05-30 14:50 UTC|newest]

Thread overview: 238+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-30 14:48 [PATCH v1 01/17] net/ntnic: Add registers for NapaTech SmartNiC Serhii Iliushyk
2024-05-30 14:48 ` [PATCH v1 02/17] net/ntnic: add core platform functionality Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 03/17] net/ntnic: add interfaces for " Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 04/17] net/ntnic: add FPGA model implementation Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 05/17] net/ntnic: add NTNIC adapter interfaces Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 06/17] net/ntnic: add interfaces for PMD driver modules Serhii Iliushyk
2024-05-30 14:49 ` Serhii Iliushyk [this message]
2024-05-30 14:49 ` [PATCH v1 08/17] net/ntnic: add interfaces for flow API engine Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 09/17] net/ntnic: add VFIO module Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 10/17] net/ntnic: add Logs and utilities implementation Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 11/17] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 12/17] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 13/17] net/ntnic: add adapter initialization Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 14/17] net/ntnic: add adapter initialization API Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 15/17] net/ntnic: add link management module Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 16/17] net/ntnic: add link 100G module Serhii Iliushyk
2024-05-30 14:49 ` [PATCH v1 17/17] net/ntnic: add NIM module Serhii Iliushyk
2024-05-31 15:47 ` [PATCH v2 01/17] net/ntnic: Add registers for NapaTech SmartNiC Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 02/17] net/ntnic: add core platform functionality Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 03/17] net/ntnic: add interfaces for " Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 04/17] net/ntnic: add FPGA model implementation Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 05/17] net/ntnic: add NTNIC adapter interfaces Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 06/17] net/ntnic: add interfaces for PMD driver modules Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 07/17] net/ntnic: add API " Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 08/17] net/ntnic: add interfaces for flow API engine Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 09/17] net/ntnic: add VFIO module Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 10/17] net/ntnic: add Logs and utilities implementation Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 11/17] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 12/17] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 13/17] net/ntnic: add adapter initialization Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 14/17] net/ntnic: add adapter initialization API Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 15/17] net/ntnic: add link management module Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 16/17] net/ntnic: add link 100G module Serhii Iliushyk
2024-05-31 15:47   ` [PATCH v2 17/17] net/ntnic: add NIM module Serhii Iliushyk
2024-06-03 16:17 ` [PATCH v3 01/17] net/ntnic: Add registers for NapaTech SmartNiC Serhii Iliushyk
2024-06-03 16:17   ` [PATCH v3 02/17] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 03/17] net/ntnic: add interfaces for " Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 04/17] net/ntnic: add FPGA model implementation Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 05/17] net/ntnic: add NTNIC adapter interfaces Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 06/17] net/ntnic: add interfaces for PMD driver modules Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 07/17] net/ntnic: add API " Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 08/17] net/ntnic: add interfaces for flow API engine Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 09/17] net/ntnic: add VFIO module Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 10/17] net/ntnic: add Logs and utilities implementation Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 11/17] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 12/17] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 13/17] net/ntnic: add adapter initialization Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 14/17] net/ntnic: add adapter initialization API Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 15/17] net/ntnic: add link management module Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 16/17] net/ntnic: add link 100G module Serhii Iliushyk
2024-06-03 16:18   ` [PATCH v3 17/17] net/ntnic: add NIM module Serhii Iliushyk
2024-06-04 10:29   ` [PATCH v3 01/17] net/ntnic: Add registers for NapaTech SmartNiC Mykola Kostenok
2024-06-07 13:03     ` Serhii Iliushyk
2024-06-12  8:50       ` Ferruh Yigit
2024-06-12  8:55         ` Ferruh Yigit
2024-06-26 19:55 ` [PATCH v4 01/23] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 02/23] net/ntnic: add logging implementation Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 03/23] net/ntnic: add minimal initialization for PCI device Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 04/23] net/ntnic: add NT utilities implementation Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 05/23] net/ntnic: add VFIO module Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 06/23] net/ntnic: add NT NIC driver dependencies Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 07/23] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 08/23] net/ntnic: add adapter initialization Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 09/23] net/ntnic: add registers and FPGA model for NapaTech NIC Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 10/23] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 11/23] net/ntnic: add FPGA initialization functionality Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 12/23] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 13/23] net/ntnic: add reset module for " Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 14/23] net/ntnic: add clock profiles " Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 15/23] net/ntnic: add MAC and packet features Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 16/23] net/ntnic: add link management module Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 17/23] net/ntnic: add link 100G module Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 18/23] net/ntnic: add NIM module Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 19/23] net/ntnic: add QSFP support Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 20/23] net/ntnic: add QSFP28 support Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 21/23] net/ntnic: add GPIO PHY module Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 22/23] net/ntnic: add MAC PCS register interface module Serhii Iliushyk
2024-06-26 19:55   ` [PATCH v4 23/23] net/ntnic: add GMF (Generic MAC Feeder) module Serhii Iliushyk
2024-06-27  7:38 ` [PATCH v5 01/23] net/ntnic: add ethdev and makes PMD available Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 02/23] net/ntnic: add logging implementation Serhii Iliushyk
2024-07-04 22:43     ` Ferruh Yigit
2024-06-27  7:38   ` [PATCH v5 03/23] net/ntnic: add minimal initialization for PCI device Serhii Iliushyk
2024-07-04 22:44     ` Ferruh Yigit
2024-07-10 14:30       ` Serhii Iliushyk
2024-07-10 14:58         ` Ferruh Yigit
2024-06-27  7:38   ` [PATCH v5 04/23] net/ntnic: add NT utilities implementation Serhii Iliushyk
2024-07-04 22:44     ` Ferruh Yigit
2024-06-27  7:38   ` [PATCH v5 05/23] net/ntnic: add VFIO module Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 06/23] net/ntnic: add NT NIC driver dependencies Serhii Iliushyk
2024-07-04 22:46     ` Ferruh Yigit
2024-06-27  7:38   ` [PATCH v5 07/23] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 08/23] net/ntnic: add adapter initialization Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 09/23] net/ntnic: add registers and FPGA model for NapaTech NIC Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 10/23] net/ntnic: add core platform functionality Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 11/23] net/ntnic: add FPGA initialization functionality Serhii Iliushyk
2024-07-04 22:46     ` Ferruh Yigit
2024-06-27  7:38   ` [PATCH v5 12/23] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 13/23] net/ntnic: add reset module for " Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 14/23] net/ntnic: add clock profiles " Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 15/23] net/ntnic: add MAC and packet features Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 16/23] net/ntnic: add link management module Serhii Iliushyk
2024-07-04 22:47     ` Ferruh Yigit
2024-06-27  7:38   ` [PATCH v5 17/23] net/ntnic: add link 100G module Serhii Iliushyk
2024-06-27  7:38   ` [PATCH v5 18/23] net/ntnic: add NIM module Serhii Iliushyk
2024-06-27  7:39   ` [PATCH v5 19/23] net/ntnic: add QSFP support Serhii Iliushyk
2024-06-27  7:39   ` [PATCH v5 20/23] net/ntnic: add QSFP28 support Serhii Iliushyk
2024-06-27  7:39   ` [PATCH v5 21/23] net/ntnic: add GPIO PHY module Serhii Iliushyk
2024-06-27  7:39   ` [PATCH v5 22/23] net/ntnic: add MAC PCS register interface module Serhii Iliushyk
2024-06-27  7:39   ` [PATCH v5 23/23] net/ntnic: add GMF (Generic MAC Feeder) module Serhii Iliushyk
2024-07-04 22:50     ` Ferruh Yigit
2024-07-04 22:43   ` [PATCH v5 01/23] net/ntnic: add ethdev and makes PMD available Ferruh Yigit
2024-07-11 12:07 ` [PATCH v6 01/21] " Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 02/21] net/ntnic: add logging implementation Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 03/21] net/ntnic: add minimal initialization for PCI device Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 04/21] net/ntnic: add NT utilities implementation Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 05/21] net/ntnic: add VFIO module Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 06/21] net/ntnic: add basic eth dev ops to ntnic Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 07/21] net/ntnic: add core platform structures Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 08/21] net/ntnic: add adapter initialization Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 09/21] net/ntnic: add registers and FPGA model for NapaTech NIC Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 10/21] net/ntnic: add FPGA modules for initialization Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 11/21] net/ntnic: add FPGA initialization functionality Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 12/21] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 13/21] net/ntnic: add startup and reset sequence for NT200A0X Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 14/21] net/ntnic: add clock profile for the NT200A0X smartNIC Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 15/21] net/ntnic: add link management skeleton Serhii Iliushyk
     [not found]     ` <9f13294e-4169-483c-bee4-8ea4c2db8070@amd.com>
2024-07-11 16:51       ` Ferruh Yigit
2024-07-11 12:07   ` [PATCH v6 16/21] net/ntnic: add link 100G module ops Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 17/21] net/ntnic: add generic NIM and I2C modules Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 18/21] net/ntnic: add QSFP support Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 19/21] net/ntnic: add QSFP28 support Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 20/21] net/ntnic: add GPIO communication for NIMs Serhii Iliushyk
2024-07-11 12:07   ` [PATCH v6 21/21] net/ntnic: add physical layer control module Serhii Iliushyk
     [not found]   ` <3f90331f-9ba9-4590-b83f-dd33f25c92a0@amd.com>
2024-07-11 16:53     ` [PATCH v6 01/21] net/ntnic: add ethdev and makes PMD available Ferruh Yigit
     [not found]   ` <0bfefc75-c57e-4510-9c9f-15f8fb277718@amd.com>
2024-07-11 16:54     ` Ferruh Yigit
2024-07-12  9:48 ` [PATCH v7 " Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 02/21] net/ntnic: add logging implementation Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 03/21] net/ntnic: add minimal initialization for PCI device Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 04/21] net/ntnic: add NT utilities implementation Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 05/21] net/ntnic: add VFIO module Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 06/21] net/ntnic: add basic eth dev ops to ntnic Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 07/21] net/ntnic: add core platform structures Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 08/21] net/ntnic: add adapter initialization Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 09/21] net/ntnic: add registers and FPGA model for NapaTech NIC Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 10/21] net/ntnic: add FPGA modules for initialization Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 11/21] net/ntnic: add FPGA initialization functionality Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 12/21] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 13/21] net/ntnic: add startup and reset sequence for NT200A0X Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 14/21] net/ntnic: add clock profile for the NT200A0X smartNIC Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 15/21] net/ntnic: add link management skeleton Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 16/21] net/ntnic: add link 100G module ops Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 17/21] net/ntnic: add generic NIM and I2C modules Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 18/21] net/ntnic: add QSFP support Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 19/21] net/ntnic: add QSFP28 support Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 20/21] net/ntnic: add GPIO communication for NIMs Serhii Iliushyk
2024-07-12  9:48   ` [PATCH v7 21/21] net/ntnic: add physical layer control module Serhii Iliushyk
2024-07-12 13:54   ` [PATCH v7 01/21] net/ntnic: add ethdev and makes PMD available Patrick Robb
2024-07-13  2:45     ` zhoumin
2024-07-15 15:39       ` Patrick Robb
2024-07-16  2:36         ` zhoumin
2024-07-17 13:44           ` Patrick Robb
2024-07-19  7:54             ` Ferruh Yigit
2024-07-12 15:47 ` [PATCH v8 " Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 02/21] net/ntnic: add logging implementation Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 03/21] net/ntnic: add minimal initialization for PCI device Serhii Iliushyk
2024-07-13  0:16     ` Ferruh Yigit
2024-07-12 15:47   ` [PATCH v8 04/21] net/ntnic: add NT utilities implementation Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 05/21] net/ntnic: add VFIO module Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 06/21] net/ntnic: add basic eth dev ops to ntnic Serhii Iliushyk
2024-07-13  0:17     ` Ferruh Yigit
2024-07-12 15:47   ` [PATCH v8 07/21] net/ntnic: add core platform structures Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 08/21] net/ntnic: add adapter initialization Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 09/21] net/ntnic: add registers and FPGA model for NapaTech NIC Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 10/21] net/ntnic: add FPGA modules for initialization Serhii Iliushyk
2024-07-13  0:18     ` Ferruh Yigit
2024-07-12 15:47   ` [PATCH v8 11/21] net/ntnic: add FPGA initialization functionality Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 12/21] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 13/21] net/ntnic: add startup and reset sequence for NT200A0X Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 14/21] net/ntnic: add clock profile for the NT200A0X smartNIC Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 15/21] net/ntnic: add link management skeleton Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 16/21] net/ntnic: add link 100G module ops Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 17/21] net/ntnic: add generic NIM and I2C modules Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 18/21] net/ntnic: add QSFP support Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 19/21] net/ntnic: add QSFP28 support Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 20/21] net/ntnic: add GPIO communication for NIMs Serhii Iliushyk
2024-07-12 15:47   ` [PATCH v8 21/21] net/ntnic: add physical layer control module Serhii Iliushyk
2024-07-13  0:15   ` [PATCH v8 01/21] net/ntnic: add ethdev and makes PMD available Ferruh Yigit
2024-07-13  0:21   ` Ferruh Yigit
2024-07-16 12:01 ` [PATCH v9 " Serhii Iliushyk
2024-07-16 12:01   ` [PATCH v9 02/21] net/ntnic: add logging implementation Serhii Iliushyk
2024-07-16 12:01   ` [PATCH v9 03/21] net/ntnic: add minimal initialization for PCI device Serhii Iliushyk
2024-07-16 12:01   ` [PATCH v9 04/21] net/ntnic: add NT utilities implementation Serhii Iliushyk
2024-07-16 12:01   ` [PATCH v9 05/21] net/ntnic: add VFIO module Serhii Iliushyk
2024-07-16 12:01   ` [PATCH v9 06/21] net/ntnic: add basic eth dev ops to ntnic Serhii Iliushyk
2024-07-16 12:01   ` [PATCH v9 07/21] net/ntnic: add core platform structures Serhii Iliushyk
2024-07-16 12:01   ` [PATCH v9 08/21] net/ntnic: add adapter initialization Serhii Iliushyk
2024-07-16 12:01   ` [PATCH v9 09/21] net/ntnic: add registers and FPGA model for NapaTech NIC Serhii Iliushyk
2024-07-16 17:33     ` Ferruh Yigit
2024-07-16 12:01   ` [PATCH v9 10/21] net/ntnic: add FPGA modules for initialization Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 11/21] net/ntnic: add FPGA initialization functionality Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 12/21] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 13/21] net/ntnic: add startup and reset sequence for NT200A0X Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 14/21] net/ntnic: add clock profile for the NT200A0X smartNIC Serhii Iliushyk
2024-07-16 17:33     ` Ferruh Yigit
2024-07-16 12:02   ` [PATCH v9 15/21] net/ntnic: add link management skeleton Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 16/21] net/ntnic: add link 100G module ops Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 17/21] net/ntnic: add generic NIM and I2C modules Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 18/21] net/ntnic: add QSFP support Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 19/21] net/ntnic: add QSFP28 support Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 20/21] net/ntnic: add GPIO communication for NIMs Serhii Iliushyk
2024-07-16 12:02   ` [PATCH v9 21/21] net/ntnic: add physical layer control module Serhii Iliushyk
2024-07-16 17:33     ` Ferruh Yigit
2024-07-16 17:33   ` [PATCH v9 01/21] net/ntnic: add ethdev and makes PMD available Ferruh Yigit
2024-07-17 13:32 ` [PATCH v10 " Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 02/21] net/ntnic: add logging implementation Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 03/21] net/ntnic: add minimal initialization for PCI device Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 04/21] net/ntnic: add utilities implementation Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 05/21] net/ntnic: add VFIO module Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 06/21] net/ntnic: add basic eth dev ops Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 07/21] net/ntnic: add core platform structures Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 08/21] net/ntnic: add adapter initialization Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 09/21] net/ntnic: add registers and FPGA model Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 10/21] net/ntnic: add FPGA modules for initialization Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 11/21] net/ntnic: add FPGA initialization functionality Serhii Iliushyk
2024-07-17 13:32   ` [PATCH v10 12/21] net/ntnic: add support of the NT200A0X smartNIC Serhii Iliushyk
2024-07-17 13:33   ` [PATCH v10 13/21] net/ntnic: add startup and reset sequence for NT200A0X Serhii Iliushyk
2024-07-17 13:33   ` [PATCH v10 14/21] net/ntnic: add clock profile for the NT200A0X smartNIC Serhii Iliushyk
2024-07-17 13:33   ` [PATCH v10 15/21] net/ntnic: add link management skeleton Serhii Iliushyk
2024-07-18 21:42     ` Ferruh Yigit
2024-07-17 13:33   ` [PATCH v10 16/21] net/ntnic: add link 100G module ops Serhii Iliushyk
2024-07-17 13:33   ` [PATCH v10 17/21] net/ntnic: add generic NIM and I2C modules Serhii Iliushyk
2024-07-17 13:33   ` [PATCH v10 18/21] net/ntnic: add QSFP support Serhii Iliushyk
2024-07-17 13:33   ` [PATCH v10 19/21] net/ntnic: add QSFP28 support Serhii Iliushyk
2024-07-17 13:33   ` [PATCH v10 20/21] net/ntnic: add GPIO communication for NIMs Serhii Iliushyk
2024-07-17 13:33   ` [PATCH v10 21/21] net/ntnic: add physical layer control module Serhii Iliushyk
2024-07-18 21:43   ` [PATCH v10 01/21] net/ntnic: add ethdev and makes PMD available Ferruh Yigit
2024-07-23  7:49     ` Ferruh Yigit
2024-07-23  9:32       ` Thomas Monjalon

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