From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D5B0944119; Fri, 31 May 2024 05:51:42 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D5BF340A87; Fri, 31 May 2024 05:51:37 +0200 (CEST) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2083.outbound.protection.outlook.com [40.107.94.83]) by mails.dpdk.org (Postfix) with ESMTP id EA54C4027C for ; Fri, 31 May 2024 05:51:15 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=B/PF9rPVGbdjLnbtC4fGbhRmeW7q58jQvR6E9em9NYPf/1OzrOqp4vWc2apQwBXnHyl1YAvnhjfKOaCBc43Y9Ed06m4qYRdNZoiuQ7qBImlFfWpfFY0uEYeiaiSo9tFCZlFUal4i6u//IqvRyhlM5BRwt/wEkLtxyztD/tfDtsAg10WI8Hq2vXQao7P6Prn1nJ9xqSXpaxJuuvVhC1JdOZMdXiDOaBIzFg6IzT5suUc7JTl18WImKkliHCHGZp6v5GBSphuU13ipNmonbEWCgvo7rkUHW+/V5nQ1bE5Btg9Lqf/W7EBfEU1HU8AVRel+NDm8Ge5KTs9LLVQ5rw1lFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=KhXKNbzVrtE39905ZYICCeWnGRlWTG2KnIGWIbQwFBg=; b=W4CHaD+jDQGZFVRc7zHbxQzmpLpzDcXCweYeL/IU0ddqbmepH+2zI1Xw+kKOf2/CflypJU8QCZftFYWQRi/z02r0xSj3w3eHKa1cWjebVand83tCqS9yuUgKksyUbgtt1LwrZRLcGxj03/QOwWyzBNiaxb18GWwWS/QQVwqTInxRh4xO6L8j7j08E6AXRjHl11f+rLOQgP0ro42Bk8TqJLxNw5frxUK7vlSc7FU4yrl5otsGOCs9MfXtNb3pA9Otns5fnOeJ6ax4c9h7eXs2ZRiwB/Zg0smAntRecjJm5brV5smsIXxakSlG6txMd3YbOx147rvZ9Qe3Pyudnd3OgQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KhXKNbzVrtE39905ZYICCeWnGRlWTG2KnIGWIbQwFBg=; b=ceC95S99JDtUeQ0HwldMzF8xGtqhktRM7rWebdejpbegHnsCWGB4hk5C5s44l6G7AT/2ZPOqFp28mAfqpzaOjwbEgAp9lHhVkm9r8kW6DUkBhxFBdB6qMqrw7ihEyPwvYKHwLi9t4CpccvjkAQCZhyH/VbYnB09DMi/+CHzXt91HCISWyDyNReMkke9eHdMRf5WvG6beAPBdkwNiS1WxH0v9iVo5apI1NgrJVpK2kuCEkzysd92FtThpfmJtitgSzao9iLAJCbA3ijHMl7uGaV2TUV3O5Wj0gx5MP4J6BIJenK5xon/hbn9pw0kl9DsFbh7ShaNn3moADs+DuGEXxw== Received: from BL1PR13CA0425.namprd13.prod.outlook.com (2603:10b6:208:2c3::10) by CY5PR12MB6624.namprd12.prod.outlook.com (2603:10b6:930:40::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7611.30; Fri, 31 May 2024 03:51:13 +0000 Received: from BL6PEPF0001AB72.namprd02.prod.outlook.com (2603:10b6:208:2c3:cafe::ee) by BL1PR13CA0425.outlook.office365.com (2603:10b6:208:2c3::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7633.18 via Frontend Transport; Fri, 31 May 2024 03:51:12 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BL6PEPF0001AB72.mail.protection.outlook.com (10.167.242.165) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7633.15 via Frontend Transport; Fri, 31 May 2024 03:51:12 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 30 May 2024 20:50:59 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 30 May 2024 20:50:57 -0700 From: Suanming Mou To: Dariusz Sosnowski , Viacheslav Ovsiienko , Ori Kam , Matan Azrad CC: , Subject: [PATCH 2/3] net/mlx5: rename external Rx queue to external queue Date: Fri, 31 May 2024 11:50:33 +0800 Message-ID: <20240531035034.1731943-2-suanmingm@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240531035034.1731943-1-suanmingm@nvidia.com> References: <20240531035034.1731943-1-suanmingm@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB72:EE_|CY5PR12MB6624:EE_ X-MS-Office365-Filtering-Correlation-Id: a57c7be0-d8e8-4bb6-96ef-08dc8124ea17 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230031|82310400017|376005|1800799015|36860700004; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?6s+Cq39V3RVH66E7nYKKJEKBm6mP4Jvt2Wbf/g95wjrQZub2g7TSc98oVmqa?= =?us-ascii?Q?dvKEeADuTS5icf6DOhBQw3gqU9wywto1hRZ4gYN7CS6a4UxC3ZvSVcduK5vi?= =?us-ascii?Q?lWV9vNilKkcbGuU1h93sROJTvl29BvkQCmdpZjXZMUoePT/xLoD0OEzUd3Ye?= =?us-ascii?Q?aIax33wxffEQLPwb6Vhrw7ek2NhfebmYLm7F9150SG53bt6j5pVnIg5GN/n8?= =?us-ascii?Q?0xdZpdCH8N6RghWHr/rn8FE1Gb11E7wHBbch+ww6KXYTDak0J9TeAk5gVWCo?= =?us-ascii?Q?cMd7/NtNNxdROl67fPsXJfAszoviec1kbb/x+RFulsh0+iEn/ErbQ+bVuF70?= =?us-ascii?Q?OmoU7Dy7fF7aW4MeL1sQOHH6lugyB2qGYXdH/YS2r0qSZuQLw6vxF2xw3BdU?= =?us-ascii?Q?lLCnp0HgLNZfd/Nm8bbC7l0NziPPQ1IMfLK4M/8xYh92Ou6xDV9UlyrUCJZE?= =?us-ascii?Q?7J/nzY3fMCZ9ygqqa8ze6Jsxm98AckqiAiJqT1YuzNHGrQ7QVUdeRSmpSig1?= =?us-ascii?Q?rhzA7zt2t9GUz6bOaBFpIqz0Nh/13R7GsBaudwNReBrTNfwJl5uFlYAOqdpe?= =?us-ascii?Q?GJ0ef/ESpoE5ar0Di0MabHyst/9sPdt81ZduGfJgynQF60RkxA96HRDX4Ch1?= =?us-ascii?Q?URtmAby61AN5Mxa+Yg6AKxhDm6q1WppePVBTWcGHYx6ce3h1UdKOSAVZyIb/?= =?us-ascii?Q?gmXqCn9rLq4+0Hh6uvrhJ7CFXtobEM/zLYqDC7lFKKFVA0bwSQyovArRF9w1?= =?us-ascii?Q?ErTgeutPxjDpZGXB5dAeX7Fcyp3bNr3wXNBsVao22ITbHyFl9uxSBsJrQCb0?= =?us-ascii?Q?Rg9rwo1yiA1jrVJ/spenmLqZo1NbUySuqwLjCimLJYjT2+lPkrpA9KWQpbtx?= =?us-ascii?Q?hZnpkfGmlNUsDdtb8+G060NITLOs+hr4UG6gO7+eGRh24LQelSZqFFLSyGVB?= =?us-ascii?Q?DE5AL6Uf6DNno4piATKJrMQGd9kguUCen41EAqYRtN9Vld8SHEmW2AZ6ZWbr?= =?us-ascii?Q?qIlTkpBnFfWPRJSfWvn33Km7bKCGvaN8PnMINe5iOOhWwrGmnHm4KFzKcKt3?= =?us-ascii?Q?Rc4fMOrz8wUQyd66CHbDuQBaiW4IlWlNLlhFTyiPxYnNtP46CKfmSmdH3ZOv?= =?us-ascii?Q?xJlcZsi2sLh7WkJ/SGcmNFTHRehSKmt10EVeY5vkjWW+rxACPkXLIqOCtUuK?= =?us-ascii?Q?8nI4TrxD78H9sGSsba8WB7EI3WETNgIT3z5yYKhu1vF3oyLzzOUlTOEdHgno?= =?us-ascii?Q?QN4GhQZ2GVI80v1mrqw5R9a+59ozdR779BMRtclPiwCBGJ1fQySkcqFX9/rP?= =?us-ascii?Q?McodmROsqKcxVrdBAEK6mAklvAblT1VGGXg6HfWRy0O4XVkJEkjoL+JMtBdF?= =?us-ascii?Q?WXSyFCE=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230031)(82310400017)(376005)(1800799015)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 May 2024 03:51:12.3956 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a57c7be0-d8e8-4bb6-96ef-08dc8124ea17 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB72.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6624 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Due to external Tx queue will be supported, in order to reuse the external queue struct, rename the current external Rx queue to external queue. Signed-off-by: Suanming Mou --- drivers/net/mlx5/linux/mlx5_os.c | 2 +- drivers/net/mlx5/mlx5.h | 2 +- drivers/net/mlx5/mlx5_devx.c | 2 +- drivers/net/mlx5/mlx5_rx.h | 8 ++++---- drivers/net/mlx5/mlx5_rxq.c | 16 ++++++++-------- 5 files changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 6dd12f0f68..8cfbc25430 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -1216,7 +1216,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, */ if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, - sizeof(struct mlx5_external_rxq) * + sizeof(struct mlx5_external_q) * MLX5_MAX_EXT_RX_QUEUES, 0, SOCKET_ID_ANY); if (priv->ext_rxqs == NULL) { diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 9e4a5feb49..07d050b225 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -1882,7 +1882,7 @@ struct mlx5_priv { /* RX/TX queues. */ unsigned int rxqs_n; /* RX queues array size. */ unsigned int txqs_n; /* TX queues array size. */ - struct mlx5_external_rxq *ext_rxqs; /* External RX queues array. */ + struct mlx5_external_q *ext_rxqs; /* External RX queues array. */ struct mlx5_rxq_priv *(*rxq_privs)[]; /* RX queue non-shared data. */ struct mlx5_txq_data *(*txqs)[]; /* TX queues. */ struct rte_mempool *mprq_mp; /* Mempool for Multi-Packet RQ. */ diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index 9fa400fc48..cae9d578ab 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -673,7 +673,7 @@ mlx5_devx_ind_table_create_rqt_attr(struct rte_eth_dev *dev, } for (i = 0; i != queues_n; ++i) { if (mlx5_is_external_rxq(dev, queues[i])) { - struct mlx5_external_rxq *ext_rxq = + struct mlx5_external_q *ext_rxq = mlx5_ext_rxq_get(dev, queues[i]); rqt_attr->rq_list[i] = ext_rxq->hw_id; diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h index d008e4dd3a..decb14e708 100644 --- a/drivers/net/mlx5/mlx5_rx.h +++ b/drivers/net/mlx5/mlx5_rx.h @@ -186,7 +186,7 @@ struct mlx5_rxq_priv { }; /* External RX queue descriptor. */ -struct mlx5_external_rxq { +struct mlx5_external_q { uint32_t hw_id; /* Queue index in the Hardware. */ RTE_ATOMIC(uint32_t) refcnt; /* Reference counter. */ }; @@ -227,10 +227,10 @@ uint32_t mlx5_rxq_deref(struct rte_eth_dev *dev, uint16_t idx); struct mlx5_rxq_priv *mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx); struct mlx5_rxq_ctrl *mlx5_rxq_ctrl_get(struct rte_eth_dev *dev, uint16_t idx); struct mlx5_rxq_data *mlx5_rxq_data_get(struct rte_eth_dev *dev, uint16_t idx); -struct mlx5_external_rxq *mlx5_ext_rxq_ref(struct rte_eth_dev *dev, +struct mlx5_external_q *mlx5_ext_rxq_ref(struct rte_eth_dev *dev, uint16_t idx); uint32_t mlx5_ext_rxq_deref(struct rte_eth_dev *dev, uint16_t idx); -struct mlx5_external_rxq *mlx5_ext_rxq_get(struct rte_eth_dev *dev, +struct mlx5_external_q *mlx5_ext_rxq_get(struct rte_eth_dev *dev, uint16_t idx); int mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx); int mlx5_rxq_verify(struct rte_eth_dev *dev); @@ -661,7 +661,7 @@ static __rte_always_inline bool mlx5_is_external_rxq(struct rte_eth_dev *dev, uint16_t queue_idx) { struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_external_rxq *rxq; + struct mlx5_external_q *rxq; if (!priv->ext_rxqs || queue_idx < RTE_PMD_MLX5_EXTERNAL_RX_QUEUE_ID_MIN) return false; diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index f67aaa6178..d6c84b84e4 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -2133,10 +2133,10 @@ mlx5_rxq_data_get(struct rte_eth_dev *dev, uint16_t idx) * @return * A pointer to the queue if it exists, NULL otherwise. */ -struct mlx5_external_rxq * +struct mlx5_external_q * mlx5_ext_rxq_ref(struct rte_eth_dev *dev, uint16_t idx) { - struct mlx5_external_rxq *rxq = mlx5_ext_rxq_get(dev, idx); + struct mlx5_external_q *rxq = mlx5_ext_rxq_get(dev, idx); rte_atomic_fetch_add_explicit(&rxq->refcnt, 1, rte_memory_order_relaxed); return rxq; @@ -2156,7 +2156,7 @@ mlx5_ext_rxq_ref(struct rte_eth_dev *dev, uint16_t idx) uint32_t mlx5_ext_rxq_deref(struct rte_eth_dev *dev, uint16_t idx) { - struct mlx5_external_rxq *rxq = mlx5_ext_rxq_get(dev, idx); + struct mlx5_external_q *rxq = mlx5_ext_rxq_get(dev, idx); return rte_atomic_fetch_sub_explicit(&rxq->refcnt, 1, rte_memory_order_relaxed) - 1; } @@ -2172,7 +2172,7 @@ mlx5_ext_rxq_deref(struct rte_eth_dev *dev, uint16_t idx) * @return * A pointer to the queue if it exists, NULL otherwise. */ -struct mlx5_external_rxq * +struct mlx5_external_q * mlx5_ext_rxq_get(struct rte_eth_dev *dev, uint16_t idx) { struct mlx5_priv *priv = dev->data->dev_private; @@ -2336,7 +2336,7 @@ int mlx5_ext_rxq_verify(struct rte_eth_dev *dev) { struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_external_rxq *rxq; + struct mlx5_external_q *rxq; uint32_t i; int ret = 0; @@ -3206,7 +3206,7 @@ mlx5_rxq_timestamp_set(struct rte_eth_dev *dev) * Pointer to concurrent external RxQ on success, * NULL otherwise and rte_errno is set. */ -static struct mlx5_external_rxq * +static struct mlx5_external_q * mlx5_external_rx_queue_get_validate(uint16_t port_id, uint16_t dpdk_idx) { struct rte_eth_dev *dev; @@ -3252,7 +3252,7 @@ int rte_pmd_mlx5_external_rx_queue_id_map(uint16_t port_id, uint16_t dpdk_idx, uint32_t hw_idx) { - struct mlx5_external_rxq *ext_rxq; + struct mlx5_external_q *ext_rxq; uint32_t unmapped = 0; ext_rxq = mlx5_external_rx_queue_get_validate(port_id, dpdk_idx); @@ -3284,7 +3284,7 @@ rte_pmd_mlx5_external_rx_queue_id_map(uint16_t port_id, uint16_t dpdk_idx, int rte_pmd_mlx5_external_rx_queue_id_unmap(uint16_t port_id, uint16_t dpdk_idx) { - struct mlx5_external_rxq *ext_rxq; + struct mlx5_external_q *ext_rxq; uint32_t mapped = 1; ext_rxq = mlx5_external_rx_queue_get_validate(port_id, dpdk_idx); -- 2.34.1