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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230031)(36860700004)(82310400017)(376005)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2024 06:01:27.4631 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5492ad49-3909-4416-9a4e-08dc82c97108 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017097.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7902 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org PMD activates HWS template API context during port configuration. There was no validation that the HWS context was activated before the PMD tried to process other template function calls. The patch adds HWS context validation. Fixes: b401400db24e ("net/mlx5: add port flow configuration") Signed-off-by: Gregory Etelson Acked-by: Dariusz Sosnowski --- drivers/net/mlx5/mlx5_flow_hw.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 68c5a36bbb..427d7f2359 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -206,6 +206,20 @@ mlx5_destroy_multi_pattern_segment(struct mlx5_multi_pattern_segment *segment); static __rte_always_inline enum mlx5_indirect_list_type flow_hw_inlist_type_get(const struct rte_flow_action *actions); +static bool +mlx5_hw_ctx_validate(const struct rte_eth_dev *dev, struct rte_flow_error *error) +{ + const struct mlx5_priv *priv = dev->data->dev_private; + + if (!priv->dr_ctx) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, + "non-template flow engine was not configured"); + return false; + } + return true; +} + static __rte_always_inline int mlx5_multi_pattern_reformat_to_index(enum mlx5dr_action_type type) { @@ -6384,6 +6398,8 @@ mlx5_flow_hw_actions_validate(struct rte_eth_dev *dev, int ret; const struct rte_flow_action_ipv6_ext_remove *remove_data; + if (!mlx5_hw_ctx_validate(dev, error)) + return -rte_errno; /* FDB actions are only valid to proxy port. */ if (attr->transfer && (!priv->sh->config.dv_esw_en || !priv->master)) return rte_flow_error_set(error, EINVAL, @@ -7508,6 +7524,8 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev, uint32_t tag_bitmap = 0; int ret; + if (!mlx5_hw_ctx_validate(dev, error)) + return -rte_errno; if (!attr->ingress && !attr->egress && !attr->transfer) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ATTR, NULL, "at least one of the direction attributes" @@ -11229,6 +11247,8 @@ flow_hw_action_handle_create(struct rte_eth_dev *dev, uint32_t queue, bool aso = false; bool force_job = action->type == RTE_FLOW_ACTION_TYPE_METER_MARK; + if (!mlx5_hw_ctx_validate(dev, error)) + return NULL; if (attr || force_job) { job = flow_hw_action_job_init(priv, queue, NULL, user_data, NULL, MLX5_HW_Q_JOB_TYPE_CREATE, @@ -12511,6 +12531,8 @@ flow_hw_async_action_list_handle_create(struct rte_eth_dev *dev, uint32_t queue, } }; + if (!mlx5_hw_ctx_validate(dev, error)) + return NULL; if (!actions) { rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, NULL, "No action list"); -- 2.43.0