From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AFEF44414E; Tue, 4 Jun 2024 10:50:43 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4B2BD435A4; Tue, 4 Jun 2024 10:49:10 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) by mails.dpdk.org (Postfix) with ESMTP id 4E5AF43599 for ; Tue, 4 Jun 2024 10:49:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717490948; x=1749026948; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LN35K37FMpD5FvhLAlmiGEfNxwKXIhRTQEGypghfkCU=; b=O3ZwFfl+ur+ks2J5CzUnFy1Xaz4JZjYchbe/w6Nl4Yq805C8BFhEskSn CsnftzJKYsCLNrCY0DZLxYp/dzi7onrUOTP5wAna4VMs00LKlM2ilPYC9 Hp0ACG6v+lfWYrPwYI2FWKbZL3rPBzrG2MIf+buJmXybrVZk7qTozG49t IlY3QDFaKT4+Zw67eJXpdcDl3V+Bv3/ToRama8cdDjW/Jy4fBW1ZEeLQA 6UWA12hpFP7GA9pkiFAe031dbvw61FFlvl0gwlnApuDp/rHwLdAZ9od2O bXRlTBPZiW8iUc491A1YsJKXQzsRfY0R8dUEMzsjTS/uguK9QwKbp2JWA A==; X-CSE-ConnectionGUID: kyCSnWb8QvmXvLjCrZ2CRg== X-CSE-MsgGUID: TQQ+k/KYTbabShBKFvAY7Q== X-IronPort-AV: E=McAfee;i="6600,9927,11092"; a="13971728" X-IronPort-AV: E=Sophos;i="6.08,213,1712646000"; d="scan'208";a="13971728" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jun 2024 01:49:07 -0700 X-CSE-ConnectionGUID: GR1cQFTURBCghzG1HTRlvw== X-CSE-MsgGUID: oFtQtID0Tm+seyg5L9Rwog== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,213,1712646000"; d="scan'208";a="42268718" Received: from unknown (HELO npf-hyd-clx-03..) ([10.145.170.182]) by orviesa004.jf.intel.com with ESMTP; 04 Jun 2024 01:49:05 -0700 From: Soumyadeep Hore To: bruce.richardson@intel.com, anatoly.burakov@intel.com Cc: dev@dpdk.org Subject: [PATCH v2 16/21] common/idpf: add wmb before tail Date: Tue, 4 Jun 2024 08:06:06 +0000 Message-ID: <20240604080611.2197835-17-soumyadeep.hore@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240604080611.2197835-1-soumyadeep.hore@intel.com> References: <20240528072839.867100-1-soumyadeep.hore@intel.com> <20240604080611.2197835-1-soumyadeep.hore@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Introduced through customer's feedback in their attempt to address some bugs this introduces a memory barrier before posting ctlq tail. This makes sure memory writes have a chance to take place before HW starts messing with the descriptors. Signed-off-by: Soumyadeep Hore --- drivers/common/idpf/base/idpf_controlq.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c index bd23e54421..ba2e328122 100644 --- a/drivers/common/idpf/base/idpf_controlq.c +++ b/drivers/common/idpf/base/idpf_controlq.c @@ -624,6 +624,8 @@ int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_ctlq_info *cq, /* Wrap to end of end ring since current ntp is 0 */ cq->next_to_post = cq->ring_size - 1; + idpf_wmb(); + wr32(hw, cq->reg.tail, cq->next_to_post); } -- 2.43.0