[PATCH v2 04/21] common/idpf: moved the idpf HW into API header file

[Soumyadeep Hore <soumyadeep.hore@intel.com>]

There is an issue of recursive header file includes in accessing the
idpf_hw structure. The controlq.h has the structure definition and osdep
header file needs that. The problem is the controlq.h also needs
the osdep header file contents, basically both dependent on each other.

Moving the definition from controlq.h into api.h resolves the problem.

Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
 drivers/common/idpf/base/idpf_common.c       |   4 +-
 drivers/common/idpf/base/idpf_controlq.h     | 107 +------------------
 drivers/common/idpf/base/idpf_controlq_api.h |  35 ++++++
 drivers/common/idpf/base/idpf_osdep.h        |  72 ++++++++++++-
 drivers/common/idpf/base/idpf_type.h         |   4 +-
 5 files changed, 111 insertions(+), 111 deletions(-)

diff --git a/drivers/common/idpf/base/idpf_common.c b/drivers/common/idpf/base/idpf_common.c
index 7181a7f14c..bb540345c2 100644
--- a/drivers/common/idpf/base/idpf_common.c
+++ b/drivers/common/idpf/base/idpf_common.c
@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2023 Intel Corporation
+ * Copyright(c) 2001-2024 Intel Corporation
  */
 
-#include "idpf_type.h"
 #include "idpf_prototype.h"
+#include "idpf_type.h"
 #include <virtchnl.h>
 
 
diff --git a/drivers/common/idpf/base/idpf_controlq.h b/drivers/common/idpf/base/idpf_controlq.h
index 80ca06e632..3f74b5a898 100644
--- a/drivers/common/idpf/base/idpf_controlq.h
+++ b/drivers/common/idpf/base/idpf_controlq.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2023 Intel Corporation
+ * Copyright(c) 2001-2024 Intel Corporation
  */
 
 #ifndef _IDPF_CONTROLQ_H_
@@ -96,111 +96,6 @@ struct idpf_mbxq_desc {
 	u32 pf_vf_id;		/* used by CP when sending to PF */
 };
 
-enum idpf_mac_type {
-	IDPF_MAC_UNKNOWN = 0,
-	IDPF_MAC_PF,
-	IDPF_MAC_VF,
-	IDPF_MAC_GENERIC
-};
-
-#define ETH_ALEN 6
-
-struct idpf_mac_info {
-	enum idpf_mac_type type;
-	u8 addr[ETH_ALEN];
-	u8 perm_addr[ETH_ALEN];
-};
-
-#define IDPF_AQ_LINK_UP 0x1
-
-/* PCI bus types */
-enum idpf_bus_type {
-	idpf_bus_type_unknown = 0,
-	idpf_bus_type_pci,
-	idpf_bus_type_pcix,
-	idpf_bus_type_pci_express,
-	idpf_bus_type_reserved
-};
-
-/* PCI bus speeds */
-enum idpf_bus_speed {
-	idpf_bus_speed_unknown	= 0,
-	idpf_bus_speed_33	= 33,
-	idpf_bus_speed_66	= 66,
-	idpf_bus_speed_100	= 100,
-	idpf_bus_speed_120	= 120,
-	idpf_bus_speed_133	= 133,
-	idpf_bus_speed_2500	= 2500,
-	idpf_bus_speed_5000	= 5000,
-	idpf_bus_speed_8000	= 8000,
-	idpf_bus_speed_reserved
-};
-
-/* PCI bus widths */
-enum idpf_bus_width {
-	idpf_bus_width_unknown	= 0,
-	idpf_bus_width_pcie_x1	= 1,
-	idpf_bus_width_pcie_x2	= 2,
-	idpf_bus_width_pcie_x4	= 4,
-	idpf_bus_width_pcie_x8	= 8,
-	idpf_bus_width_32	= 32,
-	idpf_bus_width_64	= 64,
-	idpf_bus_width_reserved
-};
-
-/* Bus parameters */
-struct idpf_bus_info {
-	enum idpf_bus_speed speed;
-	enum idpf_bus_width width;
-	enum idpf_bus_type type;
-
-	u16 func;
-	u16 device;
-	u16 lan_id;
-	u16 bus_id;
-};
-
-/* Function specific capabilities */
-struct idpf_hw_func_caps {
-	u32 num_alloc_vfs;
-	u32 vf_base_id;
-};
-
-/* Define the APF hardware struct to replace other control structs as needed
- * Align to ctlq_hw_info
- */
-struct idpf_hw {
-	/* Some part of BAR0 address space is not mapped by the LAN driver.
-	 * This results in 2 regions of BAR0 to be mapped by LAN driver which
-	 * will have its own base hardware address when mapped.
-	 */
-	u8 *hw_addr;
-	u8 *hw_addr_region2;
-	u64 hw_addr_len;
-	u64 hw_addr_region2_len;
-
-	void *back;
-
-	/* control queue - send and receive */
-	struct idpf_ctlq_info *asq;
-	struct idpf_ctlq_info *arq;
-
-	/* subsystem structs */
-	struct idpf_mac_info mac;
-	struct idpf_bus_info bus;
-	struct idpf_hw_func_caps func_caps;
-
-	/* pci info */
-	u16 device_id;
-	u16 vendor_id;
-	u16 subsystem_device_id;
-	u16 subsystem_vendor_id;
-	u8 revision_id;
-	bool adapter_stopped;
-
-	LIST_HEAD_TYPE(list_head, idpf_ctlq_info) cq_list_head;
-};
-
 int idpf_ctlq_alloc_ring_res(struct idpf_hw *hw,
 			     struct idpf_ctlq_info *cq);
 
diff --git a/drivers/common/idpf/base/idpf_controlq_api.h b/drivers/common/idpf/base/idpf_controlq_api.h
index 6b6f3e84c2..f3a397ea58 100644
--- a/drivers/common/idpf/base/idpf_controlq_api.h
+++ b/drivers/common/idpf/base/idpf_controlq_api.h
@@ -154,6 +154,41 @@ enum idpf_mbx_opc {
 	idpf_mbq_opc_send_msg_to_peer_drv	= 0x0804,
 };
 
+/* Define the APF hardware struct to replace other control structs as needed
+ * Align to ctlq_hw_info
+ */
+struct idpf_hw {
+	/* Some part of BAR0 address space is not mapped by the LAN driver.
+	 * This results in 2 regions of BAR0 to be mapped by LAN driver which
+	 * will have its own base hardware address when mapped.
+	 */
+	u8 *hw_addr;
+	u8 *hw_addr_region2;
+	u64 hw_addr_len;
+	u64 hw_addr_region2_len;
+
+	void *back;
+
+	/* control queue - send and receive */
+	struct idpf_ctlq_info *asq;
+	struct idpf_ctlq_info *arq;
+
+	/* subsystem structs */
+	struct idpf_mac_info mac;
+	struct idpf_bus_info bus;
+	struct idpf_hw_func_caps func_caps;
+
+	/* pci info */
+	u16 device_id;
+	u16 vendor_id;
+	u16 subsystem_device_id;
+	u16 subsystem_vendor_id;
+	u8 revision_id;
+	bool adapter_stopped;
+
+	LIST_HEAD_TYPE(list_head, idpf_ctlq_info) cq_list_head;
+};
+
 /* API supported for control queue management */
 /* Will init all required q including default mb.  "q_info" is an array of
  * create_info structs equal to the number of control queues to be created.
diff --git a/drivers/common/idpf/base/idpf_osdep.h b/drivers/common/idpf/base/idpf_osdep.h
index 74a376cb13..b2af8f443d 100644
--- a/drivers/common/idpf/base/idpf_osdep.h
+++ b/drivers/common/idpf/base/idpf_osdep.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2023 Intel Corporation
+ * Copyright(c) 2001-2024 Intel Corporation
  */
 
 #ifndef _IDPF_OSDEP_H_
@@ -353,4 +353,74 @@ idpf_hweight32(u32 num)
 
 #endif
 
+enum idpf_mac_type {
+	IDPF_MAC_UNKNOWN = 0,
+	IDPF_MAC_PF,
+	IDPF_MAC_VF,
+	IDPF_MAC_GENERIC
+};
+
+#define ETH_ALEN 6
+
+struct idpf_mac_info {
+	enum idpf_mac_type type;
+	u8 addr[ETH_ALEN];
+	u8 perm_addr[ETH_ALEN];
+};
+
+#define IDPF_AQ_LINK_UP 0x1
+
+/* PCI bus types */
+enum idpf_bus_type {
+	idpf_bus_type_unknown = 0,
+	idpf_bus_type_pci,
+	idpf_bus_type_pcix,
+	idpf_bus_type_pci_express,
+	idpf_bus_type_reserved
+};
+
+/* PCI bus speeds */
+enum idpf_bus_speed {
+	idpf_bus_speed_unknown	= 0,
+	idpf_bus_speed_33	= 33,
+	idpf_bus_speed_66	= 66,
+	idpf_bus_speed_100	= 100,
+	idpf_bus_speed_120	= 120,
+	idpf_bus_speed_133	= 133,
+	idpf_bus_speed_2500	= 2500,
+	idpf_bus_speed_5000	= 5000,
+	idpf_bus_speed_8000	= 8000,
+	idpf_bus_speed_reserved
+};
+
+/* PCI bus widths */
+enum idpf_bus_width {
+	idpf_bus_width_unknown	= 0,
+	idpf_bus_width_pcie_x1	= 1,
+	idpf_bus_width_pcie_x2	= 2,
+	idpf_bus_width_pcie_x4	= 4,
+	idpf_bus_width_pcie_x8	= 8,
+	idpf_bus_width_32	= 32,
+	idpf_bus_width_64	= 64,
+	idpf_bus_width_reserved
+};
+
+/* Bus parameters */
+struct idpf_bus_info {
+	enum idpf_bus_speed speed;
+	enum idpf_bus_width width;
+	enum idpf_bus_type type;
+
+	u16 func;
+	u16 device;
+	u16 lan_id;
+	u16 bus_id;
+};
+
+/* Function specific capabilities */
+struct idpf_hw_func_caps {
+	u32 num_alloc_vfs;
+	u32 vf_base_id;
+};
+
 #endif /* _IDPF_OSDEP_H_ */
diff --git a/drivers/common/idpf/base/idpf_type.h b/drivers/common/idpf/base/idpf_type.h
index a22d28f448..2ff818035b 100644
--- a/drivers/common/idpf/base/idpf_type.h
+++ b/drivers/common/idpf/base/idpf_type.h
@@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2023 Intel Corporation
+ * Copyright(c) 2001-2024 Intel Corporation
  */
 
 #ifndef _IDPF_TYPE_H_
 #define _IDPF_TYPE_H_
 
-#include "idpf_controlq.h"
+#include "idpf_osdep.h"
 
 #define UNREFERENCED_XPARAMETER
 #define UNREFERENCED_1PARAMETER(_p)
-- 
2.43.0