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From: Venkat Kumar Ande <venkatkumar.ande@amd.com>
To: <dev@dpdk.org>
Cc: <Selwin.Sebastian@amd.com>,
	Venkat Kumar Ande <VenkatKumar.Ande@amd.com>,
	 Selwin Sebastian <selwin.sebastian@amd.com>
Subject: [PATCH v3 20/25] net/axgbe: separate C22 and C45 transactions
Date: Tue, 4 Jun 2024 17:41:52 +0530	[thread overview]
Message-ID: <20240604121157.3052-20-venkatkumar.ande@amd.com> (raw)
In-Reply-To: <20240604121157.3052-1-venkatkumar.ande@amd.com>

From: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>

The xgbe MDIO bus driver can perform both C22 and C45 transfers, when
using its MDIO bus hardware. The SFP I2C mdio bus driver only supports
C22. Create separate functions for each and register the C45 versions
using the new API calls where appropriate.

Signed-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
Acked-by: Selwin Sebastian <selwin.sebastian@amd.com>
---
 drivers/net/axgbe/axgbe_dev.c      | 77 +++++++++++++++++++++++++-----
 drivers/net/axgbe/axgbe_ethdev.h   |  7 ++-
 drivers/net/axgbe/axgbe_phy_impl.c |  4 +-
 3 files changed, 71 insertions(+), 17 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_dev.c b/drivers/net/axgbe/axgbe_dev.c
index 6b413160c2..fa7324efa7 100644
--- a/drivers/net/axgbe/axgbe_dev.c
+++ b/drivers/net/axgbe/axgbe_dev.c
@@ -63,11 +63,20 @@ static int mdio_complete(struct axgbe_port *pdata)
 	return 0;
 }
 
-static unsigned int axgbe_create_mdio_sca(int port, int reg)
+static unsigned int axgbe_create_mdio_sca_c22(int port, int reg)
 {
-	unsigned int mdio_sca, da;
+	unsigned int mdio_sca;
 
-	da = (reg & MII_ADDR_C45) ? reg >> 16 : 0;
+	mdio_sca = 0;
+	AXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, RA, reg);
+	AXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, PA, port);
+
+	return mdio_sca;
+}
+
+static unsigned int axgbe_create_mdio_sca_c45(int port, unsigned int da, int reg)
+{
+	unsigned int mdio_sca;
 
 	mdio_sca = 0;
 	AXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, RA, reg);
@@ -77,13 +86,12 @@ static unsigned int axgbe_create_mdio_sca(int port, int reg)
 	return mdio_sca;
 }
 
-static int axgbe_write_ext_mii_regs(struct axgbe_port *pdata, int addr,
-				    int reg, u16 val)
+static int axgbe_write_ext_mii_regs(struct axgbe_port *pdata,
+						unsigned int mdio_sca, u16 val)
 {
-	unsigned int mdio_sca, mdio_sccd;
+	unsigned int mdio_sccd;
 	uint64_t timeout;
 
-	mdio_sca = axgbe_create_mdio_sca(addr, reg);
 	AXGMAC_IOWRITE(pdata, MAC_MDIOSCAR, mdio_sca);
 
 	mdio_sccd = 0;
@@ -103,13 +111,34 @@ static int axgbe_write_ext_mii_regs(struct axgbe_port *pdata, int addr,
 	return -ETIMEDOUT;
 }
 
-static int axgbe_read_ext_mii_regs(struct axgbe_port *pdata, int addr,
-				   int reg)
+
+static int axgbe_write_ext_mii_regs_c22(struct axgbe_port *pdata,
+							int addr, int reg, u16 val)
+{
+	unsigned int mdio_sca;
+
+	mdio_sca = axgbe_create_mdio_sca_c22(addr, reg);
+
+	return axgbe_write_ext_mii_regs(pdata, mdio_sca, val);
+}
+
+static int axgbe_write_ext_mii_regs_c45(struct axgbe_port *pdata,
+					int addr, int devad, int reg, u16 val)
 {
-	unsigned int mdio_sca, mdio_sccd;
+	unsigned int mdio_sca;
+
+	mdio_sca = axgbe_create_mdio_sca_c45(addr, devad, reg);
+
+	return axgbe_write_ext_mii_regs(pdata, mdio_sca, val);
+}
+
+
+static int axgbe_read_ext_mii_regs(struct axgbe_port *pdata,
+							unsigned int mdio_sca)
+{
+	unsigned int mdio_sccd;
 	uint64_t timeout;
 
-	mdio_sca = axgbe_create_mdio_sca(addr, reg);
 	AXGMAC_IOWRITE(pdata, MAC_MDIOSCAR, mdio_sca);
 
 	mdio_sccd = 0;
@@ -132,6 +161,25 @@ static int axgbe_read_ext_mii_regs(struct axgbe_port *pdata, int addr,
 	return AXGMAC_IOREAD_BITS(pdata, MAC_MDIOSCCDR, DATA);
 }
 
+static int axgbe_read_ext_mii_regs_c22(struct axgbe_port *pdata, int addr, int reg)
+{
+	unsigned int mdio_sca;
+
+	mdio_sca = axgbe_create_mdio_sca_c22(addr, reg);
+
+	return axgbe_read_ext_mii_regs(pdata, mdio_sca);
+}
+
+static int axgbe_read_ext_mii_regs_c45(struct axgbe_port *pdata, int addr,
+								int devad, int reg)
+{
+	unsigned int mdio_sca;
+
+	mdio_sca = axgbe_create_mdio_sca_c45(addr, devad, reg);
+
+	return axgbe_read_ext_mii_regs(pdata, mdio_sca);
+}
+
 static int axgbe_set_ext_mii_mode(struct axgbe_port *pdata, unsigned int port,
 				  enum axgbe_mdio_mode mode)
 {
@@ -1373,8 +1421,11 @@ void axgbe_init_function_ptrs_dev(struct axgbe_hw_if *hw_if)
 	hw_if->set_speed = axgbe_set_speed;
 
 	hw_if->set_ext_mii_mode = axgbe_set_ext_mii_mode;
-	hw_if->read_ext_mii_regs = axgbe_read_ext_mii_regs;
-	hw_if->write_ext_mii_regs = axgbe_write_ext_mii_regs;
+	hw_if->read_ext_mii_regs_c22 = axgbe_read_ext_mii_regs_c22;
+	hw_if->write_ext_mii_regs_c22 = axgbe_write_ext_mii_regs_c22;
+	hw_if->read_ext_mii_regs_c45 = axgbe_read_ext_mii_regs_c45;
+	hw_if->write_ext_mii_regs_c45 = axgbe_write_ext_mii_regs_c45;
+
 	/* For FLOW ctrl */
 	hw_if->config_tx_flow_control = axgbe_config_tx_flow_control;
 	hw_if->config_rx_flow_control = axgbe_config_rx_flow_control;
diff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h
index 4dcbf6d9a2..cb3df47a63 100644
--- a/drivers/net/axgbe/axgbe_ethdev.h
+++ b/drivers/net/axgbe/axgbe_ethdev.h
@@ -325,8 +325,11 @@ struct axgbe_hw_if {
 
 	int (*set_ext_mii_mode)(struct axgbe_port *, unsigned int,
 				enum axgbe_mdio_mode);
-	int (*read_ext_mii_regs)(struct axgbe_port *, int, int);
-	int (*write_ext_mii_regs)(struct axgbe_port *, int, int, uint16_t);
+	int (*read_ext_mii_regs_c22)(struct axgbe_port *pdata, int addr, int reg);
+	int (*write_ext_mii_regs_c22)(struct axgbe_port *pdata, int addr, int reg, uint16_t val);
+	int (*read_ext_mii_regs_c45)(struct axgbe_port *pdata, int addr, int devad, int reg);
+	int (*write_ext_mii_regs_c45)(struct axgbe_port *pdata, int addr, int devad,
+									int reg, uint16_t val);
 
 	/* For FLOW ctrl */
 	int (*config_tx_flow_control)(struct axgbe_port *);
diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c
index 5ba7217320..1f45e955c4 100644
--- a/drivers/net/axgbe/axgbe_phy_impl.c
+++ b/drivers/net/axgbe/axgbe_phy_impl.c
@@ -1148,8 +1148,8 @@ static int axgbe_phy_set_redrv_mode_mdio(struct axgbe_port *pdata,
 	redrv_reg = AXGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000);
 	redrv_val = (u16)mode;
 
-	return pdata->hw_if.write_ext_mii_regs(pdata, phy_data->redrv_addr,
-					       redrv_reg, redrv_val);
+	return pdata->hw_if.write_ext_mii_regs_c22(pdata,
+		phy_data->redrv_addr, redrv_reg, redrv_val);
 }
 
 static int axgbe_phy_set_redrv_mode_i2c(struct axgbe_port *pdata,
-- 
2.34.1


  parent reply	other threads:[~2024-06-04 12:14 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20240507124305.2318-1-VenkatKumar.Ande@amd.com>
2024-06-04 12:11 ` [PATCH v3 01/25] net/axgbe: fix mdio access for non-zero ports and CL45 PHYs Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 02/25] net/axgbe: reset link when the link never comes back Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 03/25] net/axgbe: fix fluctuations for 1G BELFUSE SFP Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 04/25] net/axgbe: update DMA coherency values Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 05/25] net/axgbe: disable interrupts during device removal Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 06/25] net/axgbe: yellow carp devices do not need rrc Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 07/25] net/axgbe: enable PLL control for fixed PHY modes only Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 08/25] net/axgbe: fix the SFP codes check for DAC cables Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 09/25] net/axgbe: fix logic around active and passive cables Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 10/25] net/axgbe: check only the minimum speed for cables Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 11/25] net/axgbe: flow Tx Ctrl Registers are h/w version dependent Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 12/25] net/axgbe: delay AN timeout during KR training Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 13/25] net/axgbe: fix the false linkup in axgbe PHY status Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 14/25] net/axgbe: remove use of comm owned field Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 15/25] net/axgbe: remove field of SFP diagnostic support Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 16/25] net/axgbe: improve SFP 100Mbps auto-negotiation Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 17/25] net/axgbe: remove unnecessary conversion to bool Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 18/25] net/axgbe: use definitions for mailbox commands Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 19/25] net/axgbe: add support for 10 Mbps speed Venkat Kumar Ande
2024-06-04 12:11   ` Venkat Kumar Ande [this message]
2024-06-04 12:11   ` [PATCH v3 21/25] net/axgbe: replace mii generic macro for c45 with AXGBE Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 22/25] net/axgbe: add 2.5GbE support to 10G BaseT mode Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 23/25] net/axgbe: add support for Rx adaptation Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 24/25] net/axgbe: extend 10Mbps support to MAC version 21H Venkat Kumar Ande
2024-06-04 12:11   ` [PATCH v3 25/25] net/axgbe: modify debug messages Venkat Kumar Ande
2024-06-05 17:07   ` [PATCH v3 01/25] net/axgbe: fix mdio access for non-zero ports and CL45 PHYs Ferruh Yigit

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