* [PATCH 01/19] net/txgbe: fix to parse tunnel packets
2024-06-17 9:53 [PATCH 00/19] Wangxun fixes and supports Jiawen Wu
@ 2024-06-17 9:53 ` Jiawen Wu
2024-06-17 9:53 ` [PATCH 02/19] net/txgbe: fix flow filters in VT mode Jiawen Wu
` (7 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Jiawen Wu @ 2024-06-17 9:53 UTC (permalink / raw)
To: dev; +Cc: Jiawen Wu, stable
The outer-ipv6 tunnel packet was parsed to the wrong packet type, remove
the default RTE_PTYPE_L2_ETHER and RTE_PTYPE_L3_IPV4 flags for tunnel
packets. And correct the calculation of tunnel length for GRE and GENEVE
packets.
Fixes: ca46fcd753b1 ("net/txgbe: support Tx with hardware offload")
Fixes: e5ece1f467aa ("net/txgbe: fix VXLAN-GPE packet checksum")
Fixes: 0e32d6edd479 ("net/txgbe: fix packet type to parse from offload flags")
Fixes: 5bbaf75ed6df ("net/txgbe: fix GRE tunnel packet checksum")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/txgbe/txgbe_rxtx.c | 69 ++++++++++++++++++----------------
1 file changed, 37 insertions(+), 32 deletions(-)
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 4b78e68a40..7731ad8491 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -586,26 +586,17 @@ tx_desc_ol_flags_to_ptype(uint64_t oflags)
switch (oflags & RTE_MBUF_F_TX_TUNNEL_MASK) {
case RTE_MBUF_F_TX_TUNNEL_VXLAN:
case RTE_MBUF_F_TX_TUNNEL_VXLAN_GPE:
- ptype |= RTE_PTYPE_L2_ETHER |
- RTE_PTYPE_L3_IPV4 |
- RTE_PTYPE_TUNNEL_GRENAT;
+ ptype |= RTE_PTYPE_TUNNEL_GRENAT;
break;
case RTE_MBUF_F_TX_TUNNEL_GRE:
- ptype |= RTE_PTYPE_L2_ETHER |
- RTE_PTYPE_L3_IPV4 |
- RTE_PTYPE_TUNNEL_GRE;
+ ptype |= RTE_PTYPE_TUNNEL_GRE;
break;
case RTE_MBUF_F_TX_TUNNEL_GENEVE:
- ptype |= RTE_PTYPE_L2_ETHER |
- RTE_PTYPE_L3_IPV4 |
- RTE_PTYPE_TUNNEL_GENEVE;
- ptype |= RTE_PTYPE_INNER_L2_ETHER;
+ ptype |= RTE_PTYPE_TUNNEL_GENEVE;
break;
case RTE_MBUF_F_TX_TUNNEL_IPIP:
case RTE_MBUF_F_TX_TUNNEL_IP:
- ptype |= RTE_PTYPE_L2_ETHER |
- RTE_PTYPE_L3_IPV4 |
- RTE_PTYPE_TUNNEL_IP;
+ ptype |= RTE_PTYPE_TUNNEL_IP;
break;
}
@@ -689,11 +680,20 @@ txgbe_xmit_cleanup(struct txgbe_tx_queue *txq)
return 0;
}
+#define GRE_CHECKSUM_PRESENT 0x8000
+#define GRE_KEY_PRESENT 0x2000
+#define GRE_SEQUENCE_PRESENT 0x1000
+#define GRE_EXT_LEN 4
+#define GRE_SUPPORTED_FIELDS (GRE_CHECKSUM_PRESENT | GRE_KEY_PRESENT |\
+ GRE_SEQUENCE_PRESENT)
+
static inline uint8_t
txgbe_get_tun_len(struct rte_mbuf *mbuf)
{
struct txgbe_genevehdr genevehdr;
const struct txgbe_genevehdr *gh;
+ const struct txgbe_grehdr *grh;
+ struct txgbe_grehdr grehdr;
uint8_t tun_len;
switch (mbuf->ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
@@ -706,11 +706,16 @@ txgbe_get_tun_len(struct rte_mbuf *mbuf)
+ sizeof(struct txgbe_vxlanhdr);
break;
case RTE_MBUF_F_TX_TUNNEL_GRE:
- tun_len = sizeof(struct txgbe_nvgrehdr);
+ tun_len = sizeof(struct txgbe_grehdr);
+ grh = rte_pktmbuf_read(mbuf,
+ mbuf->outer_l2_len + mbuf->outer_l3_len,
+ sizeof(grehdr), &grehdr);
+ if (grh->flags & rte_cpu_to_be_16(GRE_SUPPORTED_FIELDS))
+ tun_len += GRE_EXT_LEN;
break;
case RTE_MBUF_F_TX_TUNNEL_GENEVE:
- gh = rte_pktmbuf_read(mbuf,
- mbuf->outer_l2_len + mbuf->outer_l3_len,
+ gh = rte_pktmbuf_read(mbuf, mbuf->outer_l2_len +
+ mbuf->outer_l3_len + sizeof(struct txgbe_udphdr),
sizeof(genevehdr), &genevehdr);
tun_len = sizeof(struct txgbe_udphdr)
+ sizeof(struct txgbe_genevehdr)
@@ -724,27 +729,26 @@ txgbe_get_tun_len(struct rte_mbuf *mbuf)
}
static inline uint8_t
-txgbe_parse_tun_ptid(struct rte_mbuf *tx_pkt)
+txgbe_parse_tun_ptid(struct rte_mbuf *tx_pkt, uint8_t tun_len)
{
- uint64_t l2_vxlan, l2_vxlan_mac, l2_vxlan_mac_vlan;
- uint64_t l2_gre, l2_gre_mac, l2_gre_mac_vlan;
+ uint64_t inner_l2_len;
uint8_t ptid = 0;
- l2_vxlan = sizeof(struct txgbe_udphdr) + sizeof(struct txgbe_vxlanhdr);
- l2_vxlan_mac = l2_vxlan + sizeof(struct rte_ether_hdr);
- l2_vxlan_mac_vlan = l2_vxlan_mac + sizeof(struct rte_vlan_hdr);
+ inner_l2_len = tx_pkt->l2_len - tun_len;
- l2_gre = sizeof(struct txgbe_grehdr);
- l2_gre_mac = l2_gre + sizeof(struct rte_ether_hdr);
- l2_gre_mac_vlan = l2_gre_mac + sizeof(struct rte_vlan_hdr);
-
- if (tx_pkt->l2_len == l2_vxlan || tx_pkt->l2_len == l2_gre)
+ switch (inner_l2_len) {
+ case 0:
ptid = TXGBE_PTID_TUN_EIG;
- else if (tx_pkt->l2_len == l2_vxlan_mac || tx_pkt->l2_len == l2_gre_mac)
+ break;
+ case sizeof(struct rte_ether_hdr):
ptid = TXGBE_PTID_TUN_EIGM;
- else if (tx_pkt->l2_len == l2_vxlan_mac_vlan ||
- tx_pkt->l2_len == l2_gre_mac_vlan)
+ break;
+ case sizeof(struct rte_ether_hdr) + sizeof(struct rte_vlan_hdr):
ptid = TXGBE_PTID_TUN_EIGMV;
+ break;
+ default:
+ ptid = TXGBE_PTID_TUN_EI;
+ }
return ptid;
}
@@ -811,8 +815,6 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
tx_ol_req = ol_flags & TXGBE_TX_OFFLOAD_MASK;
if (tx_ol_req) {
tx_offload.ptid = tx_desc_ol_flags_to_ptid(tx_ol_req);
- if (tx_offload.ptid & TXGBE_PTID_PKT_TUN)
- tx_offload.ptid |= txgbe_parse_tun_ptid(tx_pkt);
tx_offload.l2_len = tx_pkt->l2_len;
tx_offload.l3_len = tx_pkt->l3_len;
tx_offload.l4_len = tx_pkt->l4_len;
@@ -821,6 +823,9 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
tx_offload.outer_l2_len = tx_pkt->outer_l2_len;
tx_offload.outer_l3_len = tx_pkt->outer_l3_len;
tx_offload.outer_tun_len = txgbe_get_tun_len(tx_pkt);
+ if (tx_offload.ptid & TXGBE_PTID_PKT_TUN)
+ tx_offload.ptid |= txgbe_parse_tun_ptid(tx_pkt,
+ tx_offload.outer_tun_len);
#ifdef RTE_LIB_SECURITY
if (use_ipsec) {
--
2.27.0
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 02/19] net/txgbe: fix flow filters in VT mode
2024-06-17 9:53 [PATCH 00/19] Wangxun fixes and supports Jiawen Wu
2024-06-17 9:53 ` [PATCH 01/19] net/txgbe: fix to parse tunnel packets Jiawen Wu
@ 2024-06-17 9:53 ` Jiawen Wu
2024-06-17 9:53 ` [PATCH 03/19] net/txgbe: fix Tx hang on queue disable Jiawen Wu
` (6 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Jiawen Wu @ 2024-06-17 9:53 UTC (permalink / raw)
To: dev; +Cc: Jiawen Wu, stable
In virtualization mode, target pool should be determined for the
filters. For ether type filter, virtualization mode must be enabled
to filter broadcast/multicast packets due to hardware limitations.
Fixes: f8e2cfc7702b ("net/txgbe: support ethertype filter add and delete")
Fixes: 77a72b4d9dc0 ("net/txgbe: support ntuple filter add and delete")
Fixes: 983a4ef2265b ("net/txgbe: support syn filter add and delete")
Fixes: 08d61139be0a ("net/txgbe: support flow director filter add and delete")
Fixes: 9fdfed08a5e3 ("net/txgbe: restore RSS filter")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/txgbe/txgbe_ethdev.c | 24 +++++++++++++++++++++---
drivers/net/txgbe/txgbe_fdir.c | 3 +++
drivers/net/txgbe/txgbe_rxtx.c | 8 +++++++-
3 files changed, 31 insertions(+), 4 deletions(-)
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 6d11412616..fa68a5d2ca 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -4011,6 +4011,7 @@ txgbe_syn_filter_set(struct rte_eth_dev *dev,
struct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(dev);
uint32_t syn_info;
uint32_t synqf;
+ uint16_t queue;
if (filter->queue >= TXGBE_MAX_RX_QUEUE_NUM)
return -EINVAL;
@@ -4020,7 +4021,11 @@ txgbe_syn_filter_set(struct rte_eth_dev *dev,
if (add) {
if (syn_info & TXGBE_SYNCLS_ENA)
return -EINVAL;
- synqf = (uint32_t)TXGBE_SYNCLS_QPID(filter->queue);
+ if (RTE_ETH_DEV_SRIOV(dev).active)
+ queue = RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + filter->queue;
+ else
+ queue = filter->queue;
+ synqf = (uint32_t)TXGBE_SYNCLS_QPID(queue);
synqf |= TXGBE_SYNCLS_ENA;
if (filter->hig_pri)
@@ -4089,7 +4094,10 @@ txgbe_inject_5tuple_filter(struct rte_eth_dev *dev,
wr32(hw, TXGBE_5TFPORT(i), sdpqf);
wr32(hw, TXGBE_5TFCTL0(i), ftqf);
- l34timir |= TXGBE_5TFCTL1_QP(filter->queue);
+ if (RTE_ETH_DEV_SRIOV(dev).active)
+ l34timir |= TXGBE_5TFCTL1_QP(RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + filter->queue);
+ else
+ l34timir |= TXGBE_5TFCTL1_QP(filter->queue);
wr32(hw, TXGBE_5TFCTL1(i), l34timir);
}
@@ -4373,7 +4381,17 @@ txgbe_add_del_ethertype_filter(struct rte_eth_dev *dev,
if (add) {
etqf = TXGBE_ETFLT_ENA;
etqf |= TXGBE_ETFLT_ETID(filter->ether_type);
- etqs |= TXGBE_ETCLS_QPID(filter->queue);
+ if (RTE_ETH_DEV_SRIOV(dev).active) {
+ int pool, queue;
+
+ pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
+ queue = RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + filter->queue;
+ etqf |= TXGBE_ETFLT_POOLENA;
+ etqf |= TXGBE_ETFLT_POOL(pool);
+ etqs |= TXGBE_ETCLS_QPID(queue);
+ } else {
+ etqs |= TXGBE_ETCLS_QPID(filter->queue);
+ }
etqs |= TXGBE_ETCLS_QENA;
ethertype_filter.ethertype = filter->ether_type;
diff --git a/drivers/net/txgbe/txgbe_fdir.c b/drivers/net/txgbe/txgbe_fdir.c
index a198b6781b..f627ab681d 100644
--- a/drivers/net/txgbe/txgbe_fdir.c
+++ b/drivers/net/txgbe/txgbe_fdir.c
@@ -844,6 +844,9 @@ txgbe_fdir_filter_program(struct rte_eth_dev *dev,
return -EINVAL;
}
+ if (RTE_ETH_DEV_SRIOV(dev).active)
+ queue = RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + queue;
+
node = txgbe_fdir_filter_lookup(info, &rule->input);
if (node) {
if (!update) {
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 7731ad8491..35f80d73ac 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -5160,6 +5160,7 @@ txgbe_config_rss_filter(struct rte_eth_dev *dev,
uint32_t reta;
uint16_t i;
uint16_t j;
+ uint16_t queue;
struct rte_eth_rss_conf rss_conf = {
.rss_key = conf->conf.key_len ?
(void *)(uintptr_t)conf->conf.key : NULL,
@@ -5192,7 +5193,12 @@ txgbe_config_rss_filter(struct rte_eth_dev *dev,
for (i = 0, j = 0; i < RTE_ETH_RSS_RETA_SIZE_128; i++, j++) {
if (j == conf->conf.queue_num)
j = 0;
- reta = (reta >> 8) | LS32(conf->conf.queue[j], 24, 0xFF);
+ if (RTE_ETH_DEV_SRIOV(dev).active)
+ queue = RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx +
+ conf->conf.queue[j];
+ else
+ queue = conf->conf.queue[j];
+ reta = (reta >> 8) | LS32(queue, 24, 0xFF);
if ((i & 3) == 3)
wr32at(hw, TXGBE_REG_RSSTBL, i >> 2, reta);
}
--
2.27.0
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 03/19] net/txgbe: fix Tx hang on queue disable
2024-06-17 9:53 [PATCH 00/19] Wangxun fixes and supports Jiawen Wu
2024-06-17 9:53 ` [PATCH 01/19] net/txgbe: fix to parse tunnel packets Jiawen Wu
2024-06-17 9:53 ` [PATCH 02/19] net/txgbe: fix flow filters in VT mode Jiawen Wu
@ 2024-06-17 9:53 ` Jiawen Wu
2024-06-17 9:53 ` [PATCH 04/19] net/txgbe: restrict the configuration of VLAN strip offload Jiawen Wu
` (5 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Jiawen Wu @ 2024-06-17 9:53 UTC (permalink / raw)
To: dev; +Cc: Jiawen Wu, stable
The problem of Tx hang also occurs on Wangxun 10Gb NICs, when stop device
under heavy traffic.
refer to commit ac6c5e9af56a ("net/ngbe: fix Tx hang on queue disable")
Disable PCIe bus master to clear BME when stop hardware, and verify there
are no pending requests. Move disabling Tx queue after disabling PCIe bus
master to ensure that there are no packets left to cause Tx hang.
Fixes: b1f596677d8e ("net/txgbe: support device start")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/txgbe/base/meson.build | 2 +-
drivers/net/txgbe/base/txgbe_hw.c | 60 +++++++++++++++++++++++-----
drivers/net/txgbe/base/txgbe_hw.h | 1 +
drivers/net/txgbe/base/txgbe_osdep.h | 1 +
drivers/net/txgbe/base/txgbe_regs.h | 3 ++
drivers/net/txgbe/base/txgbe_type.h | 1 +
drivers/net/txgbe/txgbe_ethdev.c | 7 ++++
7 files changed, 65 insertions(+), 10 deletions(-)
diff --git a/drivers/net/txgbe/base/meson.build b/drivers/net/txgbe/base/meson.build
index a81d6890fe..4cf90a394a 100644
--- a/drivers/net/txgbe/base/meson.build
+++ b/drivers/net/txgbe/base/meson.build
@@ -22,6 +22,6 @@ foreach flag: error_cflags
endforeach
base_lib = static_library('txgbe_base', sources,
- dependencies: [static_rte_eal, static_rte_net],
+ dependencies: [static_rte_eal, static_rte_net, static_rte_bus_pci],
c_args: c_args)
base_objs = base_lib.extract_all_objects(recursive: true)
diff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c
index d19fd0065d..7094551fee 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -462,7 +462,7 @@ void txgbe_set_lan_id_multi_port(struct txgbe_hw *hw)
**/
s32 txgbe_stop_hw(struct txgbe_hw *hw)
{
- u32 reg_val;
+ s32 status = 0;
u16 i;
/*
@@ -484,16 +484,26 @@ s32 txgbe_stop_hw(struct txgbe_hw *hw)
wr32(hw, TXGBE_ICR(0), TXGBE_ICR_MASK);
wr32(hw, TXGBE_ICR(1), TXGBE_ICR_MASK);
- /* Disable the transmit unit. Each queue must be disabled. */
- for (i = 0; i < hw->mac.max_tx_queues; i++)
- wr32(hw, TXGBE_TXCFG(i), TXGBE_TXCFG_FLUSH);
+ wr32(hw, TXGBE_BMECTL, 0x3);
/* Disable the receive unit by stopping each queue */
- for (i = 0; i < hw->mac.max_rx_queues; i++) {
- reg_val = rd32(hw, TXGBE_RXCFG(i));
- reg_val &= ~TXGBE_RXCFG_ENA;
- wr32(hw, TXGBE_RXCFG(i), reg_val);
- }
+ for (i = 0; i < hw->mac.max_rx_queues; i++)
+ wr32(hw, TXGBE_RXCFG(i), 0);
+
+ /* flush all queues disables */
+ txgbe_flush(hw);
+ msec_delay(2);
+
+ /* Prevent the PCI-E bus from hanging by disabling PCI-E master
+ * access and verify no pending requests
+ */
+ status = txgbe_set_pcie_master(hw, false);
+ if (status)
+ return status;
+
+ /* Disable the transmit unit. Each queue must be disabled. */
+ for (i = 0; i < hw->mac.max_tx_queues; i++)
+ wr32(hw, TXGBE_TXCFG(i), 0);
/* flush all queues disables */
txgbe_flush(hw);
@@ -1174,6 +1184,38 @@ void txgbe_fc_autoneg(struct txgbe_hw *hw)
}
}
+s32 txgbe_set_pcie_master(struct txgbe_hw *hw, bool enable)
+{
+ struct rte_pci_device *pci_dev = (struct rte_pci_device *)hw->back;
+ s32 status = 0;
+ u32 i;
+
+ if (rte_pci_set_bus_master(pci_dev, enable) < 0) {
+ DEBUGOUT("Cannot configure PCI bus master.");
+ return -1;
+ }
+
+ if (enable)
+ goto out;
+
+ /* Exit if master requests are blocked */
+ if (!(rd32(hw, TXGBE_BMEPEND)))
+ goto out;
+
+ /* Poll for master request bit to clear */
+ for (i = 0; i < TXGBE_PCI_MASTER_DISABLE_TIMEOUT; i++) {
+ usec_delay(100);
+ if (!(rd32(hw, TXGBE_BMEPEND)))
+ goto out;
+ }
+
+ DEBUGOUT("PCIe transaction pending bit also did not clear.");
+ status = TXGBE_ERR_MASTER_REQUESTS_PENDING;
+
+out:
+ return status;
+}
+
/**
* txgbe_acquire_swfw_sync - Acquire SWFW semaphore
* @hw: pointer to hardware structure
diff --git a/drivers/net/txgbe/base/txgbe_hw.h b/drivers/net/txgbe/base/txgbe_hw.h
index 7031589f7c..4bf9da2d4c 100644
--- a/drivers/net/txgbe/base/txgbe_hw.h
+++ b/drivers/net/txgbe/base/txgbe_hw.h
@@ -40,6 +40,7 @@ s32 txgbe_setup_fc(struct txgbe_hw *hw);
s32 txgbe_validate_mac_addr(u8 *mac_addr);
s32 txgbe_acquire_swfw_sync(struct txgbe_hw *hw, u32 mask);
void txgbe_release_swfw_sync(struct txgbe_hw *hw, u32 mask);
+s32 txgbe_set_pcie_master(struct txgbe_hw *hw, bool enable);
s32 txgbe_get_san_mac_addr(struct txgbe_hw *hw, u8 *san_mac_addr);
s32 txgbe_set_san_mac_addr(struct txgbe_hw *hw, u8 *san_mac_addr);
diff --git a/drivers/net/txgbe/base/txgbe_osdep.h b/drivers/net/txgbe/base/txgbe_osdep.h
index 4fce355000..62d16a6abb 100644
--- a/drivers/net/txgbe/base/txgbe_osdep.h
+++ b/drivers/net/txgbe/base/txgbe_osdep.h
@@ -19,6 +19,7 @@
#include <rte_config.h>
#include <rte_io.h>
#include <rte_ether.h>
+#include <bus_pci_driver.h>
#include "../txgbe_logs.h"
diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h
index 79290a7afe..86896d11dc 100644
--- a/drivers/net/txgbe/base/txgbe_regs.h
+++ b/drivers/net/txgbe/base/txgbe_regs.h
@@ -1236,6 +1236,9 @@ enum txgbe_5tuple_protocol {
#define TXGBE_TCPTMR 0x000170
#define TXGBE_ITRSEL 0x000180
+#define TXGBE_BMECTL 0x012020
+#define TXGBE_BMEPEND 0x000168
+
/* P2V Mailbox */
#define TXGBE_MBMEM(i) (0x005000 + 0x40 * (i)) /* 0-63 */
#define TXGBE_MBCTL(i) (0x000600 + 4 * (i)) /* 0-63 */
diff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h
index 75e839b7de..f52736cae9 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -29,6 +29,7 @@
#define TXGBE_FDIRCMD_CMD_POLL 10
#define TXGBE_VF_INIT_TIMEOUT 200 /* Number of retries to clear RSTI */
#define TXGBE_SPI_TIMEOUT 10000
+#define TXGBE_PCI_MASTER_DISABLE_TIMEOUT 800
#define TXGBE_ALIGN 128 /* as intel did */
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index fa68a5d2ca..121dccb5eb 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -601,6 +601,7 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
/* Vendor and Device ID need to be set before init of shared code */
+ hw->back = pci_dev;
hw->device_id = pci_dev->id.device_id;
hw->vendor_id = pci_dev->id.vendor_id;
if (pci_dev->id.subsystem_vendor_id == PCI_VENDOR_ID_WANGXUN) {
@@ -1717,6 +1718,8 @@ txgbe_dev_start(struct rte_eth_dev *dev)
hw->mac.get_link_status = true;
hw->dev_start = true;
+ txgbe_set_pcie_master(hw, true);
+
/* workaround for GPIO intr lost when mng_veto bit is set */
if (txgbe_check_reset_blocked(hw))
txgbe_reinit_gpio_intr(hw);
@@ -1980,6 +1983,8 @@ txgbe_dev_stop(struct rte_eth_dev *dev)
adapter->rss_reta_updated = 0;
wr32m(hw, TXGBE_LEDCTL, 0xFFFFFFFF, TXGBE_LEDCTL_SEL_MASK);
+ txgbe_set_pcie_master(hw, true);
+
hw->adapter_stopped = true;
dev->data->dev_started = 0;
hw->dev_start = false;
@@ -2062,6 +2067,8 @@ txgbe_dev_close(struct rte_eth_dev *dev)
txgbe_dev_free_queues(dev);
+ txgbe_set_pcie_master(hw, false);
+
/* reprogram the RAR[0] in case user changed it. */
txgbe_set_rar(hw, 0, hw->mac.addr, 0, true);
--
2.27.0
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 04/19] net/txgbe: restrict the configuration of VLAN strip offload
2024-06-17 9:53 [PATCH 00/19] Wangxun fixes and supports Jiawen Wu
` (2 preceding siblings ...)
2024-06-17 9:53 ` [PATCH 03/19] net/txgbe: fix Tx hang on queue disable Jiawen Wu
@ 2024-06-17 9:53 ` Jiawen Wu
2024-06-17 9:53 ` [PATCH 05/19] net/txgbe: reconfigure more MAC Rx registers Jiawen Wu
` (4 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Jiawen Wu @ 2024-06-17 9:53 UTC (permalink / raw)
To: dev; +Cc: Jiawen Wu, stable
There is a hardware limitation that Rx ring config register is not writable
when Rx ring is enabled, i.e. the TXGBE_RXCFG_ENA bit is set. But disabling
the ring when there is traffic will cause ring get stuck. So restrict the
configuration of VLAN strip offload only if device is started.
Fixes: 220b0e49bc47 ("net/txgbe: support VLAN")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/txgbe/txgbe_ethdev.c | 49 +++++++++++++-------------------
1 file changed, 20 insertions(+), 29 deletions(-)
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 121dccb5eb..a59d964a5b 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -1000,41 +1000,25 @@ txgbe_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
}
static void
-txgbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
+txgbe_vlan_strip_q_set(struct rte_eth_dev *dev, uint16_t queue, int on)
{
- struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
- struct txgbe_rx_queue *rxq;
- bool restart;
- uint32_t rxcfg, rxbal, rxbah;
-
if (on)
txgbe_vlan_hw_strip_enable(dev, queue);
else
txgbe_vlan_hw_strip_disable(dev, queue);
+}
- rxq = dev->data->rx_queues[queue];
- rxbal = rd32(hw, TXGBE_RXBAL(rxq->reg_idx));
- rxbah = rd32(hw, TXGBE_RXBAH(rxq->reg_idx));
- rxcfg = rd32(hw, TXGBE_RXCFG(rxq->reg_idx));
- if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) {
- restart = (rxcfg & TXGBE_RXCFG_ENA) &&
- !(rxcfg & TXGBE_RXCFG_VLAN);
- rxcfg |= TXGBE_RXCFG_VLAN;
- } else {
- restart = (rxcfg & TXGBE_RXCFG_ENA) &&
- (rxcfg & TXGBE_RXCFG_VLAN);
- rxcfg &= ~TXGBE_RXCFG_VLAN;
- }
- rxcfg &= ~TXGBE_RXCFG_ENA;
+static void
+txgbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
+{
+ struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
- if (restart) {
- /* set vlan strip for ring */
- txgbe_dev_rx_queue_stop(dev, queue);
- wr32(hw, TXGBE_RXBAL(rxq->reg_idx), rxbal);
- wr32(hw, TXGBE_RXBAH(rxq->reg_idx), rxbah);
- wr32(hw, TXGBE_RXCFG(rxq->reg_idx), rxcfg);
- txgbe_dev_rx_queue_start(dev, queue);
+ if (!hw->adapter_stopped) {
+ PMD_DRV_LOG(ERR, "Please stop port first");
+ return;
}
+
+ txgbe_vlan_strip_q_set(dev, queue, on);
}
static int
@@ -1259,9 +1243,9 @@ txgbe_vlan_hw_strip_config(struct rte_eth_dev *dev)
rxq = dev->data->rx_queues[i];
if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
- txgbe_vlan_strip_queue_set(dev, i, 1);
+ txgbe_vlan_strip_q_set(dev, i, 1);
else
- txgbe_vlan_strip_queue_set(dev, i, 0);
+ txgbe_vlan_strip_q_set(dev, i, 0);
}
}
@@ -1323,6 +1307,13 @@ txgbe_vlan_offload_config(struct rte_eth_dev *dev, int mask)
static int
txgbe_vlan_offload_set(struct rte_eth_dev *dev, int mask)
{
+ struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+
+ if (!hw->adapter_stopped && (mask & RTE_ETH_VLAN_STRIP_MASK)) {
+ PMD_DRV_LOG(ERR, "Please stop port first");
+ return -EPERM;
+ }
+
txgbe_config_vlan_strip_on_all_queues(dev, mask);
txgbe_vlan_offload_config(dev, mask);
--
2.27.0
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 05/19] net/txgbe: reconfigure more MAC Rx registers
2024-06-17 9:53 [PATCH 00/19] Wangxun fixes and supports Jiawen Wu
` (3 preceding siblings ...)
2024-06-17 9:53 ` [PATCH 04/19] net/txgbe: restrict the configuration of VLAN strip offload Jiawen Wu
@ 2024-06-17 9:53 ` Jiawen Wu
2024-06-17 9:53 ` [PATCH 06/19] net/txgbe: fix VF promiscuous and allmulticast Jiawen Wu
` (3 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Jiawen Wu @ 2024-06-17 9:53 UTC (permalink / raw)
To: dev; +Cc: Jiawen Wu, stable
When link status changes, there is a probability that no more packets can
be received on the port, due to hardware defects. These MAC Rx registers
should be reconfigured to fix this problem.
Fixes: 950a6954df13 ("net/txgbe: reconfigure MAC Rx when link update")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/txgbe/base/txgbe_regs.h | 2 ++
drivers/net/txgbe/txgbe_ethdev.c | 8 +++++++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h
index 86896d11dc..a2984f1106 100644
--- a/drivers/net/txgbe/base/txgbe_regs.h
+++ b/drivers/net/txgbe/base/txgbe_regs.h
@@ -1022,6 +1022,8 @@ enum txgbe_5tuple_protocol {
#define TXGBE_MACRXFLT_CTL_PASS LS(3, 6, 0x3)
#define TXGBE_MACRXFLT_RXALL MS(31, 0x1)
+#define TXGBE_MAC_WDG_TIMEOUT 0x01100C
+
/******************************************************************************
* Statistic Registers
******************************************************************************/
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index a59d964a5b..699ff1c920 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -2879,6 +2879,7 @@ txgbe_dev_link_update_share(struct rte_eth_dev *dev,
bool link_up;
int err;
int wait = 1;
+ u32 reg;
memset(&link, 0, sizeof(link));
link.link_status = RTE_ETH_LINK_DOWN;
@@ -2968,9 +2969,14 @@ txgbe_dev_link_update_share(struct rte_eth_dev *dev,
}
/* Re configure MAC RX */
- if (hw->mac.type == txgbe_mac_raptor)
+ if (hw->mac.type == txgbe_mac_raptor) {
+ reg = rd32(hw, TXGBE_MACRXCFG);
+ wr32(hw, TXGBE_MACRXCFG, reg);
wr32m(hw, TXGBE_MACRXFLT, TXGBE_MACRXFLT_PROMISC,
TXGBE_MACRXFLT_PROMISC);
+ reg = rd32(hw, TXGBE_MAC_WDG_TIMEOUT);
+ wr32(hw, TXGBE_MAC_WDG_TIMEOUT, reg);
+ }
return rte_eth_linkstatus_set(dev, &link);
}
--
2.27.0
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 06/19] net/txgbe: fix VF promiscuous and allmulticast
2024-06-17 9:53 [PATCH 00/19] Wangxun fixes and supports Jiawen Wu
` (4 preceding siblings ...)
2024-06-17 9:53 ` [PATCH 05/19] net/txgbe: reconfigure more MAC Rx registers Jiawen Wu
@ 2024-06-17 9:53 ` Jiawen Wu
2024-06-17 9:53 ` [PATCH 07/19] net/ngbe: special config for YT8531SH-CA PHY Jiawen Wu
` (2 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Jiawen Wu @ 2024-06-17 9:53 UTC (permalink / raw)
To: dev; +Cc: Jiawen Wu, stable
The configuration of allmulti and promiscuous modes conflicts
together. For instance, if we enable promiscuous mode, then enable and
disable allmulti, then the promiscuous mode is wrongly disabled.
Fix this behavior by:
- doing nothing when we set/unset allmulti if promiscuous mode is on
- restorting the proper mode (none or allmulti) when we disable
promiscuous mode
Fixes: 29072d593fe4 ("net/txgbe: support VF promiscuous and allmulticast")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/txgbe/txgbe_ethdev_vf.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c
index ec40419289..6ac34058ab 100644
--- a/drivers/net/txgbe/txgbe_ethdev_vf.c
+++ b/drivers/net/txgbe/txgbe_ethdev_vf.c
@@ -1202,9 +1202,13 @@ static int
txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev)
{
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+ int mode = TXGBEVF_XCAST_MODE_NONE;
int ret;
- switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_NONE)) {
+ if (dev->data->all_multicast)
+ mode = TXGBEVF_XCAST_MODE_ALLMULTI;
+
+ switch (hw->mac.update_xcast_mode(hw, mode)) {
case 0:
ret = 0;
break;
@@ -1225,6 +1229,9 @@ txgbevf_dev_allmulticast_enable(struct rte_eth_dev *dev)
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
int ret;
+ if (dev->data->promiscuous)
+ return 0;
+
switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_ALLMULTI)) {
case 0:
ret = 0;
@@ -1246,6 +1253,9 @@ txgbevf_dev_allmulticast_disable(struct rte_eth_dev *dev)
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
int ret;
+ if (dev->data->promiscuous)
+ return 0;
+
switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_MULTI)) {
case 0:
ret = 0;
--
2.27.0
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 07/19] net/ngbe: special config for YT8531SH-CA PHY
2024-06-17 9:53 [PATCH 00/19] Wangxun fixes and supports Jiawen Wu
` (5 preceding siblings ...)
2024-06-17 9:53 ` [PATCH 06/19] net/txgbe: fix VF promiscuous and allmulticast Jiawen Wu
@ 2024-06-17 9:53 ` Jiawen Wu
2024-06-17 9:53 ` [PATCH 08/19] net/ngbe: keep PHY power down while device probing Jiawen Wu
2024-06-17 9:53 ` [PATCH 09/19] net/ngbe: add WOL and NCSI capability Jiawen Wu
8 siblings, 0 replies; 14+ messages in thread
From: Jiawen Wu @ 2024-06-17 9:53 UTC (permalink / raw)
To: dev; +Cc: Jiawen Wu, stable
YT8531SH-CA PHY will switch to SDS space automatically when UTP and
SDS media are not present, causing failure to link up. Add the special
configuration to fix it.
Fixes: 3d0af7066759 ("net/ngbe: setup PHY link")
Fixes: 1c44384fce76 ("net/ngbe: support custom PHY interfaces")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/ngbe/base/ngbe_phy_yt.c | 4 ++++
drivers/net/ngbe/base/ngbe_phy_yt.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/net/ngbe/base/ngbe_phy_yt.c b/drivers/net/ngbe/base/ngbe_phy_yt.c
index ea313cd9a5..a374b015fd 100644
--- a/drivers/net/ngbe/base/ngbe_phy_yt.c
+++ b/drivers/net/ngbe/base/ngbe_phy_yt.c
@@ -320,6 +320,10 @@ s32 ngbe_setup_phy_link_yt(struct ngbe_hw *hw, u32 speed,
value |= value_r4;
ngbe_write_phy_reg_mdi(hw, YT_ANA, 0, value);
+ /* config for yt8531sh-ca */
+ ngbe_write_phy_reg_ext_yt(hw, YT_SPEC_CONF, 0,
+ YT_SPEC_CONF_8531SH_CA);
+
/* software reset to make the above configuration
* take effect
*/
diff --git a/drivers/net/ngbe/base/ngbe_phy_yt.h b/drivers/net/ngbe/base/ngbe_phy_yt.h
index ddf992e79a..c45bec7ce7 100644
--- a/drivers/net/ngbe/base/ngbe_phy_yt.h
+++ b/drivers/net/ngbe/base/ngbe_phy_yt.h
@@ -32,6 +32,8 @@
#define YT_MISC 0xA006
#define YT_MISC_FIBER_PRIO MS16(8, 0x1) /* 0 for UTP */
#define YT_MISC_RESV MS16(0, 0x1)
+#define YT_SPEC_CONF 0xA023
+#define YT_SPEC_CONF_8531SH_CA 0x4031
/* SDS EXT */
#define YT_AUTO 0xA5
--
2.27.0
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 08/19] net/ngbe: keep PHY power down while device probing
2024-06-17 9:53 [PATCH 00/19] Wangxun fixes and supports Jiawen Wu
` (6 preceding siblings ...)
2024-06-17 9:53 ` [PATCH 07/19] net/ngbe: special config for YT8531SH-CA PHY Jiawen Wu
@ 2024-06-17 9:53 ` Jiawen Wu
2024-06-17 9:53 ` [PATCH 09/19] net/ngbe: add WOL and NCSI capability Jiawen Wu
8 siblings, 0 replies; 14+ messages in thread
From: Jiawen Wu @ 2024-06-17 9:53 UTC (permalink / raw)
To: dev; +Cc: Jiawen Wu, stable
The internal PHY will be set to default power down after LAN reset,
but the external PHY will not. To keep the PHY behavior consistent,
set PHY power down uniformly here.
Fixes: 708ebe7d0399 ("net/ngbe: fix external PHY power down")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/ngbe/base/ngbe_devids.h | 1 +
drivers/net/ngbe/base/ngbe_hw.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drivers/net/ngbe/base/ngbe_devids.h b/drivers/net/ngbe/base/ngbe_devids.h
index 83eedf423e..e1efa62015 100644
--- a/drivers/net/ngbe/base/ngbe_devids.h
+++ b/drivers/net/ngbe/base/ngbe_devids.h
@@ -83,6 +83,7 @@
#define NGBE_YT8521S_SFP_GPIO 0x0062
#define NGBE_INTERNAL_YT8521S_SFP_GPIO 0x0064
#define NGBE_LY_YT8521S_SFP 0x0070
+#define NGBE_RGMII_FPGA 0x0080
#define NGBE_WOL_SUP 0x4000
#define NGBE_NCSI_SUP 0x8000
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index 22ccdb0b7d..4dced0d328 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -173,6 +173,9 @@ s32 ngbe_reset_hw_em(struct ngbe_hw *hw)
ngbe_reset_misc_em(hw);
hw->mac.clear_hw_cntrs(hw);
+ if (!((hw->sub_device_id & NGBE_OEM_MASK) == NGBE_RGMII_FPGA))
+ hw->phy.set_phy_power(hw, false);
+
msec_delay(50);
/* Store the permanent mac address */
--
2.27.0
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 09/19] net/ngbe: add WOL and NCSI capability
2024-06-17 9:53 [PATCH 00/19] Wangxun fixes and supports Jiawen Wu
` (7 preceding siblings ...)
2024-06-17 9:53 ` [PATCH 08/19] net/ngbe: keep PHY power down while device probing Jiawen Wu
@ 2024-06-17 9:53 ` Jiawen Wu
2024-06-18 6:48 ` David Marchand
8 siblings, 1 reply; 14+ messages in thread
From: Jiawen Wu @ 2024-06-17 9:53 UTC (permalink / raw)
To: dev; +Cc: Jiawen Wu
Support WOL and NCSI capability for devices. And there is one OEM
NCSI NIC which can not be identified from sub-system ID, it needs
to check NCSI pin status in firmware.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/ngbe/base/ngbe_hw.c | 30 ++++++++++++++++++++++++++--
drivers/net/ngbe/base/ngbe_hw.h | 1 +
drivers/net/ngbe/base/ngbe_mng.h | 1 +
drivers/net/ngbe/base/ngbe_phy.c | 6 ++++++
drivers/net/ngbe/base/ngbe_phy_rtl.c | 5 ++++-
drivers/net/ngbe/base/ngbe_phy_yt.c | 3 +++
drivers/net/ngbe/base/ngbe_type.h | 2 ++
drivers/net/ngbe/ngbe_ethdev.c | 20 ++++++++++++-------
drivers/net/ngbe/ngbe_rxtx.c | 5 ++++-
9 files changed, 62 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index 4dced0d328..0f1a5b9f8d 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -173,7 +173,8 @@ s32 ngbe_reset_hw_em(struct ngbe_hw *hw)
ngbe_reset_misc_em(hw);
hw->mac.clear_hw_cntrs(hw);
- if (!((hw->sub_device_id & NGBE_OEM_MASK) == NGBE_RGMII_FPGA))
+ if (!(((hw->sub_device_id & NGBE_OEM_MASK) == NGBE_RGMII_FPGA) ||
+ hw->ncsi_enabled || hw->wol_enabled))
hw->phy.set_phy_power(hw, false);
msec_delay(50);
@@ -1709,7 +1710,8 @@ void ngbe_disable_rx(struct ngbe_hw *hw)
}
wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0);
- wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
+ if (!(hw->ncsi_enabled || hw->wol_enabled))
+ wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
}
void ngbe_enable_rx(struct ngbe_hw *hw)
@@ -1925,6 +1927,10 @@ void ngbe_map_device_id(struct ngbe_hw *hw)
oem == NGBE_INTERNAL_YT8521S_SFP_GPIO ||
oem == NGBE_LY_YT8521S_SFP)
hw->gpio_ctl = true;
+
+ hw->wol_enabled = (hw->sub_system_id & NGBE_WOL_SUP_MASK) ? true : false;
+ hw->ncsi_enabled = (hw->sub_system_id & NGBE_NCSI_SUP_MASK ||
+ hw->sub_system_id & NGBE_OCP_CARD) ? true : false;
}
/**
@@ -2065,3 +2071,23 @@ s32 ngbe_init_shared_code(struct ngbe_hw *hw)
return status;
}
+void ngbe_set_ncsi_status(struct ngbe_hw *hw)
+{
+ u16 ncsi_pin = 0;
+ s32 err = 0;
+
+ /* need to check ncsi pin status for oem ncsi card */
+ if (hw->ncsi_enabled || hw->wol_enabled)
+ return;
+
+ err = hw->rom.readw_buffer(hw, FW_READ_SHADOW_RAM_GPIO, 1, &ncsi_pin);
+ if (err) {
+ DEBUGOUT("get ncsi pin status failed");
+ return;
+ }
+
+ if (ncsi_pin == 1) {
+ hw->ncsi_enabled = true;
+ hw->wol_enabled = true;
+ }
+}
diff --git a/drivers/net/ngbe/base/ngbe_hw.h b/drivers/net/ngbe/base/ngbe_hw.h
index b92a691fa0..b9805af499 100644
--- a/drivers/net/ngbe/base/ngbe_hw.h
+++ b/drivers/net/ngbe/base/ngbe_hw.h
@@ -86,5 +86,6 @@ void ngbe_map_device_id(struct ngbe_hw *hw);
void ngbe_read_efuse(struct ngbe_hw *hw);
u32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr);
u32 ngbe_flash_read_dword(struct ngbe_hw *hw, u32 addr);
+void ngbe_set_ncsi_status(struct ngbe_hw *hw);
#endif /* _NGBE_HW_H_ */
diff --git a/drivers/net/ngbe/base/ngbe_mng.h b/drivers/net/ngbe/base/ngbe_mng.h
index 36257d6e5e..7dee6053f9 100644
--- a/drivers/net/ngbe/base/ngbe_mng.h
+++ b/drivers/net/ngbe/base/ngbe_mng.h
@@ -27,6 +27,7 @@
#define FW_NVM_DATA_OFFSET 3
#define FW_EEPROM_CHECK_STATUS 0xE9
#define FW_PHY_LED_CONF 0xF1
+#define FW_READ_SHADOW_RAM_GPIO 0xB4
#define FW_CHECKSUM_CAP_ST_PASS 0x80658383
#define FW_CHECKSUM_CAP_ST_FAIL 0x70657376
diff --git a/drivers/net/ngbe/base/ngbe_phy.c b/drivers/net/ngbe/base/ngbe_phy.c
index acff7bfebf..6b5c1e47df 100644
--- a/drivers/net/ngbe/base/ngbe_phy.c
+++ b/drivers/net/ngbe/base/ngbe_phy.c
@@ -210,6 +210,9 @@ s32 ngbe_reset_phy(struct ngbe_hw *hw)
if (err != 0 || hw->phy.type == ngbe_phy_none)
return err;
+ if (hw->ncsi_enabled)
+ return err;
+
/* Don't reset PHY if it's shut down due to overtemp. */
if (hw->mac.check_overtemp(hw) == NGBE_ERR_OVERTEMP)
return err;
@@ -428,6 +431,9 @@ s32 ngbe_init_phy(struct ngbe_hw *hw)
break;
}
+ if (hw->wol_enabled || hw->ncsi_enabled)
+ hw->phy.reset_disable = true;
+
init_phy_ops_out:
return err;
}
diff --git a/drivers/net/ngbe/base/ngbe_phy_rtl.c b/drivers/net/ngbe/base/ngbe_phy_rtl.c
index ba63a8058a..9312bd300b 100644
--- a/drivers/net/ngbe/base/ngbe_phy_rtl.c
+++ b/drivers/net/ngbe/base/ngbe_phy_rtl.c
@@ -295,7 +295,10 @@ s32 ngbe_setup_phy_link_rtl(struct ngbe_hw *hw,
}
/* restart AN and wait AN done interrupt */
- autoneg_reg = RTL_BMCR_RESTART_AN | RTL_BMCR_ANE;
+ if (!hw->ncsi_enabled)
+ autoneg_reg = RTL_BMCR_RESTART_AN | RTL_BMCR_ANE;
+ else
+ autoneg_reg = RTL_BMCR_ANE;
hw->phy.write_reg(hw, RTL_BMCR, RTL_DEV_ZERO, autoneg_reg);
skip_an:
diff --git a/drivers/net/ngbe/base/ngbe_phy_yt.c b/drivers/net/ngbe/base/ngbe_phy_yt.c
index a374b015fd..d110fbc8b2 100644
--- a/drivers/net/ngbe/base/ngbe_phy_yt.c
+++ b/drivers/net/ngbe/base/ngbe_phy_yt.c
@@ -126,6 +126,9 @@ s32 ngbe_setup_phy_link_yt(struct ngbe_hw *hw, u32 speed,
UNREFERENCED_PARAMETER(autoneg_wait_to_complete);
+ if (hw->ncsi_enabled)
+ return 0;
+
hw->phy.autoneg_advertised = 0;
/* check chip_mode first */
diff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h
index 8a7d2cd331..1b74b7a61f 100644
--- a/drivers/net/ngbe/base/ngbe_type.h
+++ b/drivers/net/ngbe/base/ngbe_type.h
@@ -457,6 +457,8 @@ struct ngbe_hw {
u32 eeprom_id;
u8 revision_id;
bool adapter_stopped;
+ bool wol_enabled;
+ bool ncsi_enabled;
uint64_t isb_dma;
void IOMEM *isb_mem;
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index c2e186c3d6..2a858b76d0 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -406,6 +406,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
/* Unlock any pending hardware semaphore */
ngbe_swfw_lock_reset(hw);
+ ngbe_set_ncsi_status(hw);
/* Get Hardware Flow Control setting */
hw->fc.requested_mode = ngbe_fc_full;
@@ -1092,10 +1093,12 @@ ngbe_dev_start(struct rte_eth_dev *dev)
speed |= NGBE_LINK_SPEED_10M_FULL;
}
- err = hw->phy.init_hw(hw);
- if (err != 0) {
- PMD_INIT_LOG(ERR, "PHY init failed");
- goto error;
+ if (!hw->ncsi_enabled) {
+ err = hw->phy.init_hw(hw);
+ if (err != 0) {
+ PMD_INIT_LOG(ERR, "PHY init failed");
+ goto error;
+ }
}
err = hw->mac.setup_link(hw, speed, link_up);
if (err != 0)
@@ -1218,7 +1221,8 @@ ngbe_dev_stop(struct rte_eth_dev *dev)
out:
/* close phy to prevent reset in dev_close from restarting physical link */
- hw->phy.set_phy_power(hw, false);
+ if (!(hw->wol_enabled || hw->ncsi_enabled))
+ hw->phy.set_phy_power(hw, false);
return 0;
}
@@ -1231,7 +1235,8 @@ ngbe_dev_set_link_up(struct rte_eth_dev *dev)
{
struct ngbe_hw *hw = ngbe_dev_hw(dev);
- hw->phy.set_phy_power(hw, true);
+ if (!(hw->ncsi_enabled || hw->wol_enabled))
+ hw->phy.set_phy_power(hw, true);
return 0;
}
@@ -1244,7 +1249,8 @@ ngbe_dev_set_link_down(struct rte_eth_dev *dev)
{
struct ngbe_hw *hw = ngbe_dev_hw(dev);
- hw->phy.set_phy_power(hw, false);
+ if (!(hw->ncsi_enabled || hw->wol_enabled))
+ hw->phy.set_phy_power(hw, false);
return 0;
}
diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c
index 9de12767df..c54c67f7ee 100644
--- a/drivers/net/ngbe/ngbe_rxtx.c
+++ b/drivers/net/ngbe/ngbe_rxtx.c
@@ -2943,7 +2943,10 @@ ngbe_dev_rx_init(struct rte_eth_dev *dev)
* Make sure receives are disabled while setting
* up the Rx context (registers, descriptor rings, etc.).
*/
- wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
+
+ if (!(hw->ncsi_enabled || hw->wol_enabled))
+ wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
+
wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0);
/* Enable receipt of broadcasted frames */
--
2.27.0
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 09/19] net/ngbe: add WOL and NCSI capability
2024-06-17 9:53 ` [PATCH 09/19] net/ngbe: add WOL and NCSI capability Jiawen Wu
@ 2024-06-18 6:48 ` David Marchand
2024-06-18 7:11 ` Jiawen Wu
0 siblings, 1 reply; 14+ messages in thread
From: David Marchand @ 2024-06-18 6:48 UTC (permalink / raw)
To: Jiawen Wu; +Cc: dev
On Mon, Jun 17, 2024 at 11:54 AM Jiawen Wu <jiawenwu@trustnetic.com> wrote:
>
> Support WOL and NCSI capability for devices. And there is one OEM
> NCSI NIC which can not be identified from sub-system ID, it needs
> to check NCSI pin status in firmware.
>
> Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
It looks like this series is truncated.
Can you resend? And please patchwork accordingly.
Thanks.
--
David Marchand
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH 09/19] net/ngbe: add WOL and NCSI capability
2024-06-18 6:48 ` David Marchand
@ 2024-06-18 7:11 ` Jiawen Wu
0 siblings, 0 replies; 14+ messages in thread
From: Jiawen Wu @ 2024-06-18 7:11 UTC (permalink / raw)
To: 'David Marchand'; +Cc: dev
On Tuesday, June 18, 2024 2:49 PM, dmarchan@redhat.com wrote:
> On Mon, Jun 17, 2024 at 11:54 AM Jiawen Wu <jiawenwu@trustnetic.com> wrote:
> >
> > Support WOL and NCSI capability for devices. And there is one OEM
> > NCSI NIC which can not be identified from sub-system ID, it needs
> > to check NCSI pin status in firmware.
> >
> > Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
>
> It looks like this series is truncated.
> Can you resend? And please patchwork accordingly.
Oops...!
Thanks for the reminder.
^ permalink raw reply [flat|nested] 14+ messages in thread